fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r230-tall-167856414900634
Last Updated
May 14, 2023

About the Execution of LoLA for MAPKbis-PT-5310

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
3353.044 3600000.00 3768006.00 10226.60 TTTTTFT?FF??F?TT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r230-tall-167856414900634.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is MAPKbis-PT-5310, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r230-tall-167856414900634
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 636K
-rw-r--r-- 1 mcc users 6.4K Feb 25 16:17 CTLCardinality.txt
-rw-r--r-- 1 mcc users 54K Feb 25 16:17 CTLCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 15:59 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Feb 25 15:59 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Feb 25 16:22 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:22 LTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 25 16:22 LTLFireability.txt
-rw-r--r-- 1 mcc users 21K Feb 25 16:22 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 16:35 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 111K Feb 25 16:35 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 22K Feb 25 16:26 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 82K Feb 25 16:26 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:22 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 170K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-00
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-01
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-02
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-03
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-04
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-05
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-06
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-07
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-08
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-09
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-10
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-11
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-12
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-13
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-14
FORMULA_NAME MAPKbis-PT-5310-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679493471913

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=MAPKbis-PT-5310
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT MAPKbis-PT-5310
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA MAPKbis-PT-5310-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPKbis-PT-5310-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPKbis-PT-5310-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPKbis-PT-5310-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPKbis-PT-5310-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPKbis-PT-5310-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPKbis-PT-5310-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPKbis-PT-5310-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPKbis-PT-5310-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPKbis-PT-5310-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPKbis-PT-5310-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPKbis-PT-5310-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393232 kB
MemFree: 12861704 kB
After kill :
MemTotal: 16393232 kB
MemFree: 16166732 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:182
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:122
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 41 transitions removed,11 places removed
lola: LAUNCH INITIAL
lola: LAUNCH task # 7 (type CNST) for 6 MAPKbis-PT-5310-CTLFireability-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 7 (type CNST) for MAPKbis-PT-5310-CTLFireability-02
lola: result : true
lola: LAUNCH INITIAL
lola: LAUNCH task # 4 (type CNST) for 3 MAPKbis-PT-5310-CTLFireability-01
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 28 (type CNST) for 27 MAPKbis-PT-5310-CTLFireability-09
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 4 (type CNST) for MAPKbis-PT-5310-CTLFireability-01
lola: result : true
lola: FINISHED task # 28 (type CNST) for MAPKbis-PT-5310-CTLFireability-09
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 16 (type CNST) for 15 MAPKbis-PT-5310-CTLFireability-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 37 (type CNST) for 36 MAPKbis-PT-5310-CTLFireability-12
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 37 (type CNST) for MAPKbis-PT-5310-CTLFireability-12
lola: result : false
lola: FINISHED task # 16 (type CNST) for MAPKbis-PT-5310-CTLFireability-05
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: LAUNCH task # 10 (type EXCL) for 9 MAPKbis-PT-5310-CTLFireability-03
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 49 (type FNDP) for 33 MAPKbis-PT-5310-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 50 (type FNDP) for 42 MAPKbis-PT-5310-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type EQUN) for 42 MAPKbis-PT-5310-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 50 (type FNDP) for MAPKbis-PT-5310-CTLFireability-14
lola: result : true
lola: fired transitions : 70
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 51 (type EQUN) for MAPKbis-PT-5310-CTLFireability-14 (obsolete)
sara: try reading problem file /home/mcc/execution/CTLFireability-51.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 10 (type EXCL) for MAPKbis-PT-5310-CTLFireability-03
lola: result : true
lola: markings : 32981
lola: fired transitions : 124089
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 MAPKbis-PT-5310-CTLFireability-13
lola: time limit : 399 sec
lola: memory limit: 32 pages

lola: FINISHED task # 51 (type EQUN) for MAPKbis-PT-5310-CTLFireability-14
lola: result : unknown
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 1 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 4/399 7/32 MAPKbis-PT-5310-CTLFireability-13 1539782 m, 307956 m/sec, 5542332 t fired, .
49 EF DL FNDP 4/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 2333233 t fired, 3 attempts, .

Time elapsed: 5 secs. Pages in use: 7
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 1 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 9/399 12/32 MAPKbis-PT-5310-CTLFireability-13 2819803 m, 256004 m/sec, 10530483 t fired, .
49 EF DL FNDP 9/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 4752552 t fired, 5 attempts, .

Time elapsed: 10 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 1 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 15/399 17/32 MAPKbis-PT-5310-CTLFireability-13 4018804 m, 239800 m/sec, 15325078 t fired, .
49 EF DL FNDP 15/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 7169946 t fired, 8 attempts, .

Time elapsed: 16 secs. Pages in use: 17
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 1 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 20/399 22/32 MAPKbis-PT-5310-CTLFireability-13 5190807 m, 234400 m/sec, 20092857 t fired, .
49 EF DL FNDP 20/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 9588351 t fired, 10 attempts, .

Time elapsed: 21 secs. Pages in use: 22
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 1 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 25/399 27/32 MAPKbis-PT-5310-CTLFireability-13 6353034 m, 232445 m/sec, 24898461 t fired, .
49 EF DL FNDP 25/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 12004958 t fired, 13 attempts, .

Time elapsed: 26 secs. Pages in use: 27
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 1 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 30/399 32/32 MAPKbis-PT-5310-CTLFireability-13 7506613 m, 230715 m/sec, 29718655 t fired, .
49 EF DL FNDP 30/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 14422344 t fired, 15 attempts, .

Time elapsed: 31 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
lola: CANCELED task # 40 (type EXCL) for MAPKbis-PT-5310-CTLFireability-13 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 1 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 35/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 16843581 t fired, 17 attempts, .

Time elapsed: 36 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
lola: LAUNCH task # 25 (type EXCL) for 24 MAPKbis-PT-5310-CTLFireability-08
lola: time limit : 445 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for MAPKbis-PT-5310-CTLFireability-08
lola: result : false
lola: markings : 1
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 MAPKbis-PT-5310-CTLFireability-04
lola: time limit : 509 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for MAPKbis-PT-5310-CTLFireability-04
lola: result : true
lola: markings : 115
lola: fired transitions : 506
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 MAPKbis-PT-5310-CTLFireability-00
lola: time limit : 594 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for MAPKbis-PT-5310-CTLFireability-00
lola: result : true
lola: markings : 190581
lola: fired transitions : 791194
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 33 MAPKbis-PT-5310-CTLFireability-11
lola: time limit : 712 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 2 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 EF DL EXCL 5/712 5/32 MAPKbis-PT-5310-CTLFireability-11 1437788 m, 287557 m/sec, 2241033 t fired, .
49 EF DL FNDP 40/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 19243453 t fired, 20 attempts, .

Time elapsed: 41 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 2 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 EF DL EXCL 10/712 11/32 MAPKbis-PT-5310-CTLFireability-11 2984673 m, 309377 m/sec, 4879886 t fired, .
49 EF DL FNDP 45/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 21574386 t fired, 22 attempts, .

Time elapsed: 46 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 2 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 EF DL EXCL 15/712 16/32 MAPKbis-PT-5310-CTLFireability-11 4448396 m, 292744 m/sec, 7479970 t fired, .
49 EF DL FNDP 50/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 23903746 t fired, 24 attempts, .

Time elapsed: 51 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 2 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 EF DL EXCL 20/712 20/32 MAPKbis-PT-5310-CTLFireability-11 5835331 m, 277387 m/sec, 10011538 t fired, .
49 EF DL FNDP 55/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 26235520 t fired, 27 attempts, .

Time elapsed: 56 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 2 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 EF DL EXCL 25/712 25/32 MAPKbis-PT-5310-CTLFireability-11 7189080 m, 270749 m/sec, 12542821 t fired, .
49 EF DL FNDP 60/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 28570479 t fired, 29 attempts, .

Time elapsed: 61 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 2 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 EF DL EXCL 30/712 29/32 MAPKbis-PT-5310-CTLFireability-11 8517674 m, 265718 m/sec, 15060810 t fired, .
49 EF DL FNDP 65/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 30905598 t fired, 31 attempts, .

Time elapsed: 66 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
lola: CANCELED task # 48 (type EXCL) for MAPKbis-PT-5310-CTLFireability-11 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 70/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 33267967 t fired, 34 attempts, .

Time elapsed: 71 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
lola: LAUNCH task # 46 (type EXCL) for 45 MAPKbis-PT-5310-CTLFireability-15
lola: time limit : 882 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for MAPKbis-PT-5310-CTLFireability-15
lola: result : true
lola: markings : 35
lola: fired transitions : 35
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 MAPKbis-PT-5310-CTLFireability-06
lola: time limit : 1176 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for MAPKbis-PT-5310-CTLFireability-06
lola: result : true
lola: markings : 12315
lola: fired transitions : 31644
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 MAPKbis-PT-5310-CTLFireability-10
lola: time limit : 1764 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 5/1764 7/32 MAPKbis-PT-5310-CTLFireability-10 1607998 m, 321599 m/sec, 7470953 t fired, .
49 EF DL FNDP 75/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 35693704 t fired, 36 attempts, .

Time elapsed: 76 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 10/1764 13/32 MAPKbis-PT-5310-CTLFireability-10 2948555 m, 268111 m/sec, 14085478 t fired, .
49 EF DL FNDP 80/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 38113305 t fired, 39 attempts, .

Time elapsed: 81 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 15/1764 18/32 MAPKbis-PT-5310-CTLFireability-10 4195736 m, 249436 m/sec, 20387507 t fired, .
49 EF DL FNDP 85/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 40529968 t fired, 41 attempts, .

Time elapsed: 86 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 20/1764 23/32 MAPKbis-PT-5310-CTLFireability-10 5386386 m, 238130 m/sec, 26492373 t fired, .
49 EF DL FNDP 90/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 42951401 t fired, 43 attempts, .

Time elapsed: 91 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 25/1764 28/32 MAPKbis-PT-5310-CTLFireability-10 6535331 m, 229789 m/sec, 32457942 t fired, .
49 EF DL FNDP 95/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 45364821 t fired, 46 attempts, .

Time elapsed: 96 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 30/1764 32/32 MAPKbis-PT-5310-CTLFireability-10 7652880 m, 223509 m/sec, 38300165 t fired, .
49 EF DL FNDP 100/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 47781383 t fired, 48 attempts, .

Time elapsed: 101 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
lola: CANCELED task # 31 (type EXCL) for MAPKbis-PT-5310-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 105/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 50201283 t fired, 51 attempts, .

Time elapsed: 106 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
lola: LAUNCH task # 22 (type EXCL) for 21 MAPKbis-PT-5310-CTLFireability-07
lola: time limit : 3494 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 5/3494 6/32 MAPKbis-PT-5310-CTLFireability-07 1231015 m, 246203 m/sec, 6764689 t fired, .
49 EF DL FNDP 110/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 52621415 t fired, 53 attempts, .

Time elapsed: 111 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 10/3494 10/32 MAPKbis-PT-5310-CTLFireability-07 2300266 m, 213850 m/sec, 12943624 t fired, .
49 EF DL FNDP 115/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 55043124 t fired, 56 attempts, .

Time elapsed: 116 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 15/3494 14/32 MAPKbis-PT-5310-CTLFireability-07 3301998 m, 200346 m/sec, 18831763 t fired, .
49 EF DL FNDP 120/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 57455979 t fired, 58 attempts, .

Time elapsed: 121 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 20/3494 18/32 MAPKbis-PT-5310-CTLFireability-07 4267518 m, 193104 m/sec, 24558608 t fired, .
49 EF DL FNDP 125/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 59868434 t fired, 60 attempts, .

Time elapsed: 126 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 25/3494 22/32 MAPKbis-PT-5310-CTLFireability-07 5209959 m, 188488 m/sec, 30215336 t fired, .
49 EF DL FNDP 130/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 62289511 t fired, 63 attempts, .

Time elapsed: 131 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 30/3494 26/32 MAPKbis-PT-5310-CTLFireability-07 6130524 m, 184113 m/sec, 35787222 t fired, .
49 EF DL FNDP 135/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 64709733 t fired, 65 attempts, .

Time elapsed: 136 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 35/3494 30/32 MAPKbis-PT-5310-CTLFireability-07 7035623 m, 181019 m/sec, 41280933 t fired, .
49 EF DL FNDP 140/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 67127951 t fired, 68 attempts, .

Time elapsed: 141 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
lola: CANCELED task # 22 (type EXCL) for MAPKbis-PT-5310-CTLFireability-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 145/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 69539019 t fired, 70 attempts, .

Time elapsed: 146 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 150/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 71957046 t fired, 72 attempts, .

Time elapsed: 151 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 155/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 74374336 t fired, 75 attempts, .

Time elapsed: 156 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 160/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 76795274 t fired, 77 attempts, .

Time elapsed: 161 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 165/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 79207782 t fired, 80 attempts, .

Time elapsed: 166 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 170/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 81628111 t fired, 82 attempts, .

Time elapsed: 171 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 175/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 84048110 t fired, 85 attempts, .

Time elapsed: 176 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 180/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 86456515 t fired, 87 attempts, .

Time elapsed: 181 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 185/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 88861037 t fired, 89 attempts, .

Time elapsed: 186 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 190/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 91278611 t fired, 92 attempts, .

Time elapsed: 191 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 195/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 93697548 t fired, 94 attempts, .

Time elapsed: 196 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 200/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 96112735 t fired, 97 attempts, .

Time elapsed: 201 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 205/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 98530806 t fired, 99 attempts, .

Time elapsed: 206 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 210/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 100946098 t fired, 101 attempts, .

Time elapsed: 211 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 215/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 103365406 t fired, 104 attempts, .

Time elapsed: 216 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 220/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 105782517 t fired, 106 attempts, .

Time elapsed: 221 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 225/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 108205172 t fired, 109 attempts, .

Time elapsed: 226 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 230/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 110622694 t fired, 111 attempts, .

Time elapsed: 231 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 235/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 113041984 t fired, 114 attempts, .

Time elapsed: 236 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 240/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 115462435 t fired, 116 attempts, .

Time elapsed: 241 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 245/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 117878372 t fired, 118 attempts, .

Time elapsed: 246 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 250/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 120297609 t fired, 121 attempts, .

Time elapsed: 251 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 255/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 122719368 t fired, 123 attempts, .

Time elapsed: 256 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 260/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 125134754 t fired, 126 attempts, .

Time elapsed: 261 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 265/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 127554586 t fired, 128 attempts, .

Time elapsed: 266 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 270/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 129975708 t fired, 130 attempts, .

Time elapsed: 271 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 275/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 132403986 t fired, 133 attempts, .

Time elapsed: 276 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 280/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 134838578 t fired, 135 attempts, .

Time elapsed: 281 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 285/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 137270782 t fired, 138 attempts, .

Time elapsed: 286 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 290/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 139681389 t fired, 140 attempts, .

Time elapsed: 291 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 295/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 142065775 t fired, 143 attempts, .

Time elapsed: 296 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 300/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 144416640 t fired, 145 attempts, .

Time elapsed: 301 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 305/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 146764629 t fired, 147 attempts, .

Time elapsed: 306 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 310/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 149115612 t fired, 150 attempts, .

Time elapsed: 311 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 315/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 151478575 t fired, 152 attempts, .

Time elapsed: 316 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 320/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 153814130 t fired, 154 attempts, .

Time elapsed: 321 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 325/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 156137020 t fired, 157 attempts, .

Time elapsed: 326 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 330/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 158469540 t fired, 159 attempts, .

Time elapsed: 331 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 335/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 160805671 t fired, 161 attempts, .

Time elapsed: 336 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 340/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 163164592 t fired, 164 attempts, .

Time elapsed: 341 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 345/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 165483447 t fired, 166 attempts, .

Time elapsed: 346 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 350/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 167765560 t fired, 168 attempts, .

Time elapsed: 351 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 355/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 170146536 t fired, 171 attempts, .

Time elapsed: 356 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 360/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 172505619 t fired, 173 attempts, .

Time elapsed: 361 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 365/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 174913530 t fired, 175 attempts, .

Time elapsed: 366 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 370/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 177312983 t fired, 178 attempts, .

Time elapsed: 371 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 375/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 179718198 t fired, 180 attempts, .

Time elapsed: 376 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 380/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 182139128 t fired, 183 attempts, .

Time elapsed: 381 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 385/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 184553409 t fired, 185 attempts, .

Time elapsed: 386 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 390/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 186980951 t fired, 187 attempts, .

Time elapsed: 391 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 395/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 189409067 t fired, 190 attempts, .

Time elapsed: 396 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 400/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 191832497 t fired, 192 attempts, .

Time elapsed: 401 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 405/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 194249389 t fired, 195 attempts, .

Time elapsed: 406 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 410/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 196667940 t fired, 197 attempts, .

Time elapsed: 411 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 415/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 199093749 t fired, 200 attempts, .

Time elapsed: 416 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 420/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 201517172 t fired, 202 attempts, .

Time elapsed: 421 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 425/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 203941708 t fired, 204 attempts, .

Time elapsed: 426 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 430/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 206367609 t fired, 207 attempts, .

Time elapsed: 431 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 435/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 208790948 t fired, 209 attempts, .

Time elapsed: 436 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 440/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 211221487 t fired, 212 attempts, .

Time elapsed: 441 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 445/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 213648231 t fired, 214 attempts, .

Time elapsed: 446 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 450/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 216076846 t fired, 217 attempts, .

Time elapsed: 451 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 455/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 218504244 t fired, 219 attempts, .

Time elapsed: 456 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 460/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 220938714 t fired, 221 attempts, .

Time elapsed: 461 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 465/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 223371144 t fired, 224 attempts, .

Time elapsed: 466 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 470/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 225800475 t fired, 226 attempts, .

Time elapsed: 471 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 475/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 228228106 t fired, 229 attempts, .

Time elapsed: 476 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 480/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 230657886 t fired, 231 attempts, .

Time elapsed: 481 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 485/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 233085425 t fired, 234 attempts, .

Time elapsed: 486 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 490/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 235516040 t fired, 236 attempts, .

Time elapsed: 491 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 495/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 237948247 t fired, 238 attempts, .

Time elapsed: 496 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 500/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 240380540 t fired, 241 attempts, .

Time elapsed: 501 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 505/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 242813830 t fired, 243 attempts, .

Time elapsed: 506 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 510/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 245242895 t fired, 246 attempts, .

Time elapsed: 511 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 515/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 247670912 t fired, 248 attempts, .

Time elapsed: 516 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 520/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 250097232 t fired, 251 attempts, .

Time elapsed: 521 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 525/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 252527181 t fired, 253 attempts, .

Time elapsed: 526 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 530/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 254953539 t fired, 255 attempts, .

Time elapsed: 531 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 535/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 257387256 t fired, 258 attempts, .

Time elapsed: 536 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 540/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 259817855 t fired, 260 attempts, .

Time elapsed: 541 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 545/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 262250694 t fired, 263 attempts, .

Time elapsed: 546 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 550/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 264676451 t fired, 265 attempts, .

Time elapsed: 551 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 555/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 267103556 t fired, 268 attempts, .

Time elapsed: 556 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 560/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 269533200 t fired, 270 attempts, .

Time elapsed: 561 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 565/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 271965379 t fired, 272 attempts, .

Time elapsed: 566 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 570/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 274393082 t fired, 275 attempts, .

Time elapsed: 571 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 575/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 276820852 t fired, 277 attempts, .

Time elapsed: 576 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 580/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 279248354 t fired, 280 attempts, .

Time elapsed: 581 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 585/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 281674732 t fired, 282 attempts, .

Time elapsed: 586 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 590/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 284104955 t fired, 285 attempts, .

Time elapsed: 591 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 595/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 286538050 t fired, 287 attempts, .

Time elapsed: 596 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 600/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 288965118 t fired, 289 attempts, .

Time elapsed: 601 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 605/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 291391323 t fired, 292 attempts, .

Time elapsed: 606 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 610/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 293824694 t fired, 294 attempts, .

Time elapsed: 611 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 615/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 296255346 t fired, 297 attempts, .

Time elapsed: 616 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 620/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 298687870 t fired, 299 attempts, .

Time elapsed: 621 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 625/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 301113820 t fired, 302 attempts, .

Time elapsed: 626 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 630/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 303542437 t fired, 304 attempts, .

Time elapsed: 631 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 635/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 305969277 t fired, 306 attempts, .

Time elapsed: 636 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 640/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 308392173 t fired, 309 attempts, .

Time elapsed: 641 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 645/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 310824092 t fired, 311 attempts, .

Time elapsed: 646 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 650/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 313244379 t fired, 314 attempts, .

Time elapsed: 651 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 655/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 315667052 t fired, 316 attempts, .

Time elapsed: 656 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 660/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 318087788 t fired, 319 attempts, .

Time elapsed: 661 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 665/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 320509351 t fired, 321 attempts, .

Time elapsed: 666 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 670/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 322937653 t fired, 323 attempts, .

Time elapsed: 671 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 675/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 325367543 t fired, 326 attempts, .

Time elapsed: 676 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 680/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 327783899 t fired, 328 attempts, .

Time elapsed: 681 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 685/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 330207902 t fired, 331 attempts, .

Time elapsed: 686 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 690/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 332636104 t fired, 333 attempts, .

Time elapsed: 691 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 695/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 335063526 t fired, 336 attempts, .

Time elapsed: 696 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 700/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 337487093 t fired, 338 attempts, .

Time elapsed: 701 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 705/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 339916727 t fired, 340 attempts, .

Time elapsed: 706 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 710/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 342346767 t fired, 343 attempts, .

Time elapsed: 711 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 715/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 344778385 t fired, 345 attempts, .

Time elapsed: 716 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 720/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 347201938 t fired, 348 attempts, .

Time elapsed: 721 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 725/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 349630128 t fired, 350 attempts, .

Time elapsed: 726 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 730/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 352053952 t fired, 353 attempts, .

Time elapsed: 731 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 735/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 354480461 t fired, 355 attempts, .

Time elapsed: 736 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 740/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 356896858 t fired, 357 attempts, .

Time elapsed: 741 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 745/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 359317274 t fired, 360 attempts, .

Time elapsed: 746 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 750/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 361738502 t fired, 362 attempts, .

Time elapsed: 751 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 755/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 364164005 t fired, 365 attempts, .

Time elapsed: 756 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 760/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 366584549 t fired, 367 attempts, .

Time elapsed: 761 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 765/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 369009287 t fired, 370 attempts, .

Time elapsed: 766 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 770/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 371435858 t fired, 372 attempts, .

Time elapsed: 771 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 775/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 373861923 t fired, 374 attempts, .

Time elapsed: 776 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 780/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 376292235 t fired, 377 attempts, .

Time elapsed: 781 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 785/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 378711955 t fired, 379 attempts, .

Time elapsed: 786 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 790/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 381141143 t fired, 382 attempts, .

Time elapsed: 791 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 795/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 383561223 t fired, 384 attempts, .

Time elapsed: 796 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 800/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 385984772 t fired, 386 attempts, .

Time elapsed: 801 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 805/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 388409496 t fired, 389 attempts, .

Time elapsed: 806 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 810/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 390833309 t fired, 391 attempts, .

Time elapsed: 811 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 815/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 393260484 t fired, 394 attempts, .

Time elapsed: 816 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 820/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 395681568 t fired, 396 attempts, .

Time elapsed: 821 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 825/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 398104229 t fired, 399 attempts, .

Time elapsed: 826 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 830/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 400527684 t fired, 401 attempts, .

Time elapsed: 831 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 835/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 402953737 t fired, 403 attempts, .

Time elapsed: 836 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 840/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 405380917 t fired, 406 attempts, .

Time elapsed: 841 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 845/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 407801670 t fired, 408 attempts, .

Time elapsed: 846 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 850/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 410226276 t fired, 411 attempts, .

Time elapsed: 851 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 855/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 412652817 t fired, 413 attempts, .

Time elapsed: 856 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 860/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 415083307 t fired, 416 attempts, .

Time elapsed: 861 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 865/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 417514919 t fired, 418 attempts, .

Time elapsed: 866 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 870/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 419942396 t fired, 420 attempts, .

Time elapsed: 871 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 875/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 422368247 t fired, 423 attempts, .

Time elapsed: 876 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 880/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 424793590 t fired, 425 attempts, .

Time elapsed: 881 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 885/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 427221684 t fired, 428 attempts, .

Time elapsed: 886 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 890/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 429654262 t fired, 430 attempts, .

Time elapsed: 891 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 895/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 432078155 t fired, 433 attempts, .

Time elapsed: 896 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 900/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 434509223 t fired, 435 attempts, .

Time elapsed: 901 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 905/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 436937368 t fired, 437 attempts, .

Time elapsed: 906 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 910/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 439368548 t fired, 440 attempts, .

Time elapsed: 911 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 915/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 441796108 t fired, 442 attempts, .

Time elapsed: 916 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 920/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 444223210 t fired, 445 attempts, .

Time elapsed: 921 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 925/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 446653445 t fired, 447 attempts, .

Time elapsed: 926 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 930/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 449079731 t fired, 450 attempts, .

Time elapsed: 931 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 935/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 451507722 t fired, 452 attempts, .

Time elapsed: 936 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 940/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 453934181 t fired, 454 attempts, .

Time elapsed: 941 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 945/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 456367716 t fired, 457 attempts, .

Time elapsed: 946 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 950/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 458801092 t fired, 459 attempts, .

Time elapsed: 951 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 955/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 461229920 t fired, 462 attempts, .

Time elapsed: 956 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 960/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 463661758 t fired, 464 attempts, .

Time elapsed: 961 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 965/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 466090811 t fired, 467 attempts, .

Time elapsed: 966 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 970/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 468521267 t fired, 469 attempts, .

Time elapsed: 971 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 975/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 470950585 t fired, 471 attempts, .

Time elapsed: 976 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 980/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 473374991 t fired, 474 attempts, .

Time elapsed: 981 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 985/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 475802858 t fired, 476 attempts, .

Time elapsed: 986 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 990/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 478226196 t fired, 479 attempts, .

Time elapsed: 991 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 995/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 480657304 t fired, 481 attempts, .

Time elapsed: 996 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1000/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 483078404 t fired, 484 attempts, .

Time elapsed: 1001 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1005/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 485507555 t fired, 486 attempts, .

Time elapsed: 1006 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1010/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 487930076 t fired, 488 attempts, .

Time elapsed: 1011 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1015/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 490351892 t fired, 491 attempts, .

Time elapsed: 1016 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1020/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 492778730 t fired, 493 attempts, .

Time elapsed: 1021 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1025/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 495205932 t fired, 496 attempts, .

Time elapsed: 1026 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1030/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 497634442 t fired, 498 attempts, .

Time elapsed: 1031 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1035/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 500063474 t fired, 501 attempts, .

Time elapsed: 1036 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1040/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 502496088 t fired, 503 attempts, .

Time elapsed: 1041 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1045/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 504922755 t fired, 505 attempts, .

Time elapsed: 1046 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1050/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 507352725 t fired, 508 attempts, .

Time elapsed: 1051 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1055/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 509781527 t fired, 510 attempts, .

Time elapsed: 1056 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1060/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 512213755 t fired, 513 attempts, .

Time elapsed: 1061 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1065/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 514640281 t fired, 515 attempts, .

Time elapsed: 1066 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1070/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 517067133 t fired, 518 attempts, .

Time elapsed: 1071 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1075/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 519500354 t fired, 520 attempts, .

Time elapsed: 1076 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1080/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 521924216 t fired, 522 attempts, .

Time elapsed: 1081 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1085/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 524353147 t fired, 525 attempts, .

Time elapsed: 1086 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1090/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 526787465 t fired, 527 attempts, .

Time elapsed: 1091 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1095/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 529220316 t fired, 530 attempts, .

Time elapsed: 1096 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1100/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 531651346 t fired, 532 attempts, .

Time elapsed: 1101 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1105/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 534079586 t fired, 535 attempts, .

Time elapsed: 1106 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1110/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 536502363 t fired, 537 attempts, .

Time elapsed: 1111 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1115/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 538929414 t fired, 539 attempts, .

Time elapsed: 1116 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1120/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 541352827 t fired, 542 attempts, .

Time elapsed: 1121 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1125/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 543778733 t fired, 544 attempts, .

Time elapsed: 1126 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1130/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 546210068 t fired, 547 attempts, .

Time elapsed: 1131 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1135/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 548636383 t fired, 549 attempts, .

Time elapsed: 1136 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1140/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 551057232 t fired, 552 attempts, .

Time elapsed: 1141 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1145/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 553485598 t fired, 554 attempts, .

Time elapsed: 1146 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1150/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 555913012 t fired, 556 attempts, .

Time elapsed: 1151 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1155/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 558341787 t fired, 559 attempts, .

Time elapsed: 1156 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1160/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 560763859 t fired, 561 attempts, .

Time elapsed: 1161 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1165/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 563190499 t fired, 564 attempts, .

Time elapsed: 1166 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1170/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 565614971 t fired, 566 attempts, .

Time elapsed: 1171 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1175/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 568041259 t fired, 569 attempts, .

Time elapsed: 1176 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1180/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 570469982 t fired, 571 attempts, .

Time elapsed: 1181 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1185/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 572891740 t fired, 573 attempts, .

Time elapsed: 1186 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1190/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 575319299 t fired, 576 attempts, .

Time elapsed: 1191 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1195/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 577741923 t fired, 578 attempts, .

Time elapsed: 1196 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1200/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 580169875 t fired, 581 attempts, .

Time elapsed: 1201 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1205/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 582606572 t fired, 583 attempts, .

Time elapsed: 1206 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1210/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 585053947 t fired, 586 attempts, .

Time elapsed: 1211 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1215/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 587551000 t fired, 588 attempts, .

Time elapsed: 1216 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1220/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 590051186 t fired, 591 attempts, .

Time elapsed: 1221 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1225/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 592549642 t fired, 593 attempts, .

Time elapsed: 1226 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1230/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 595043958 t fired, 596 attempts, .

Time elapsed: 1231 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1235/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 597546265 t fired, 598 attempts, .

Time elapsed: 1236 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1240/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 599937799 t fired, 600 attempts, .

Time elapsed: 1241 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1245/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 602340530 t fired, 603 attempts, .

Time elapsed: 1246 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1250/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 604831997 t fired, 605 attempts, .

Time elapsed: 1251 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1255/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 607326477 t fired, 608 attempts, .

Time elapsed: 1256 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1260/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 609819151 t fired, 610 attempts, .

Time elapsed: 1261 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1265/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 612320119 t fired, 613 attempts, .

Time elapsed: 1266 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1270/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 614810561 t fired, 615 attempts, .

Time elapsed: 1271 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1275/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 617309756 t fired, 618 attempts, .

Time elapsed: 1276 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1280/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 619790519 t fired, 620 attempts, .

Time elapsed: 1281 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1285/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 622252712 t fired, 623 attempts, .

Time elapsed: 1286 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1290/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 624717941 t fired, 625 attempts, .

Time elapsed: 1291 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1295/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 627147912 t fired, 628 attempts, .

Time elapsed: 1296 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1300/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 629592600 t fired, 630 attempts, .

Time elapsed: 1301 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1305/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 632080008 t fired, 633 attempts, .

Time elapsed: 1306 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1310/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 634539922 t fired, 635 attempts, .

Time elapsed: 1311 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1315/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 636979767 t fired, 637 attempts, .

Time elapsed: 1316 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1320/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 639421699 t fired, 640 attempts, .

Time elapsed: 1321 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1325/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 641860030 t fired, 642 attempts, .

Time elapsed: 1326 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1330/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 644297591 t fired, 645 attempts, .

Time elapsed: 1331 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1335/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 646735314 t fired, 647 attempts, .

Time elapsed: 1336 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1340/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 649174588 t fired, 650 attempts, .

Time elapsed: 1341 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1345/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 651619377 t fired, 652 attempts, .

Time elapsed: 1346 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1350/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 654061028 t fired, 655 attempts, .

Time elapsed: 1351 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1355/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 656503116 t fired, 657 attempts, .

Time elapsed: 1356 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1360/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 658944558 t fired, 659 attempts, .

Time elapsed: 1361 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1365/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 661388247 t fired, 662 attempts, .

Time elapsed: 1366 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1370/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 663827088 t fired, 664 attempts, .

Time elapsed: 1371 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1375/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 666262696 t fired, 667 attempts, .

Time elapsed: 1376 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1380/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 668702369 t fired, 669 attempts, .

Time elapsed: 1381 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1385/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 671136319 t fired, 672 attempts, .

Time elapsed: 1386 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1390/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 673581202 t fired, 674 attempts, .

Time elapsed: 1391 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1395/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 676019934 t fired, 677 attempts, .

Time elapsed: 1396 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1400/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 678463891 t fired, 679 attempts, .

Time elapsed: 1401 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1405/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 680909984 t fired, 681 attempts, .

Time elapsed: 1406 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1410/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 683355911 t fired, 684 attempts, .

Time elapsed: 1411 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1415/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 685790422 t fired, 686 attempts, .

Time elapsed: 1416 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1420/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 688218597 t fired, 689 attempts, .

Time elapsed: 1421 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1425/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 690640246 t fired, 691 attempts, .

Time elapsed: 1426 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1430/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 693070037 t fired, 694 attempts, .

Time elapsed: 1431 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1435/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 695497676 t fired, 696 attempts, .

Time elapsed: 1436 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1440/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 697930418 t fired, 698 attempts, .

Time elapsed: 1441 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1445/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 700360324 t fired, 701 attempts, .

Time elapsed: 1446 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1450/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 702784755 t fired, 703 attempts, .

Time elapsed: 1451 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1455/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 705212934 t fired, 706 attempts, .

Time elapsed: 1456 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1460/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 707643010 t fired, 708 attempts, .

Time elapsed: 1461 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1465/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 710072745 t fired, 711 attempts, .

Time elapsed: 1466 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1470/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 712501766 t fired, 713 attempts, .

Time elapsed: 1471 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1475/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 714930172 t fired, 715 attempts, .

Time elapsed: 1476 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1480/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 717355758 t fired, 718 attempts, .

Time elapsed: 1481 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1485/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 719786603 t fired, 720 attempts, .

Time elapsed: 1486 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1490/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 722213477 t fired, 723 attempts, .

Time elapsed: 1491 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1495/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 724639398 t fired, 725 attempts, .

Time elapsed: 1496 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1500/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 727066696 t fired, 728 attempts, .

Time elapsed: 1501 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1505/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 729493149 t fired, 730 attempts, .

Time elapsed: 1506 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1510/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 731921833 t fired, 732 attempts, .

Time elapsed: 1511 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1515/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 734347651 t fired, 735 attempts, .

Time elapsed: 1516 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1520/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 736774119 t fired, 737 attempts, .

Time elapsed: 1521 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1525/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 739199004 t fired, 740 attempts, .

Time elapsed: 1526 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1530/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 741629971 t fired, 742 attempts, .

Time elapsed: 1531 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1535/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 744053318 t fired, 745 attempts, .

Time elapsed: 1536 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1540/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 746476488 t fired, 747 attempts, .

Time elapsed: 1541 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1545/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 748905751 t fired, 749 attempts, .

Time elapsed: 1546 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1550/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 751330284 t fired, 752 attempts, .

Time elapsed: 1551 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1555/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 753755133 t fired, 754 attempts, .

Time elapsed: 1556 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1560/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 756181649 t fired, 757 attempts, .

Time elapsed: 1561 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1565/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 758607113 t fired, 759 attempts, .

Time elapsed: 1566 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1570/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 761036638 t fired, 762 attempts, .

Time elapsed: 1571 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1575/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 763463647 t fired, 764 attempts, .

Time elapsed: 1576 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1580/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 765888975 t fired, 766 attempts, .

Time elapsed: 1581 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1585/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 768315759 t fired, 769 attempts, .

Time elapsed: 1586 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1590/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 770741502 t fired, 771 attempts, .

Time elapsed: 1591 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1595/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 773165893 t fired, 774 attempts, .

Time elapsed: 1596 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1600/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 775592584 t fired, 776 attempts, .

Time elapsed: 1601 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1605/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 778015511 t fired, 779 attempts, .

Time elapsed: 1606 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1610/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 780439883 t fired, 781 attempts, .

Time elapsed: 1611 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1615/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 782869722 t fired, 783 attempts, .

Time elapsed: 1616 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1620/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 785297226 t fired, 786 attempts, .

Time elapsed: 1621 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1625/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 787723029 t fired, 788 attempts, .

Time elapsed: 1626 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1630/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 790152138 t fired, 791 attempts, .

Time elapsed: 1631 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1635/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 792579477 t fired, 793 attempts, .

Time elapsed: 1636 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1640/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 795004557 t fired, 796 attempts, .

Time elapsed: 1641 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1645/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 797431985 t fired, 798 attempts, .

Time elapsed: 1646 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1650/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 799858090 t fired, 800 attempts, .

Time elapsed: 1651 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1655/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 802281908 t fired, 803 attempts, .

Time elapsed: 1656 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1660/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 804710229 t fired, 805 attempts, .

Time elapsed: 1661 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1665/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 807160007 t fired, 808 attempts, .

Time elapsed: 1666 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1670/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 809655668 t fired, 810 attempts, .

Time elapsed: 1671 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1675/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 812159800 t fired, 813 attempts, .

Time elapsed: 1676 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1680/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 814658434 t fired, 815 attempts, .

Time elapsed: 1681 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1685/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 817153530 t fired, 818 attempts, .

Time elapsed: 1686 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1690/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 819650698 t fired, 820 attempts, .

Time elapsed: 1691 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1695/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 822145507 t fired, 823 attempts, .

Time elapsed: 1696 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1700/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 824638794 t fired, 825 attempts, .

Time elapsed: 1701 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1705/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 827131217 t fired, 828 attempts, .

Time elapsed: 1706 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1710/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 829625190 t fired, 830 attempts, .

Time elapsed: 1711 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1715/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 832126225 t fired, 833 attempts, .

Time elapsed: 1716 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1720/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 834621493 t fired, 835 attempts, .

Time elapsed: 1721 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1725/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 837111753 t fired, 838 attempts, .

Time elapsed: 1726 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1730/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 839607920 t fired, 840 attempts, .

Time elapsed: 1731 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1735/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 842101595 t fired, 843 attempts, .

Time elapsed: 1736 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1740/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 844595368 t fired, 845 attempts, .

Time elapsed: 1741 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1745/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 847088087 t fired, 848 attempts, .

Time elapsed: 1746 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1750/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 849579583 t fired, 850 attempts, .

Time elapsed: 1751 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1755/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 852068548 t fired, 853 attempts, .

Time elapsed: 1756 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1760/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 854559821 t fired, 855 attempts, .

Time elapsed: 1761 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1765/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 857060088 t fired, 858 attempts, .

Time elapsed: 1766 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1770/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 859550542 t fired, 860 attempts, .

Time elapsed: 1771 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1775/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 862042783 t fired, 863 attempts, .

Time elapsed: 1776 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1780/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 864534192 t fired, 865 attempts, .

Time elapsed: 1781 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1785/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 867029690 t fired, 868 attempts, .

Time elapsed: 1786 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1790/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 869521322 t fired, 870 attempts, .

Time elapsed: 1791 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1795/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 872012474 t fired, 873 attempts, .

Time elapsed: 1796 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1800/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 874509067 t fired, 875 attempts, .

Time elapsed: 1801 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1805/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 876997905 t fired, 877 attempts, .

Time elapsed: 1806 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1810/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 879495051 t fired, 880 attempts, .

Time elapsed: 1811 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1815/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 881996104 t fired, 882 attempts, .

Time elapsed: 1816 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1820/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 884494504 t fired, 885 attempts, .

Time elapsed: 1821 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1825/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 886992538 t fired, 887 attempts, .

Time elapsed: 1826 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1830/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 889491308 t fired, 890 attempts, .

Time elapsed: 1831 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1835/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 891992714 t fired, 892 attempts, .

Time elapsed: 1836 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1840/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 894489214 t fired, 895 attempts, .

Time elapsed: 1841 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1845/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 896982169 t fired, 897 attempts, .

Time elapsed: 1846 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1850/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 899475166 t fired, 900 attempts, .

Time elapsed: 1851 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1855/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 901919149 t fired, 902 attempts, .

Time elapsed: 1856 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1860/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 904345566 t fired, 905 attempts, .

Time elapsed: 1861 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1865/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 906775445 t fired, 907 attempts, .

Time elapsed: 1866 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1870/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 909198902 t fired, 910 attempts, .

Time elapsed: 1871 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1875/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 911621986 t fired, 912 attempts, .

Time elapsed: 1876 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1880/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 914054201 t fired, 915 attempts, .

Time elapsed: 1881 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1885/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 916482825 t fired, 917 attempts, .

Time elapsed: 1886 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1890/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 918914752 t fired, 919 attempts, .

Time elapsed: 1891 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1895/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 921337101 t fired, 922 attempts, .

Time elapsed: 1896 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1900/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 923765630 t fired, 924 attempts, .

Time elapsed: 1901 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1905/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 926194653 t fired, 927 attempts, .

Time elapsed: 1906 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1910/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 928624657 t fired, 929 attempts, .

Time elapsed: 1911 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1915/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 931054062 t fired, 932 attempts, .

Time elapsed: 1916 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1920/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 933484269 t fired, 934 attempts, .

Time elapsed: 1921 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1925/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 935908110 t fired, 936 attempts, .

Time elapsed: 1926 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1930/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 938326283 t fired, 939 attempts, .

Time elapsed: 1931 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1935/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 940739649 t fired, 941 attempts, .

Time elapsed: 1936 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1940/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 943165311 t fired, 944 attempts, .

Time elapsed: 1941 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1945/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 945582542 t fired, 946 attempts, .

Time elapsed: 1946 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1950/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 948010966 t fired, 949 attempts, .

Time elapsed: 1951 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1955/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 950440976 t fired, 951 attempts, .

Time elapsed: 1956 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1960/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 952864202 t fired, 953 attempts, .

Time elapsed: 1961 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1965/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 955296268 t fired, 956 attempts, .

Time elapsed: 1966 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1970/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 957717926 t fired, 958 attempts, .

Time elapsed: 1971 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1975/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 960144989 t fired, 961 attempts, .

Time elapsed: 1976 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1980/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 962561273 t fired, 963 attempts, .

Time elapsed: 1981 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1985/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 964985676 t fired, 965 attempts, .

Time elapsed: 1986 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1990/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 967416698 t fired, 968 attempts, .

Time elapsed: 1991 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 1995/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 969842908 t fired, 970 attempts, .

Time elapsed: 1996 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2000/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 972271530 t fired, 973 attempts, .

Time elapsed: 2001 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2005/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 974693224 t fired, 975 attempts, .

Time elapsed: 2006 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2010/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 977111990 t fired, 978 attempts, .

Time elapsed: 2011 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2015/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 979560718 t fired, 980 attempts, .

Time elapsed: 2016 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2020/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 981994467 t fired, 982 attempts, .

Time elapsed: 2021 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2025/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 984422808 t fired, 985 attempts, .

Time elapsed: 2026 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2030/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 986850471 t fired, 987 attempts, .

Time elapsed: 2031 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2035/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 989282903 t fired, 990 attempts, .

Time elapsed: 2036 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2040/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 991713125 t fired, 992 attempts, .

Time elapsed: 2041 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2045/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 994139021 t fired, 995 attempts, .

Time elapsed: 2046 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2050/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 996567183 t fired, 997 attempts, .

Time elapsed: 2051 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2055/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 999002616 t fired, 1000 attempts, .

Time elapsed: 2056 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2060/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1001437244 t fired, 1002 attempts, .

Time elapsed: 2061 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2065/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1003867387 t fired, 1004 attempts, .

Time elapsed: 2066 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2070/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1006303684 t fired, 1007 attempts, .

Time elapsed: 2071 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2075/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1008734563 t fired, 1009 attempts, .

Time elapsed: 2076 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2080/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1011168562 t fired, 1012 attempts, .

Time elapsed: 2081 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2085/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1013609384 t fired, 1014 attempts, .

Time elapsed: 2086 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2090/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1016039851 t fired, 1017 attempts, .

Time elapsed: 2091 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2095/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1018468383 t fired, 1019 attempts, .

Time elapsed: 2096 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2100/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1020898357 t fired, 1021 attempts, .

Time elapsed: 2101 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2105/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1023323683 t fired, 1024 attempts, .

Time elapsed: 2106 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2110/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1025756672 t fired, 1026 attempts, .

Time elapsed: 2111 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2115/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1028186951 t fired, 1029 attempts, .

Time elapsed: 2116 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2120/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1030609200 t fired, 1031 attempts, .

Time elapsed: 2121 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2125/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1033034671 t fired, 1034 attempts, .

Time elapsed: 2126 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2130/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1035464203 t fired, 1036 attempts, .

Time elapsed: 2131 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2135/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1037893581 t fired, 1038 attempts, .

Time elapsed: 2136 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2140/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1040320904 t fired, 1041 attempts, .

Time elapsed: 2141 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2145/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1042754037 t fired, 1043 attempts, .

Time elapsed: 2146 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2150/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1045181683 t fired, 1046 attempts, .

Time elapsed: 2151 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2155/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1047609837 t fired, 1048 attempts, .

Time elapsed: 2156 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2160/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1050108543 t fired, 1051 attempts, .

Time elapsed: 2161 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2165/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1052532487 t fired, 1053 attempts, .

Time elapsed: 2166 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2170/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1054961254 t fired, 1055 attempts, .

Time elapsed: 2171 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2175/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1057391322 t fired, 1058 attempts, .

Time elapsed: 2176 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2180/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1059816861 t fired, 1060 attempts, .

Time elapsed: 2181 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2185/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1062244744 t fired, 1063 attempts, .

Time elapsed: 2186 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2190/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1064679581 t fired, 1065 attempts, .

Time elapsed: 2191 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2195/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1067113126 t fired, 1068 attempts, .

Time elapsed: 2196 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2200/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1069541677 t fired, 1070 attempts, .

Time elapsed: 2201 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2205/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1071968663 t fired, 1072 attempts, .

Time elapsed: 2206 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2210/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1074395023 t fired, 1075 attempts, .

Time elapsed: 2211 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2215/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1076823012 t fired, 1077 attempts, .

Time elapsed: 2216 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2220/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1079283182 t fired, 1080 attempts, .

Time elapsed: 2221 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2225/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1081707559 t fired, 1082 attempts, .

Time elapsed: 2226 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2230/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1084133837 t fired, 1085 attempts, .

Time elapsed: 2231 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2235/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1086561939 t fired, 1087 attempts, .

Time elapsed: 2236 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2240/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1088992693 t fired, 1089 attempts, .

Time elapsed: 2241 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2245/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1091419918 t fired, 1092 attempts, .

Time elapsed: 2246 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2250/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1093853904 t fired, 1094 attempts, .

Time elapsed: 2251 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2255/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1096283220 t fired, 1097 attempts, .

Time elapsed: 2256 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2260/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1098711985 t fired, 1099 attempts, .

Time elapsed: 2261 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2265/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1101138154 t fired, 1102 attempts, .

Time elapsed: 2266 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2270/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1103570209 t fired, 1104 attempts, .

Time elapsed: 2271 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2275/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1106002489 t fired, 1107 attempts, .

Time elapsed: 2276 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2280/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1108468129 t fired, 1109 attempts, .

Time elapsed: 2281 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2285/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1110896074 t fired, 1111 attempts, .

Time elapsed: 2286 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2290/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1113325060 t fired, 1114 attempts, .

Time elapsed: 2291 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2295/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1115749396 t fired, 1116 attempts, .

Time elapsed: 2296 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2300/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1118181352 t fired, 1119 attempts, .

Time elapsed: 2301 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2305/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1120610479 t fired, 1121 attempts, .

Time elapsed: 2306 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2310/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1123039287 t fired, 1124 attempts, .

Time elapsed: 2311 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2315/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1125464066 t fired, 1126 attempts, .

Time elapsed: 2316 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2320/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1127892054 t fired, 1128 attempts, .

Time elapsed: 2321 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2325/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1130315981 t fired, 1131 attempts, .

Time elapsed: 2326 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2330/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1132744195 t fired, 1133 attempts, .

Time elapsed: 2331 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2335/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1135176289 t fired, 1136 attempts, .

Time elapsed: 2336 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2340/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1137599477 t fired, 1138 attempts, .

Time elapsed: 2341 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2345/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1140024344 t fired, 1141 attempts, .

Time elapsed: 2346 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2350/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1142473455 t fired, 1143 attempts, .

Time elapsed: 2351 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2355/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1144911854 t fired, 1145 attempts, .

Time elapsed: 2356 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2360/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1147347724 t fired, 1148 attempts, .

Time elapsed: 2361 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2365/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1149786354 t fired, 1150 attempts, .

Time elapsed: 2366 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2370/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1152222386 t fired, 1153 attempts, .

Time elapsed: 2371 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2375/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1154659683 t fired, 1155 attempts, .

Time elapsed: 2376 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2380/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1157101746 t fired, 1158 attempts, .

Time elapsed: 2381 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2385/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1159540461 t fired, 1160 attempts, .

Time elapsed: 2386 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2390/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1161977404 t fired, 1162 attempts, .

Time elapsed: 2391 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2395/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1164416517 t fired, 1165 attempts, .

Time elapsed: 2396 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2400/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1166859940 t fired, 1167 attempts, .

Time elapsed: 2401 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2405/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1169292473 t fired, 1170 attempts, .

Time elapsed: 2406 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2410/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1171722578 t fired, 1172 attempts, .

Time elapsed: 2411 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2416/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1174154210 t fired, 1175 attempts, .

Time elapsed: 2417 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2421/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1176587032 t fired, 1177 attempts, .

Time elapsed: 2422 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2426/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1179014640 t fired, 1180 attempts, .

Time elapsed: 2427 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2431/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1181439866 t fired, 1182 attempts, .

Time elapsed: 2432 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2436/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1183870762 t fired, 1184 attempts, .

Time elapsed: 2437 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2441/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1186305921 t fired, 1187 attempts, .

Time elapsed: 2442 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2446/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1188733729 t fired, 1189 attempts, .

Time elapsed: 2447 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2451/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1191158827 t fired, 1192 attempts, .

Time elapsed: 2452 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2456/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1193583560 t fired, 1194 attempts, .

Time elapsed: 2457 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2461/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1196005284 t fired, 1197 attempts, .

Time elapsed: 2462 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2466/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1198430766 t fired, 1199 attempts, .

Time elapsed: 2467 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2471/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1200857176 t fired, 1201 attempts, .

Time elapsed: 2472 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2476/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1203286924 t fired, 1204 attempts, .

Time elapsed: 2477 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2481/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1205732492 t fired, 1206 attempts, .

Time elapsed: 2482 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2486/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1208169843 t fired, 1209 attempts, .

Time elapsed: 2487 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2491/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1210605192 t fired, 1211 attempts, .

Time elapsed: 2492 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2496/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1213032371 t fired, 1214 attempts, .

Time elapsed: 2497 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2501/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1215458128 t fired, 1216 attempts, .

Time elapsed: 2502 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2506/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1217886529 t fired, 1218 attempts, .

Time elapsed: 2507 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2511/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1220315590 t fired, 1221 attempts, .

Time elapsed: 2512 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2516/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1222748062 t fired, 1223 attempts, .

Time elapsed: 2517 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2521/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1225177773 t fired, 1226 attempts, .

Time elapsed: 2522 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2526/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1227602461 t fired, 1228 attempts, .

Time elapsed: 2527 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2531/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1230028272 t fired, 1231 attempts, .

Time elapsed: 2532 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2536/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1232459072 t fired, 1233 attempts, .

Time elapsed: 2537 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2541/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1234903070 t fired, 1235 attempts, .

Time elapsed: 2542 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2546/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1237332162 t fired, 1238 attempts, .

Time elapsed: 2547 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2551/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1239754855 t fired, 1240 attempts, .

Time elapsed: 2552 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2556/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1242182651 t fired, 1243 attempts, .

Time elapsed: 2557 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2561/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1244611008 t fired, 1245 attempts, .

Time elapsed: 2562 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2566/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1247034825 t fired, 1248 attempts, .

Time elapsed: 2567 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2571/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1249466560 t fired, 1250 attempts, .

Time elapsed: 2572 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2576/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1251896894 t fired, 1252 attempts, .

Time elapsed: 2577 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2581/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1254326158 t fired, 1255 attempts, .

Time elapsed: 2582 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2586/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1256762659 t fired, 1257 attempts, .

Time elapsed: 2587 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2591/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1259193674 t fired, 1260 attempts, .

Time elapsed: 2592 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2596/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1261619465 t fired, 1262 attempts, .

Time elapsed: 2597 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2601/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1264065975 t fired, 1265 attempts, .

Time elapsed: 2602 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2606/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1266563090 t fired, 1267 attempts, .

Time elapsed: 2607 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2611/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1269033080 t fired, 1270 attempts, .

Time elapsed: 2612 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2616/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1271527534 t fired, 1272 attempts, .

Time elapsed: 2617 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2621/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1274031594 t fired, 1275 attempts, .

Time elapsed: 2622 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2626/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1276540281 t fired, 1277 attempts, .

Time elapsed: 2627 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2631/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1279039021 t fired, 1280 attempts, .

Time elapsed: 2632 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2636/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1281538687 t fired, 1282 attempts, .

Time elapsed: 2637 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2641/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1284041964 t fired, 1285 attempts, .

Time elapsed: 2642 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2646/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1286538440 t fired, 1287 attempts, .

Time elapsed: 2647 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2651/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1289040034 t fired, 1290 attempts, .

Time elapsed: 2652 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2656/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1291544837 t fired, 1292 attempts, .

Time elapsed: 2657 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2661/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1294045432 t fired, 1295 attempts, .

Time elapsed: 2662 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2666/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1296545198 t fired, 1297 attempts, .

Time elapsed: 2667 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2671/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1299046938 t fired, 1300 attempts, .

Time elapsed: 2672 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2676/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1301544988 t fired, 1302 attempts, .

Time elapsed: 2677 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2681/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1304042379 t fired, 1305 attempts, .

Time elapsed: 2682 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2686/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1306537853 t fired, 1307 attempts, .

Time elapsed: 2687 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2691/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1309036964 t fired, 1310 attempts, .

Time elapsed: 2692 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2696/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1311534488 t fired, 1312 attempts, .

Time elapsed: 2697 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2701/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1314033100 t fired, 1315 attempts, .

Time elapsed: 2702 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2706/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1316529649 t fired, 1317 attempts, .

Time elapsed: 2707 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2711/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1319025959 t fired, 1320 attempts, .

Time elapsed: 2712 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2716/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1321523140 t fired, 1322 attempts, .

Time elapsed: 2717 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2721/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1324025998 t fired, 1325 attempts, .

Time elapsed: 2722 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2726/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1326525016 t fired, 1327 attempts, .

Time elapsed: 2727 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2731/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1329021732 t fired, 1330 attempts, .

Time elapsed: 2732 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2736/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1331518559 t fired, 1332 attempts, .

Time elapsed: 2737 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2741/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1334014499 t fired, 1335 attempts, .

Time elapsed: 2742 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2746/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1336516435 t fired, 1337 attempts, .

Time elapsed: 2747 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2751/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1339022026 t fired, 1340 attempts, .

Time elapsed: 2752 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2756/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1341523756 t fired, 1342 attempts, .

Time elapsed: 2757 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2761/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1344012067 t fired, 1345 attempts, .

Time elapsed: 2762 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2766/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1346502030 t fired, 1347 attempts, .

Time elapsed: 2767 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2771/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1348996051 t fired, 1349 attempts, .

Time elapsed: 2772 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2776/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1351493238 t fired, 1352 attempts, .

Time elapsed: 2777 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2781/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1353988925 t fired, 1354 attempts, .

Time elapsed: 2782 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2786/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1356483353 t fired, 1357 attempts, .

Time elapsed: 2787 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2791/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1358979628 t fired, 1359 attempts, .

Time elapsed: 2792 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2796/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1361477695 t fired, 1362 attempts, .

Time elapsed: 2797 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2801/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1363972816 t fired, 1364 attempts, .

Time elapsed: 2802 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2806/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1366468565 t fired, 1367 attempts, .

Time elapsed: 2807 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2811/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1368970954 t fired, 1369 attempts, .

Time elapsed: 2812 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2816/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1371468966 t fired, 1372 attempts, .

Time elapsed: 2817 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2821/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1373967867 t fired, 1374 attempts, .

Time elapsed: 2822 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2826/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1376469248 t fired, 1377 attempts, .

Time elapsed: 2827 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2831/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1378968260 t fired, 1379 attempts, .

Time elapsed: 2832 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2836/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1381466989 t fired, 1382 attempts, .

Time elapsed: 2837 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2841/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1383970986 t fired, 1384 attempts, .

Time elapsed: 2842 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2846/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1386471779 t fired, 1387 attempts, .

Time elapsed: 2847 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2851/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1388968910 t fired, 1389 attempts, .

Time elapsed: 2852 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2856/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1391467434 t fired, 1392 attempts, .

Time elapsed: 2857 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2861/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1393974215 t fired, 1394 attempts, .

Time elapsed: 2862 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2866/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1396472206 t fired, 1397 attempts, .

Time elapsed: 2867 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2871/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1398973505 t fired, 1399 attempts, .

Time elapsed: 2872 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2876/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1401471427 t fired, 1402 attempts, .

Time elapsed: 2877 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2881/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1403967690 t fired, 1404 attempts, .

Time elapsed: 2882 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2886/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1406465776 t fired, 1407 attempts, .

Time elapsed: 2887 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2891/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1408969159 t fired, 1409 attempts, .

Time elapsed: 2892 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2896/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1411473753 t fired, 1412 attempts, .

Time elapsed: 2897 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2901/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1413972566 t fired, 1414 attempts, .

Time elapsed: 2902 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2906/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1416473312 t fired, 1417 attempts, .

Time elapsed: 2907 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2911/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1418968531 t fired, 1419 attempts, .

Time elapsed: 2912 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2916/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1421468717 t fired, 1422 attempts, .

Time elapsed: 2917 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2921/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1423968757 t fired, 1424 attempts, .

Time elapsed: 2922 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2926/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1426469264 t fired, 1427 attempts, .

Time elapsed: 2927 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2931/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1428967085 t fired, 1429 attempts, .

Time elapsed: 2932 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2936/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1431462736 t fired, 1432 attempts, .

Time elapsed: 2937 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2941/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1433962122 t fired, 1434 attempts, .

Time elapsed: 2942 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2946/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1436461196 t fired, 1437 attempts, .

Time elapsed: 2947 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2951/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1438960721 t fired, 1439 attempts, .

Time elapsed: 2952 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2956/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1441460955 t fired, 1442 attempts, .

Time elapsed: 2957 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2961/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1443956197 t fired, 1444 attempts, .

Time elapsed: 2962 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2966/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1446451611 t fired, 1447 attempts, .

Time elapsed: 2967 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2971/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1448948171 t fired, 1449 attempts, .

Time elapsed: 2972 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2976/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1451450671 t fired, 1452 attempts, .

Time elapsed: 2977 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2981/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1453945502 t fired, 1454 attempts, .

Time elapsed: 2982 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2986/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1456442093 t fired, 1457 attempts, .

Time elapsed: 2987 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2991/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1458941347 t fired, 1459 attempts, .

Time elapsed: 2992 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 2996/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1461441572 t fired, 1462 attempts, .

Time elapsed: 2997 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3001/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1463940316 t fired, 1464 attempts, .

Time elapsed: 3002 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3006/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1466432979 t fired, 1467 attempts, .

Time elapsed: 3007 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3011/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1468933902 t fired, 1469 attempts, .

Time elapsed: 3012 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3016/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1471428090 t fired, 1472 attempts, .

Time elapsed: 3017 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3021/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1473936172 t fired, 1474 attempts, .

Time elapsed: 3022 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3026/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1476435860 t fired, 1477 attempts, .

Time elapsed: 3027 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3031/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1478935529 t fired, 1479 attempts, .

Time elapsed: 3032 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3036/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1481434283 t fired, 1482 attempts, .

Time elapsed: 3037 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3041/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1483938563 t fired, 1484 attempts, .

Time elapsed: 3042 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3046/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1486442237 t fired, 1487 attempts, .

Time elapsed: 3047 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3051/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1488947704 t fired, 1489 attempts, .

Time elapsed: 3052 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3056/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1491457688 t fired, 1492 attempts, .

Time elapsed: 3057 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3061/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1493960643 t fired, 1494 attempts, .

Time elapsed: 3062 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3066/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1496464511 t fired, 1497 attempts, .

Time elapsed: 3067 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3071/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1498958313 t fired, 1499 attempts, .

Time elapsed: 3072 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3076/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1501455772 t fired, 1502 attempts, .

Time elapsed: 3077 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3081/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1503958809 t fired, 1504 attempts, .

Time elapsed: 3082 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3086/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1506464013 t fired, 1507 attempts, .

Time elapsed: 3087 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3091/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1508971186 t fired, 1509 attempts, .

Time elapsed: 3092 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3096/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1511476795 t fired, 1512 attempts, .

Time elapsed: 3097 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3101/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1513974518 t fired, 1514 attempts, .

Time elapsed: 3102 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3106/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1516479058 t fired, 1517 attempts, .

Time elapsed: 3107 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3111/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1518978274 t fired, 1519 attempts, .

Time elapsed: 3112 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3116/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1521477838 t fired, 1522 attempts, .

Time elapsed: 3117 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3121/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1523978495 t fired, 1524 attempts, .

Time elapsed: 3122 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3126/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1526480999 t fired, 1527 attempts, .

Time elapsed: 3127 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3131/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1528984137 t fired, 1529 attempts, .

Time elapsed: 3132 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3136/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1531486450 t fired, 1532 attempts, .

Time elapsed: 3137 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3141/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1533987467 t fired, 1534 attempts, .

Time elapsed: 3142 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3146/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1536484474 t fired, 1537 attempts, .

Time elapsed: 3147 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3151/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1538985668 t fired, 1539 attempts, .

Time elapsed: 3152 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3156/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1541486805 t fired, 1542 attempts, .

Time elapsed: 3157 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3161/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1543986855 t fired, 1544 attempts, .

Time elapsed: 3162 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3166/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1546490857 t fired, 1547 attempts, .

Time elapsed: 3167 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3171/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1548990750 t fired, 1549 attempts, .

Time elapsed: 3172 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3176/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1551486976 t fired, 1552 attempts, .

Time elapsed: 3177 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3181/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1553985874 t fired, 1554 attempts, .

Time elapsed: 3182 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3186/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1556483362 t fired, 1557 attempts, .

Time elapsed: 3187 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3191/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1558985404 t fired, 1559 attempts, .

Time elapsed: 3192 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3196/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1561486518 t fired, 1562 attempts, .

Time elapsed: 3197 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-04: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-05: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-06: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-08: CTL false CTL model checker
MAPKbis-PT-5310-CTLFireability-09: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-12: INITIAL false preprocessing
MAPKbis-PT-5310-CTLFireability-14: EF true findpath
MAPKbis-PT-5310-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPKbis-PT-5310-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-11: EF DL 0 0 1 0 1 0 1 0
MAPKbis-PT-5310-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF DL FNDP 3201/3599 0/5 MAPKbis-PT-5310-CTLFireability-11 1563991447 t fired, 1564 attempts, .

Time elapsed: 3202 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPKbis-PT-5310-CTLFireability-00: CTL true CTL model checker
MAPKbis-PT-5310-CTLFireability-01: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-02: INITIAL true preprocessing
MAPKbis-PT-5310-CTLFireability-03: CTL true CTL model checker

========== file over 1MB has been truncated ======
retrieve it from the run archives if needed

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MAPKbis-PT-5310"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is MAPKbis-PT-5310, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r230-tall-167856414900634"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/MAPKbis-PT-5310.tgz
mv MAPKbis-PT-5310 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;