fond

jQuery Multi Level CSS Menu Css3Menu.com

Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r230-tall-167856414900626
Last Updated
May 14, 2023

About the Execution of LoLA for MAPK-PT-10240

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
4593.239 115312.00 101000.00 347.90 ????FFFTF???FF?F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r230-tall-167856414900626.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is MAPK-PT-10240, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r230-tall-167856414900626
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 512K
-rw-r--r-- 1 mcc users 8.3K Feb 26 10:49 CTLCardinality.txt
-rw-r--r-- 1 mcc users 87K Feb 26 10:49 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Feb 26 10:48 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 26 10:48 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:22 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:22 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:22 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:22 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 10:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 117K Feb 26 10:50 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Feb 26 10:49 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Feb 26 10:49 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:22 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 25K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME MAPK-PT-10240-CTLFireability-00
FORMULA_NAME MAPK-PT-10240-CTLFireability-01
FORMULA_NAME MAPK-PT-10240-CTLFireability-02
FORMULA_NAME MAPK-PT-10240-CTLFireability-03
FORMULA_NAME MAPK-PT-10240-CTLFireability-04
FORMULA_NAME MAPK-PT-10240-CTLFireability-05
FORMULA_NAME MAPK-PT-10240-CTLFireability-06
FORMULA_NAME MAPK-PT-10240-CTLFireability-07
FORMULA_NAME MAPK-PT-10240-CTLFireability-08
FORMULA_NAME MAPK-PT-10240-CTLFireability-09
FORMULA_NAME MAPK-PT-10240-CTLFireability-10
FORMULA_NAME MAPK-PT-10240-CTLFireability-11
FORMULA_NAME MAPK-PT-10240-CTLFireability-12
FORMULA_NAME MAPK-PT-10240-CTLFireability-13
FORMULA_NAME MAPK-PT-10240-CTLFireability-14
FORMULA_NAME MAPK-PT-10240-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679491669933

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=MAPK-PT-10240
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT MAPK-PT-10240
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA MAPK-PT-10240-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPK-PT-10240-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPK-PT-10240-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPK-PT-10240-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPK-PT-10240-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPK-PT-10240-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPK-PT-10240-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPK-PT-10240-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679491785245

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: LAUNCH task # 19 (type EXCL) for 18 MAPK-PT-10240-CTLFireability-06
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for MAPK-PT-10240-CTLFireability-06
lola: result : false
lola: markings : 1
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 MAPK-PT-10240-CTLFireability-09
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
MAPK-PT-10240-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MAPK-PT-10240-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 5/224 11/32 MAPK-PT-10240-CTLFireability-09 2179118 m, 435823 m/sec, 7620391 t fired, .

Time elapsed: 6 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
MAPK-PT-10240-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MAPK-PT-10240-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 10/224 20/32 MAPK-PT-10240-CTLFireability-09 4191624 m, 402501 m/sec, 14663195 t fired, .

Time elapsed: 11 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
MAPK-PT-10240-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MAPK-PT-10240-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 15/224 30/32 MAPK-PT-10240-CTLFireability-09 6148698 m, 391414 m/sec, 21512533 t fired, .

Time elapsed: 16 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 28 (type EXCL) for MAPK-PT-10240-CTLFireability-09 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MAPK-PT-10240-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 21 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 50 (type EXCL) for 49 MAPK-PT-10240-CTLFireability-15
lola: time limit : 238 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for MAPK-PT-10240-CTLFireability-15
lola: result : false
lola: markings : 6
lola: fired transitions : 18
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 MAPK-PT-10240-CTLFireability-13
lola: time limit : 255 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for MAPK-PT-10240-CTLFireability-13
lola: result : false
lola: markings : 2597
lola: fired transitions : 2649
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 36 MAPK-PT-10240-CTLFireability-12
lola: time limit : 275 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type EXCL) for MAPK-PT-10240-CTLFireability-12
lola: result : false
lola: markings : 6
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 36 MAPK-PT-10240-CTLFireability-12
lola: time limit : 298 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for MAPK-PT-10240-CTLFireability-12
lola: result : false
lola: markings : 1
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 MAPK-PT-10240-CTLFireability-11
lola: time limit : 325 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 5/325 9/32 MAPK-PT-10240-CTLFireability-11 1791244 m, 358248 m/sec, 8058088 t fired, .

Time elapsed: 26 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 10/325 17/32 MAPK-PT-10240-CTLFireability-11 3421826 m, 326116 m/sec, 15395098 t fired, .

Time elapsed: 31 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 15/325 25/32 MAPK-PT-10240-CTLFireability-11 5004004 m, 316435 m/sec, 22514576 t fired, .

Time elapsed: 36 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 34 (type EXCL) for MAPK-PT-10240-CTLFireability-11 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 41 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 31 (type EXCL) for 30 MAPK-PT-10240-CTLFireability-10
lola: time limit : 355 sec
lola: memory limit: 32 pages
lola: CANCELED task # 31 (type EXCL) for MAPK-PT-10240-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 46 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 25 (type EXCL) for 24 MAPK-PT-10240-CTLFireability-08
lola: time limit : 394 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for MAPK-PT-10240-CTLFireability-08
lola: result : false
lola: markings : 2566
lola: fired transitions : 5128
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 MAPK-PT-10240-CTLFireability-07
lola: time limit : 444 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for MAPK-PT-10240-CTLFireability-07
lola: result : true
lola: markings : 2562
lola: fired transitions : 2561
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 MAPK-PT-10240-CTLFireability-05
lola: time limit : 507 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for MAPK-PT-10240-CTLFireability-05
lola: result : false
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 MAPK-PT-10240-CTLFireability-04
lola: time limit : 592 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for MAPK-PT-10240-CTLFireability-04
lola: result : false
lola: markings : 6
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 MAPK-PT-10240-CTLFireability-02
lola: time limit : 710 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-04: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-05: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-07: CTL true CTL model checker
MAPK-PT-10240-CTLFireability-08: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
MAPK-PT-10240-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/710 14/32 MAPK-PT-10240-CTLFireability-02 2811719 m, 562343 m/sec, 7022849 t fired, .

Time elapsed: 51 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-04: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-05: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-07: CTL true CTL model checker
MAPK-PT-10240-CTLFireability-08: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
MAPK-PT-10240-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/710 26/32 MAPK-PT-10240-CTLFireability-02 5369844 m, 511625 m/sec, 13416687 t fired, .

Time elapsed: 56 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 7 (type EXCL) for MAPK-PT-10240-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-04: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-05: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-07: CTL true CTL model checker
MAPK-PT-10240-CTLFireability-08: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 61 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 4 (type EXCL) for 3 MAPK-PT-10240-CTLFireability-01
lola: time limit : 884 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-04: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-05: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-07: CTL true CTL model checker
MAPK-PT-10240-CTLFireability-08: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
MAPK-PT-10240-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/884 11/32 MAPK-PT-10240-CTLFireability-01 2302386 m, 460477 m/sec, 7672855 t fired, .

Time elapsed: 66 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-04: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-05: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-07: CTL true CTL model checker
MAPK-PT-10240-CTLFireability-08: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
MAPK-PT-10240-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/884 20/32 MAPK-PT-10240-CTLFireability-01 4338344 m, 407191 m/sec, 14458714 t fired, .

Time elapsed: 71 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-04: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-05: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-07: CTL true CTL model checker
MAPK-PT-10240-CTLFireability-08: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
MAPK-PT-10240-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 15/884 29/32 MAPK-PT-10240-CTLFireability-01 6317431 m, 395817 m/sec, 21054728 t fired, .

Time elapsed: 76 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 4 (type EXCL) for MAPK-PT-10240-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-04: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-05: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-07: CTL true CTL model checker
MAPK-PT-10240-CTLFireability-08: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 81 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 1 (type EXCL) for 0 MAPK-PT-10240-CTLFireability-00
lola: time limit : 1173 sec
lola: memory limit: 32 pages
lola: CANCELED task # 1 (type EXCL) for MAPK-PT-10240-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-04: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-05: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-07: CTL true CTL model checker
MAPK-PT-10240-CTLFireability-08: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 86 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 10 (type EXCL) for 9 MAPK-PT-10240-CTLFireability-03
lola: time limit : 1757 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-04: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-05: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-07: CTL true CTL model checker
MAPK-PT-10240-CTLFireability-08: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/1757 14/32 MAPK-PT-10240-CTLFireability-03 2786565 m, 557313 m/sec, 6959287 t fired, .

Time elapsed: 91 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-04: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-05: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-07: CTL true CTL model checker
MAPK-PT-10240-CTLFireability-08: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 10/1757 26/32 MAPK-PT-10240-CTLFireability-03 5314785 m, 505644 m/sec, 13279261 t fired, .

Time elapsed: 96 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 10 (type EXCL) for MAPK-PT-10240-CTLFireability-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-04: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-05: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-07: CTL true CTL model checker
MAPK-PT-10240-CTLFireability-08: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 101 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 47 (type EXCL) for 46 MAPK-PT-10240-CTLFireability-14
lola: time limit : 3499 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-04: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-05: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-07: CTL true CTL model checker
MAPK-PT-10240-CTLFireability-08: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 5/3499 14/32 MAPK-PT-10240-CTLFireability-14 2851832 m, 570366 m/sec, 7106093 t fired, .

Time elapsed: 106 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-04: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-05: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-07: CTL true CTL model checker
MAPK-PT-10240-CTLFireability-08: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 10/3499 26/32 MAPK-PT-10240-CTLFireability-14 5348657 m, 499365 m/sec, 13346570 t fired, .

Time elapsed: 111 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 47 (type EXCL) for MAPK-PT-10240-CTLFireability-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-04: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-05: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-07: CTL true CTL model checker
MAPK-PT-10240-CTLFireability-08: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MAPK-PT-10240-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
MAPK-PT-10240-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 116 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-10240-CTLFireability-00: CTL unknown AGGR
MAPK-PT-10240-CTLFireability-01: CTL unknown AGGR
MAPK-PT-10240-CTLFireability-02: CTL unknown AGGR
MAPK-PT-10240-CTLFireability-03: CTL unknown AGGR
MAPK-PT-10240-CTLFireability-04: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-05: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-06: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-07: CTL true CTL model checker
MAPK-PT-10240-CTLFireability-08: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-09: CTL unknown AGGR
MAPK-PT-10240-CTLFireability-10: CTL unknown AGGR
MAPK-PT-10240-CTLFireability-11: CTL unknown AGGR
MAPK-PT-10240-CTLFireability-12: DISJ false DISJ
MAPK-PT-10240-CTLFireability-13: CTL false CTL model checker
MAPK-PT-10240-CTLFireability-14: CTL unknown AGGR
MAPK-PT-10240-CTLFireability-15: CTL false CTL model checker


Time elapsed: 116 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MAPK-PT-10240"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is MAPK-PT-10240, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r230-tall-167856414900626"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/MAPK-PT-10240.tgz
mv MAPK-PT-10240 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;