About the Execution of LoLA for LeafsetExtension-PT-S32C2
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 3300.384 | 380410.00 | 392737.00 | 1003.10 | ?FFF?FTT???FFT?T | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r230-tall-167856414700498.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.........................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is LeafsetExtension-PT-S32C2, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r230-tall-167856414700498
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 3.8M
-rw-r--r-- 1 mcc users 14K Feb 25 16:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 91K Feb 25 16:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.0K Feb 25 16:56 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 16:56 CTLFireability.xml
-rw-r--r-- 1 mcc users 6.4K Feb 25 16:21 LTLCardinality.txt
-rw-r--r-- 1 mcc users 30K Feb 25 16:21 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.3K Feb 25 16:21 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 16:21 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 16:58 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 78K Feb 25 16:58 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 19K Feb 25 16:58 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 86K Feb 25 16:58 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:21 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.2K Feb 25 16:21 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 3.4M Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFireability-00
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFireability-01
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFireability-02
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFireability-03
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFireability-04
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFireability-05
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFireability-06
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFireability-07
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFireability-08
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFireability-09
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFireability-10
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFireability-11
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFireability-12
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFireability-13
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFireability-14
FORMULA_NAME LeafsetExtension-PT-S32C2-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679477899931
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=LeafsetExtension-PT-S32C2
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT LeafsetExtension-PT-S32C2
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA LeafsetExtension-PT-S32C2-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S32C2-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S32C2-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S32C2-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S32C2-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S32C2-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S32C2-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S32C2-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S32C2-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LeafsetExtension-PT-S32C2-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679478280341
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 49 (type SKEL/FNDP) for 39 LeafsetExtension-PT-S32C2-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type SKEL/EQUN) for 39 LeafsetExtension-PT-S32C2-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/SRCH) for 39 LeafsetExtension-PT-S32C2-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SKEL/SRCH) for 39 LeafsetExtension-PT-S32C2-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 51 (type SKEL/SRCH) for LeafsetExtension-PT-S32C2-CTLFireability-13
lola: result : true
lola: markings : 12
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for LeafsetExtension-PT-S32C2-CTLFireability-13 (obsolete)
lola: CANCELED task # 50 (type EQUN) for LeafsetExtension-PT-S32C2-CTLFireability-13 (obsolete)
lola: CANCELED task # 52 (type SRCH) for LeafsetExtension-PT-S32C2-CTLFireability-13 (obsolete)
lola: FINISHED task # 49 (type SKEL/FNDP) for LeafsetExtension-PT-S32C2-CTLFireability-13
lola: result : true
lola: fired transitions : 10
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 55 (type SKEL/FNDP) for 33 LeafsetExtension-PT-S32C2-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type SKEL/EQUN) for 33 LeafsetExtension-PT-S32C2-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/CTLFireability-50.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 57 (type SKEL/SRCH) for 33 LeafsetExtension-PT-S32C2-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic
lola: LAUNCH task # 58 (type SKEL/SRCH) for 33 LeafsetExtension-PT-S32C2-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 50 (type SKEL/EQUN) for LeafsetExtension-PT-S32C2-CTLFireability-13
lola: result : true
lola: FINISHED task # 57 (type SKEL/SRCH) for LeafsetExtension-PT-S32C2-CTLFireability-11
lola: result : true
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 55 (type FNDP) for LeafsetExtension-PT-S32C2-CTLFireability-11 (obsolete)
lola: CANCELED task # 56 (type EQUN) for LeafsetExtension-PT-S32C2-CTLFireability-11 (obsolete)
lola: CANCELED task # 58 (type SRCH) for LeafsetExtension-PT-S32C2-CTLFireability-11 (obsolete)
lola: FINISHED task # 55 (type SKEL/FNDP) for LeafsetExtension-PT-S32C2-CTLFireability-11
lola: result : true
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/CTLFireability-56.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 56 (type SKEL/EQUN) for LeafsetExtension-PT-S32C2-CTLFireability-11
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 61 (type EXCL) for 39 LeafsetExtension-PT-S32C2-CTLFireability-13
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 59 (type FNDP) for 39 LeafsetExtension-PT-S32C2-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type EQUN) for 39 LeafsetExtension-PT-S32C2-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SRCH) for 39 LeafsetExtension-PT-S32C2-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: FINISHED task # 62 (type SRCH) for LeafsetExtension-PT-S32C2-CTLFireability-13
lola: result : unknown
lola: time used : 1.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: FINISHED task # 61 (type EXCL) for LeafsetExtension-PT-S32C2-CTLFireability-13
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 59 (type FNDP) for LeafsetExtension-PT-S32C2-CTLFireability-13 (obsolete)
lola: CANCELED task # 60 (type EQUN) for LeafsetExtension-PT-S32C2-CTLFireability-13 (obsolete)
lola: LAUNCH task # 66 (type EXCL) for 33 LeafsetExtension-PT-S32C2-CTLFireability-11
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 64 (type FNDP) for 33 LeafsetExtension-PT-S32C2-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type EQUN) for 33 LeafsetExtension-PT-S32C2-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SRCH) for 33 LeafsetExtension-PT-S32C2-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 59 (type FNDP) for LeafsetExtension-PT-S32C2-CTLFireability-13
lola: result : true
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: FINISHED task # 66 (type EXCL) for LeafsetExtension-PT-S32C2-CTLFireability-11
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 64 (type FNDP) for LeafsetExtension-PT-S32C2-CTLFireability-11 (obsolete)
lola: CANCELED task # 65 (type EQUN) for LeafsetExtension-PT-S32C2-CTLFireability-11 (obsolete)
lola: CANCELED task # 67 (type SRCH) for LeafsetExtension-PT-S32C2-CTLFireability-11 (obsolete)
sara: try reading problem file /home/mcc/execution/CTLFireability-60.sara.
lola: FINISHED task # 64 (type FNDP) for LeafsetExtension-PT-S32C2-CTLFireability-11
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/CTLFireability-65.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 60 (type EQUN) for LeafsetExtension-PT-S32C2-CTLFireability-13
lola: result : true
lola: FINISHED task # 65 (type EQUN) for LeafsetExtension-PT-S32C2-CTLFireability-11
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 10 (type EXCL) for 9 LeafsetExtension-PT-S32C2-CTLFireability-03
lola: time limit : 256 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for LeafsetExtension-PT-S32C2-CTLFireability-03
lola: result : false
lola: markings : 13
lola: fired transitions : 26
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 10 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 28 (type EXCL) for 27 LeafsetExtension-PT-S32C2-CTLFireability-09
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 4/276 2/32 LeafsetExtension-PT-S32C2-CTLFireability-09 47347 m, 9469 m/sec, 153663 t fired, .
Time elapsed: 15 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 9/276 4/32 LeafsetExtension-PT-S32C2-CTLFireability-09 140580 m, 18646 m/sec, 481996 t fired, .
Time elapsed: 20 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 14/276 6/32 LeafsetExtension-PT-S32C2-CTLFireability-09 233044 m, 18492 m/sec, 815668 t fired, .
Time elapsed: 25 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 19/276 9/32 LeafsetExtension-PT-S32C2-CTLFireability-09 321262 m, 17643 m/sec, 1147088 t fired, .
Time elapsed: 30 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 24/276 11/32 LeafsetExtension-PT-S32C2-CTLFireability-09 415009 m, 18749 m/sec, 1471737 t fired, .
Time elapsed: 35 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 29/276 13/32 LeafsetExtension-PT-S32C2-CTLFireability-09 505815 m, 18161 m/sec, 1792522 t fired, .
Time elapsed: 40 secs. Pages in use: 13
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 34/276 15/32 LeafsetExtension-PT-S32C2-CTLFireability-09 590952 m, 17027 m/sec, 2112801 t fired, .
Time elapsed: 45 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 39/276 17/32 LeafsetExtension-PT-S32C2-CTLFireability-09 681453 m, 18100 m/sec, 2433943 t fired, .
Time elapsed: 50 secs. Pages in use: 17
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 44/276 19/32 LeafsetExtension-PT-S32C2-CTLFireability-09 769612 m, 17631 m/sec, 2747503 t fired, .
Time elapsed: 55 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 49/276 21/32 LeafsetExtension-PT-S32C2-CTLFireability-09 855837 m, 17245 m/sec, 3061973 t fired, .
Time elapsed: 60 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 54/276 24/32 LeafsetExtension-PT-S32C2-CTLFireability-09 945359 m, 17904 m/sec, 3385593 t fired, .
Time elapsed: 65 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 59/276 26/32 LeafsetExtension-PT-S32C2-CTLFireability-09 1035006 m, 17929 m/sec, 3705201 t fired, .
Time elapsed: 71 secs. Pages in use: 26
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 65/276 28/32 LeafsetExtension-PT-S32C2-CTLFireability-09 1124849 m, 17968 m/sec, 4029348 t fired, .
Time elapsed: 76 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 70/276 30/32 LeafsetExtension-PT-S32C2-CTLFireability-09 1211710 m, 17372 m/sec, 4349449 t fired, .
Time elapsed: 81 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 75/276 32/32 LeafsetExtension-PT-S32C2-CTLFireability-09 1301409 m, 17939 m/sec, 4661925 t fired, .
Time elapsed: 86 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 28 (type EXCL) for LeafsetExtension-PT-S32C2-CTLFireability-09 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 91 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 46 (type EXCL) for 45 LeafsetExtension-PT-S32C2-CTLFireability-15
lola: time limit : 292 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for LeafsetExtension-PT-S32C2-CTLFireability-15
lola: result : true
lola: markings : 19
lola: fired transitions : 54
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 LeafsetExtension-PT-S32C2-CTLFireability-14
lola: time limit : 319 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 5/319 5/32 LeafsetExtension-PT-S32C2-CTLFireability-14 97916 m, 19583 m/sec, 178760 t fired, .
Time elapsed: 96 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 10/319 8/32 LeafsetExtension-PT-S32C2-CTLFireability-14 186185 m, 17653 m/sec, 348922 t fired, .
Time elapsed: 101 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 15/319 12/32 LeafsetExtension-PT-S32C2-CTLFireability-14 276122 m, 17987 m/sec, 524026 t fired, .
Time elapsed: 106 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 20/319 16/32 LeafsetExtension-PT-S32C2-CTLFireability-14 365565 m, 17888 m/sec, 698669 t fired, .
Time elapsed: 111 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 25/319 19/32 LeafsetExtension-PT-S32C2-CTLFireability-14 452034 m, 17293 m/sec, 867203 t fired, .
Time elapsed: 116 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 30/319 22/32 LeafsetExtension-PT-S32C2-CTLFireability-14 535158 m, 16624 m/sec, 1030551 t fired, .
Time elapsed: 121 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 35/319 26/32 LeafsetExtension-PT-S32C2-CTLFireability-14 621317 m, 17231 m/sec, 1198679 t fired, .
Time elapsed: 126 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 40/319 29/32 LeafsetExtension-PT-S32C2-CTLFireability-14 711817 m, 18100 m/sec, 1379684 t fired, .
Time elapsed: 131 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 43 (type EXCL) for LeafsetExtension-PT-S32C2-CTLFireability-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 136 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 37 (type EXCL) for 36 LeafsetExtension-PT-S32C2-CTLFireability-12
lola: time limit : 346 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for LeafsetExtension-PT-S32C2-CTLFireability-12
lola: result : false
lola: markings : 18897
lola: fired transitions : 56993
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 LeafsetExtension-PT-S32C2-CTLFireability-10
lola: time limit : 384 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 4/384 3/32 LeafsetExtension-PT-S32C2-CTLFireability-10 60822 m, 12164 m/sec, 121243 t fired, .
Time elapsed: 141 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 9/384 7/32 LeafsetExtension-PT-S32C2-CTLFireability-10 138511 m, 15537 m/sec, 282900 t fired, .
Time elapsed: 146 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 14/384 10/32 LeafsetExtension-PT-S32C2-CTLFireability-10 221359 m, 16569 m/sec, 449006 t fired, .
Time elapsed: 151 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 19/384 14/32 LeafsetExtension-PT-S32C2-CTLFireability-10 307316 m, 17191 m/sec, 624328 t fired, .
Time elapsed: 156 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 24/384 18/32 LeafsetExtension-PT-S32C2-CTLFireability-10 389895 m, 16515 m/sec, 797147 t fired, .
Time elapsed: 161 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 29/384 21/32 LeafsetExtension-PT-S32C2-CTLFireability-10 469615 m, 15944 m/sec, 965570 t fired, .
Time elapsed: 166 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 34/384 24/32 LeafsetExtension-PT-S32C2-CTLFireability-10 548987 m, 15874 m/sec, 1125566 t fired, .
Time elapsed: 171 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 39/384 27/32 LeafsetExtension-PT-S32C2-CTLFireability-10 624061 m, 15014 m/sec, 1289564 t fired, .
Time elapsed: 176 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 44/384 31/32 LeafsetExtension-PT-S32C2-CTLFireability-10 699329 m, 15053 m/sec, 1464971 t fired, .
Time elapsed: 181 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 31 (type EXCL) for LeafsetExtension-PT-S32C2-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 186 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 25 (type EXCL) for 24 LeafsetExtension-PT-S32C2-CTLFireability-08
lola: time limit : 426 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 5/426 3/32 LeafsetExtension-PT-S32C2-CTLFireability-08 58521 m, 11704 m/sec, 179264 t fired, .
Time elapsed: 191 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 10/426 6/32 LeafsetExtension-PT-S32C2-CTLFireability-08 109987 m, 10293 m/sec, 343478 t fired, .
Time elapsed: 196 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 15/426 8/32 LeafsetExtension-PT-S32C2-CTLFireability-08 162511 m, 10504 m/sec, 510250 t fired, .
Time elapsed: 201 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 20/426 10/32 LeafsetExtension-PT-S32C2-CTLFireability-08 212620 m, 10021 m/sec, 675212 t fired, .
Time elapsed: 206 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 25/426 13/32 LeafsetExtension-PT-S32C2-CTLFireability-08 267605 m, 10997 m/sec, 858991 t fired, .
Time elapsed: 211 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 30/426 15/32 LeafsetExtension-PT-S32C2-CTLFireability-08 319533 m, 10385 m/sec, 1029070 t fired, .
Time elapsed: 216 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 35/426 17/32 LeafsetExtension-PT-S32C2-CTLFireability-08 372710 m, 10635 m/sec, 1203460 t fired, .
Time elapsed: 221 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 40/426 19/32 LeafsetExtension-PT-S32C2-CTLFireability-08 426565 m, 10771 m/sec, 1375278 t fired, .
Time elapsed: 226 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 45/426 22/32 LeafsetExtension-PT-S32C2-CTLFireability-08 478365 m, 10360 m/sec, 1545054 t fired, .
Time elapsed: 231 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 50/426 24/32 LeafsetExtension-PT-S32C2-CTLFireability-08 529270 m, 10181 m/sec, 1711867 t fired, .
Time elapsed: 236 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 55/426 26/32 LeafsetExtension-PT-S32C2-CTLFireability-08 577683 m, 9682 m/sec, 1874147 t fired, .
Time elapsed: 241 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 60/426 28/32 LeafsetExtension-PT-S32C2-CTLFireability-08 630869 m, 10637 m/sec, 2045810 t fired, .
Time elapsed: 246 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 65/426 30/32 LeafsetExtension-PT-S32C2-CTLFireability-08 682403 m, 10306 m/sec, 2219683 t fired, .
Time elapsed: 251 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 70/426 32/32 LeafsetExtension-PT-S32C2-CTLFireability-08 738345 m, 11188 m/sec, 2403787 t fired, .
Time elapsed: 256 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 25 (type EXCL) for LeafsetExtension-PT-S32C2-CTLFireability-08 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 261 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 22 (type EXCL) for 21 LeafsetExtension-PT-S32C2-CTLFireability-07
lola: time limit : 477 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for LeafsetExtension-PT-S32C2-CTLFireability-07
lola: result : true
lola: markings : 22641
lola: fired transitions : 85675
lola: time used : 2.000000
lola: memory pages used : 2
lola: LAUNCH task # 19 (type EXCL) for 18 LeafsetExtension-PT-S32C2-CTLFireability-06
lola: time limit : 556 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for LeafsetExtension-PT-S32C2-CTLFireability-06
lola: result : true
lola: markings : 6295
lola: fired transitions : 19317
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 LeafsetExtension-PT-S32C2-CTLFireability-05
lola: time limit : 667 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for LeafsetExtension-PT-S32C2-CTLFireability-05
lola: result : false
lola: markings : 19
lola: fired transitions : 36
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 LeafsetExtension-PT-S32C2-CTLFireability-04
lola: time limit : 834 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 3/834 2/32 LeafsetExtension-PT-S32C2-CTLFireability-04 29099 m, 5819 m/sec, 85760 t fired, .
Time elapsed: 266 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 8/834 4/32 LeafsetExtension-PT-S32C2-CTLFireability-04 83809 m, 10942 m/sec, 260305 t fired, .
Time elapsed: 271 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 13/834 7/32 LeafsetExtension-PT-S32C2-CTLFireability-04 136786 m, 10595 m/sec, 428694 t fired, .
Time elapsed: 276 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 18/834 9/32 LeafsetExtension-PT-S32C2-CTLFireability-04 187487 m, 10140 m/sec, 591742 t fired, .
Time elapsed: 281 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 23/834 11/32 LeafsetExtension-PT-S32C2-CTLFireability-04 237310 m, 9964 m/sec, 758505 t fired, .
Time elapsed: 286 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 28/834 14/32 LeafsetExtension-PT-S32C2-CTLFireability-04 292760 m, 11090 m/sec, 939707 t fired, .
Time elapsed: 291 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 33/834 16/32 LeafsetExtension-PT-S32C2-CTLFireability-04 344476 m, 10343 m/sec, 1112576 t fired, .
Time elapsed: 296 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 38/834 18/32 LeafsetExtension-PT-S32C2-CTLFireability-04 397305 m, 10565 m/sec, 1286129 t fired, .
Time elapsed: 301 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 43/834 20/32 LeafsetExtension-PT-S32C2-CTLFireability-04 449506 m, 10440 m/sec, 1456629 t fired, .
Time elapsed: 306 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 48/834 23/32 LeafsetExtension-PT-S32C2-CTLFireability-04 502908 m, 10680 m/sec, 1626984 t fired, .
Time elapsed: 311 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 53/834 24/32 LeafsetExtension-PT-S32C2-CTLFireability-04 552013 m, 9821 m/sec, 1791096 t fired, .
Time elapsed: 316 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 58/834 26/32 LeafsetExtension-PT-S32C2-CTLFireability-04 601913 m, 9980 m/sec, 1957304 t fired, .
Time elapsed: 321 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 63/834 29/32 LeafsetExtension-PT-S32C2-CTLFireability-04 653773 m, 10372 m/sec, 2124287 t fired, .
Time elapsed: 326 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 68/834 31/32 LeafsetExtension-PT-S32C2-CTLFireability-04 707774 m, 10800 m/sec, 2304424 t fired, .
Time elapsed: 331 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 13 (type EXCL) for LeafsetExtension-PT-S32C2-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 336 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 4 (type EXCL) for 3 LeafsetExtension-PT-S32C2-CTLFireability-01
lola: time limit : 1088 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for LeafsetExtension-PT-S32C2-CTLFireability-01
lola: result : false
lola: markings : 513
lola: fired transitions : 2532
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 LeafsetExtension-PT-S32C2-CTLFireability-00
lola: time limit : 1632 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/1632 5/32 LeafsetExtension-PT-S32C2-CTLFireability-00 88105 m, 17621 m/sec, 176006 t fired, .
Time elapsed: 341 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/1632 8/32 LeafsetExtension-PT-S32C2-CTLFireability-00 172945 m, 16968 m/sec, 350404 t fired, .
Time elapsed: 346 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 15/1632 12/32 LeafsetExtension-PT-S32C2-CTLFireability-00 261519 m, 17714 m/sec, 528510 t fired, .
Time elapsed: 351 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/1632 16/32 LeafsetExtension-PT-S32C2-CTLFireability-00 347820 m, 17260 m/sec, 702251 t fired, .
Time elapsed: 356 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 25/1632 20/32 LeafsetExtension-PT-S32C2-CTLFireability-00 429496 m, 16335 m/sec, 874933 t fired, .
Time elapsed: 361 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 30/1632 23/32 LeafsetExtension-PT-S32C2-CTLFireability-00 509897 m, 16080 m/sec, 1044282 t fired, .
Time elapsed: 366 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 35/1632 26/32 LeafsetExtension-PT-S32C2-CTLFireability-00 589311 m, 15882 m/sec, 1210510 t fired, .
Time elapsed: 371 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 40/1632 29/32 LeafsetExtension-PT-S32C2-CTLFireability-00 671282 m, 16394 m/sec, 1382927 t fired, .
Time elapsed: 376 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 1 (type EXCL) for LeafsetExtension-PT-S32C2-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 381 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 7 (type EXCL) for 6 LeafsetExtension-PT-S32C2-CTLFireability-02
lola: time limit : 3219 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for LeafsetExtension-PT-S32C2-CTLFireability-02
lola: result : false
lola: markings : 13
lola: fired transitions : 16
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C2-CTLFireability-00: CTL unknown AGGR
LeafsetExtension-PT-S32C2-CTLFireability-01: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-02: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-03: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-04: CTL unknown AGGR
LeafsetExtension-PT-S32C2-CTLFireability-05: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-06: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-08: CTL unknown AGGR
LeafsetExtension-PT-S32C2-CTLFireability-09: CTL unknown AGGR
LeafsetExtension-PT-S32C2-CTLFireability-10: CTL unknown AGGR
LeafsetExtension-PT-S32C2-CTLFireability-11: AG false state space
LeafsetExtension-PT-S32C2-CTLFireability-12: CTL false CTL model checker
LeafsetExtension-PT-S32C2-CTLFireability-13: EF true state space
LeafsetExtension-PT-S32C2-CTLFireability-14: CTL unknown AGGR
LeafsetExtension-PT-S32C2-CTLFireability-15: CTL true CTL model checker
Time elapsed: 381 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LeafsetExtension-PT-S32C2"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is LeafsetExtension-PT-S32C2, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r230-tall-167856414700498"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/LeafsetExtension-PT-S32C2.tgz
mv LeafsetExtension-PT-S32C2 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;