About the Execution of LoLA for LamportFastMutEx-PT-7
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16218.695 | 3600000.00 | 7254096.00 | 50034.40 | TTFTT?TT??FFT?FT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r230-tall-167856414600434.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is LamportFastMutEx-PT-7, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r230-tall-167856414600434
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.8M
-rw-r--r-- 1 mcc users 30K Feb 25 13:43 CTLCardinality.txt
-rw-r--r-- 1 mcc users 198K Feb 25 13:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 30K Feb 25 13:41 CTLFireability.txt
-rw-r--r-- 1 mcc users 165K Feb 25 13:41 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 13K Feb 25 16:20 LTLCardinality.txt
-rw-r--r-- 1 mcc users 56K Feb 25 16:20 LTLCardinality.xml
-rw-r--r-- 1 mcc users 15K Feb 25 16:20 LTLFireability.txt
-rw-r--r-- 1 mcc users 59K Feb 25 16:20 LTLFireability.xml
-rw-r--r-- 1 mcc users 38K Feb 25 13:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 240K Feb 25 13:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 93K Feb 25 13:48 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 499K Feb 25 13:48 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:20 UpperBounds.txt
-rw-r--r-- 1 mcc users 9.4K Feb 25 16:20 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 265K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-7-CTLFireability-00
FORMULA_NAME LamportFastMutEx-PT-7-CTLFireability-01
FORMULA_NAME LamportFastMutEx-PT-7-CTLFireability-02
FORMULA_NAME LamportFastMutEx-PT-7-CTLFireability-03
FORMULA_NAME LamportFastMutEx-PT-7-CTLFireability-04
FORMULA_NAME LamportFastMutEx-PT-7-CTLFireability-05
FORMULA_NAME LamportFastMutEx-PT-7-CTLFireability-06
FORMULA_NAME LamportFastMutEx-PT-7-CTLFireability-07
FORMULA_NAME LamportFastMutEx-PT-7-CTLFireability-08
FORMULA_NAME LamportFastMutEx-PT-7-CTLFireability-09
FORMULA_NAME LamportFastMutEx-PT-7-CTLFireability-10
FORMULA_NAME LamportFastMutEx-PT-7-CTLFireability-11
FORMULA_NAME LamportFastMutEx-PT-7-CTLFireability-12
FORMULA_NAME LamportFastMutEx-PT-7-CTLFireability-13
FORMULA_NAME LamportFastMutEx-PT-7-CTLFireability-14
FORMULA_NAME LamportFastMutEx-PT-7-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679468034856
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=LamportFastMutEx-PT-7
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT LamportFastMutEx-PT-7
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA LamportFastMutEx-PT-7-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-7-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-7-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-7-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-7-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-7-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-7-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-7-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-7-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-7-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-7-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA LamportFastMutEx-PT-7-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 14123472 kB
After kill :
MemTotal: 16393216 kB
MemFree: 15028320 kB
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:132
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:132
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 74 transitions removed,45 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 17 (type EXCL) for 6 LamportFastMutEx-PT-7-CTLFireability-02
lola: time limit : 116 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for LamportFastMutEx-PT-7-CTLFireability-02
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 25 (type EXCL) for 24 LamportFastMutEx-PT-7-CTLFireability-04
lola: time limit : 133 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 65 (type FNDP) for 36 LamportFastMutEx-PT-7-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 69 (type FNDP) for 52 LamportFastMutEx-PT-7-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type EQUN) for 52 LamportFastMutEx-PT-7-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 69 (type FNDP) for LamportFastMutEx-PT-7-CTLFireability-12
lola: result : true
lola: fired transitions : 46
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 70 (type EQUN) for LamportFastMutEx-PT-7-CTLFireability-12 (obsolete)
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/CTLFireability-70.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 25 (type EXCL) for LamportFastMutEx-PT-7-CTLFireability-04
lola: result : true
lola: markings : 227512
lola: fired transitions : 484452
lola: time used : 1.000000
lola: memory pages used : 2
lola: LAUNCH task # 62 (type EXCL) for 61 LamportFastMutEx-PT-7-CTLFireability-15
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: FINISHED task # 62 (type EXCL) for LamportFastMutEx-PT-7-CTLFireability-15
lola: result : true
lola: markings : 26
lola: fired transitions : 52
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 59 (type EXCL) for 58 LamportFastMutEx-PT-7-CTLFireability-14
lola: time limit : 256 sec
lola: memory limit: 32 pages
lola: FINISHED task # 59 (type EXCL) for LamportFastMutEx-PT-7-CTLFireability-14
lola: result : false
lola: markings : 26
lola: fired transitions : 27
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 56 (type EXCL) for 55 LamportFastMutEx-PT-7-CTLFireability-13
lola: time limit : 276 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-02: DISJ 0 1 0 0 5 0 0 2
LamportFastMutEx-PT-7-CTLFireability-03: F 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-08: EF DL 0 1 1 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-10: CONJ 0 2 0 0 2 0 0 0
LamportFastMutEx-PT-7-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 4/276 7/32 LamportFastMutEx-PT-7-CTLFireability-13 1357131 m, 271426 m/sec, 3385521 t fired, .
65 EF DL FNDP 5/3598 0/5 LamportFastMutEx-PT-7-CTLFireability-08 352713 t fired, 1 attempts, .
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LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-02: DISJ 0 1 0 0 5 0 0 2
LamportFastMutEx-PT-7-CTLFireability-03: F 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-08: EF DL 0 1 1 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-10: CONJ 0 2 0 0 2 0 0 0
LamportFastMutEx-PT-7-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 9/276 12/32 LamportFastMutEx-PT-7-CTLFireability-13 2626608 m, 253895 m/sec, 7578567 t fired, .
65 EF DL FNDP 10/3598 0/5 LamportFastMutEx-PT-7-CTLFireability-08 716592 t fired, 1 attempts, .
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LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-02: DISJ 0 1 0 0 5 0 0 2
LamportFastMutEx-PT-7-CTLFireability-03: F 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-08: EF DL 0 1 1 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-10: CONJ 0 2 0 0 2 0 0 0
LamportFastMutEx-PT-7-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 14/276 17/32 LamportFastMutEx-PT-7-CTLFireability-13 3736710 m, 222020 m/sec, 12127215 t fired, .
65 EF DL FNDP 15/3598 0/5 LamportFastMutEx-PT-7-CTLFireability-08 1079614 t fired, 2 attempts, .
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LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-02: DISJ 0 1 0 0 5 0 0 2
LamportFastMutEx-PT-7-CTLFireability-03: F 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-08: EF DL 0 1 1 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-10: CONJ 0 2 0 0 2 0 0 0
LamportFastMutEx-PT-7-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 19/276 22/32 LamportFastMutEx-PT-7-CTLFireability-13 4925990 m, 237856 m/sec, 16288175 t fired, .
65 EF DL FNDP 20/3598 0/5 LamportFastMutEx-PT-7-CTLFireability-08 1443671 t fired, 2 attempts, .
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sara: warning, failure of lp_solve (at job 5361)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-02: DISJ 0 1 0 0 5 0 0 2
LamportFastMutEx-PT-7-CTLFireability-03: F 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-08: EF DL 0 1 1 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-10: CONJ 0 2 0 0 2 0 0 0
LamportFastMutEx-PT-7-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 24/276 27/32 LamportFastMutEx-PT-7-CTLFireability-13 6057766 m, 226355 m/sec, 20563750 t fired, .
65 EF DL FNDP 25/3598 0/5 LamportFastMutEx-PT-7-CTLFireability-08 1807521 t fired, 2 attempts, .
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LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-02: DISJ 0 1 0 0 5 0 0 2
LamportFastMutEx-PT-7-CTLFireability-03: F 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-08: EF DL 0 1 1 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-10: CONJ 0 2 0 0 2 0 0 0
LamportFastMutEx-PT-7-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 29/276 32/32 LamportFastMutEx-PT-7-CTLFireability-13 7116358 m, 211718 m/sec, 24908938 t fired, .
65 EF DL FNDP 30/3598 0/5 LamportFastMutEx-PT-7-CTLFireability-08 2166306 t fired, 3 attempts, .
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lola: CANCELED task # 56 (type EXCL) for LamportFastMutEx-PT-7-CTLFireability-13 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-02: DISJ 0 1 0 0 5 0 0 2
LamportFastMutEx-PT-7-CTLFireability-03: F 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-08: EF DL 0 1 1 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-10: CONJ 0 2 0 0 2 0 0 0
LamportFastMutEx-PT-7-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF DL FNDP 35/3598 0/5 LamportFastMutEx-PT-7-CTLFireability-08 2530250 t fired, 3 attempts, .
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lola: LAUNCH task # 40 (type EXCL) for 39 LamportFastMutEx-PT-7-CTLFireability-09
lola: time limit : 296 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-02: DISJ 0 1 0 0 5 0 0 2
LamportFastMutEx-PT-7-CTLFireability-03: F 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-08: EF DL 0 1 1 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-10: CONJ 0 2 0 0 2 0 0 0
LamportFastMutEx-PT-7-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 5/296 4/32 LamportFastMutEx-PT-7-CTLFireability-09 832080 m, 166416 m/sec, 4448680 t fired, .
65 EF DL FNDP 40/3598 0/5 LamportFastMutEx-PT-7-CTLFireability-08 2894179 t fired, 3 attempts, .
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LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-02: DISJ 0 1 0 0 5 0 0 2
LamportFastMutEx-PT-7-CTLFireability-03: F 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-08: EF DL 0 1 1 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-10: CONJ 0 2 0 0 2 0 0 0
LamportFastMutEx-PT-7-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 10/296 8/32 LamportFastMutEx-PT-7-CTLFireability-09 1578651 m, 149314 m/sec, 8889573 t fired, .
65 EF DL FNDP 45/3598 0/5 LamportFastMutEx-PT-7-CTLFireability-08 3258274 t fired, 4 attempts, .
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LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-02: DISJ 0 1 0 0 5 0 0 2
LamportFastMutEx-PT-7-CTLFireability-03: F 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-08: EF DL 0 1 1 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-10: CONJ 0 2 0 0 2 0 0 0
LamportFastMutEx-PT-7-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 15/296 11/32 LamportFastMutEx-PT-7-CTLFireability-09 2301196 m, 144509 m/sec, 13319033 t fired, .
65 EF DL FNDP 50/3598 0/5 LamportFastMutEx-PT-7-CTLFireability-08 3622390 t fired, 4 attempts, .
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LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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LamportFastMutEx-PT-7-CTLFireability-02: DISJ 0 1 0 0 5 0 0 2
LamportFastMutEx-PT-7-CTLFireability-03: F 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-08: EF DL 0 1 1 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-10: CONJ 0 2 0 0 2 0 0 0
LamportFastMutEx-PT-7-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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40 CTL EXCL 20/296 14/32 LamportFastMutEx-PT-7-CTLFireability-09 2974711 m, 134703 m/sec, 18050739 t fired, .
65 EF DL FNDP 55/3598 0/5 LamportFastMutEx-PT-7-CTLFireability-08 3986666 t fired, 4 attempts, .
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LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
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LamportFastMutEx-PT-7-CTLFireability-02: DISJ 0 1 0 0 5 0 0 2
LamportFastMutEx-PT-7-CTLFireability-03: F 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-08: EF DL 0 1 1 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-10: CONJ 0 2 0 0 2 0 0 0
LamportFastMutEx-PT-7-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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40 CTL EXCL 25/296 17/32 LamportFastMutEx-PT-7-CTLFireability-09 3650522 m, 135162 m/sec, 22722465 t fired, .
65 EF DL FNDP 60/3598 0/5 LamportFastMutEx-PT-7-CTLFireability-08 4350601 t fired, 5 attempts, .
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LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
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LamportFastMutEx-PT-7-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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LamportFastMutEx-PT-7-CTLFireability-02: DISJ 0 1 0 0 5 0 0 2
LamportFastMutEx-PT-7-CTLFireability-03: F 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
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LamportFastMutEx-PT-7-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-08: EF DL 0 1 1 0 1 0 0 0
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64 EF DL EXCL 5/695 2/32 LamportFastMutEx-PT-7-CTLFireability-08 321288 m, 64257 m/sec, 648292 t fired, .
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LamportFastMutEx-PT-7-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-02: DISJ false DISJ
LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-06: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-07: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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LamportFastMutEx-PT-7-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-PT-7-CTLFireability-08: EF DL 0 0 2 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-PT-7-CTLFireability-10: CONJ 0 2 0 0 2 0 0 0
LamportFastMutEx-PT-7-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 EF DL EXCL 140/695 32/32 LamportFastMutEx-PT-7-CTLFireability-08 8618918 m, 60011 m/sec, 21995410 t fired, .
65 EF DL FNDP 260/3598 0/5 LamportFastMutEx-PT-7-CTLFireability-08 18793870 t fired, 19 attempts, .
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lola: CANCELED task # 64 (type EXCL) for LamportFastMutEx-PT-7-CTLFireability-08 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-PT-7-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-02: DISJ false DISJ
LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-06: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-07: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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LamportFastMutEx-PT-7-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-PT-7-CTLFireability-08: EF DL 0 0 1 0 1 0 1 0
LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-PT-7-CTLFireability-10: CONJ 0 2 0 0 2 0 0 0
LamportFastMutEx-PT-7-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
LamportFastMutEx-PT-7-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF DL FNDP 265/3598 0/5 LamportFastMutEx-PT-7-CTLFireability-08 19157459 t fired, 20 attempts, .
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lola: LAUNCH task # 68 (type EXCL) for 42 LamportFastMutEx-PT-7-CTLFireability-10
lola: time limit : 833 sec
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lola: FINISHED task # 68 (type EXCL) for LamportFastMutEx-PT-7-CTLFireability-10
lola: result : true
lola: markings : 53
lola: fired transitions : 53
lola: time used : 0.000000
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lola: LAUNCH task # 67 (type EXCL) for 21 LamportFastMutEx-PT-7-CTLFireability-03
lola: time limit : 1666 sec
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lola: FINISHED task # 67 (type EXCL) for LamportFastMutEx-PT-7-CTLFireability-03
lola: result : false
lola: markings : 128
lola: fired transitions : 448
lola: time used : 0.000000
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lola: LAUNCH task # 50 (type EXCL) for 49 LamportFastMutEx-PT-7-CTLFireability-11
lola: time limit : 3333 sec
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lola: FINISHED task # 50 (type EXCL) for LamportFastMutEx-PT-7-CTLFireability-11
lola: result : false
lola: markings : 26
lola: fired transitions : 53
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-PT-7-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-02: DISJ false DISJ
LamportFastMutEx-PT-7-CTLFireability-03: F true state space / EG
LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-06: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-07: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-10: CONJ false state space /EFEG
LamportFastMutEx-PT-7-CTLFireability-11: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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LamportFastMutEx-PT-7-CTLFireability-02: DISJ false DISJ
LamportFastMutEx-PT-7-CTLFireability-03: F true state space / EG
LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-06: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-07: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-10: CONJ false state space /EFEG
LamportFastMutEx-PT-7-CTLFireability-11: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
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LamportFastMutEx-PT-7-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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LamportFastMutEx-PT-7-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-02: DISJ false DISJ
LamportFastMutEx-PT-7-CTLFireability-03: F true state space / EG
LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-06: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-07: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-10: CONJ false state space /EFEG
LamportFastMutEx-PT-7-CTLFireability-11: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
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LamportFastMutEx-PT-7-CTLFireability-03: F true state space / EG
LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-06: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-07: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-10: CONJ false state space /EFEG
LamportFastMutEx-PT-7-CTLFireability-11: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
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LamportFastMutEx-PT-7-CTLFireability-03: F true state space / EG
LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-06: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-07: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-10: CONJ false state space /EFEG
LamportFastMutEx-PT-7-CTLFireability-11: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
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LamportFastMutEx-PT-7-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-02: DISJ false DISJ
LamportFastMutEx-PT-7-CTLFireability-03: F true state space / EG
LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-06: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-07: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-10: CONJ false state space /EFEG
LamportFastMutEx-PT-7-CTLFireability-11: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
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LamportFastMutEx-PT-7-CTLFireability-03: F true state space / EG
LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
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LamportFastMutEx-PT-7-CTLFireability-07: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-10: CONJ false state space /EFEG
LamportFastMutEx-PT-7-CTLFireability-11: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
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LamportFastMutEx-PT-7-CTLFireability-03: F true state space / EG
LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-06: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-07: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-10: CONJ false state space /EFEG
LamportFastMutEx-PT-7-CTLFireability-11: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
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LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
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LamportFastMutEx-PT-7-CTLFireability-10: CONJ false state space /EFEG
LamportFastMutEx-PT-7-CTLFireability-11: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
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LamportFastMutEx-PT-7-CTLFireability-11: CTL false CTL model checker
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LamportFastMutEx-PT-7-CTLFireability-10: CONJ false state space /EFEG
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LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-PT-7-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
65 EF DL FNDP 2941/3598 0/5 LamportFastMutEx-PT-7-CTLFireability-08 214152181 t fired, 215 attempts, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-PT-7-CTLFireability-00: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-01: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-02: DISJ false DISJ
LamportFastMutEx-PT-7-CTLFireability-03: F true state space / EG
LamportFastMutEx-PT-7-CTLFireability-04: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-06: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-07: CTL true CTL model checker
LamportFastMutEx-PT-7-CTLFireability-10: CONJ false state space /EFEG
LamportFastMutEx-PT-7-CTLFireability-11: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-12: EF true findpath
LamportFastMutEx-PT-7-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-PT-7-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LamportFastMutEx-PT-7-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-PT-7-CTLFireability-08: EF DL 0 0 1 0 1 0 1 0
LamportFastMutEx-PT-7-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
LamportFastMutEx-PT-7-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-7"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is LamportFastMutEx-PT-7, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r230-tall-167856414600434"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-7.tgz
mv LamportFastMutEx-PT-7 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;