Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r199-smll-167840346100570.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is HouseConstruction-PT-00500, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840346100570
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 460K
-rw-r--r-- 1 mcc users 6.5K Feb 25 13:04 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K Feb 25 13:04 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K Feb 25 13:04 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 13:04 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:16 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:16 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:16 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:16 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 13:05 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 130K Feb 25 13:05 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.1K Feb 25 13:05 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 72K Feb 25 13:05 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:16 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:16 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 13K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME HouseConstruction-PT-00500-CTLFireability-00
FORMULA_NAME HouseConstruction-PT-00500-CTLFireability-01
FORMULA_NAME HouseConstruction-PT-00500-CTLFireability-02
FORMULA_NAME HouseConstruction-PT-00500-CTLFireability-03
FORMULA_NAME HouseConstruction-PT-00500-CTLFireability-04
FORMULA_NAME HouseConstruction-PT-00500-CTLFireability-05
FORMULA_NAME HouseConstruction-PT-00500-CTLFireability-06
FORMULA_NAME HouseConstruction-PT-00500-CTLFireability-07
FORMULA_NAME HouseConstruction-PT-00500-CTLFireability-08
FORMULA_NAME HouseConstruction-PT-00500-CTLFireability-09
FORMULA_NAME HouseConstruction-PT-00500-CTLFireability-10
FORMULA_NAME HouseConstruction-PT-00500-CTLFireability-11
FORMULA_NAME HouseConstruction-PT-00500-CTLFireability-12
FORMULA_NAME HouseConstruction-PT-00500-CTLFireability-13
FORMULA_NAME HouseConstruction-PT-00500-CTLFireability-14
FORMULA_NAME HouseConstruction-PT-00500-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678565042012

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=HouseConstruction-PT-00500
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 20:04:06] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-11 20:04:06] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 20:04:06] [INFO ] Load time of PNML (sax parser for PT used): 50 ms
[2023-03-11 20:04:06] [INFO ] Transformed 26 places.
[2023-03-11 20:04:06] [INFO ] Transformed 18 transitions.
[2023-03-11 20:04:06] [INFO ] Parsed PT model containing 26 places and 18 transitions and 51 arcs in 288 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 24 ms.
Support contains 26 out of 26 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 20 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
// Phase 1: matrix 18 rows 26 cols
[2023-03-11 20:04:06] [INFO ] Computed 8 place invariants in 9 ms
[2023-03-11 20:04:06] [INFO ] Implicit Places using invariants in 243 ms returned []
[2023-03-11 20:04:06] [INFO ] Invariant cache hit.
[2023-03-11 20:04:06] [INFO ] Implicit Places using invariants and state equation in 83 ms returned []
Implicit Place search using SMT with State Equation took 386 ms to find 0 implicit places.
[2023-03-11 20:04:06] [INFO ] Invariant cache hit.
[2023-03-11 20:04:06] [INFO ] Dead Transitions using invariants and state equation in 77 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 487 ms. Remains : 26/26 places, 18/18 transitions.
Support contains 26 out of 26 places after structural reductions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 31 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 12 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 18 transitions.
Incomplete random walk after 10023 steps, including 2 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 32) seen :18
Finished Best-First random walk after 446 steps, including 0 resets, run visited all 14 properties in 19 ms. (steps per millisecond=23 )
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 6 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 8 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 18 transitions.
Computed a total of 26 stabilizing places and 18 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 26 transition count 18
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 3 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 3 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 3 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Reduce places removed 2 places and 1 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 24 transition count 15
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 4 place count 22 transition count 15
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 3 Pre rules applied. Total rules applied 4 place count 22 transition count 12
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 10 place count 19 transition count 12
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 2 with 1 rules applied. Total rules applied 11 place count 18 transition count 12
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 11 place count 18 transition count 11
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 13 place count 17 transition count 11
Applied a total of 13 rules in 23 ms. Remains 17 /26 variables (removed 9) and now considering 11/18 (removed 7) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 23 ms. Remains : 17/26 places, 11/18 transitions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 2 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 2 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 1 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 2 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 2 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 26/26 places, 18/18 transitions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 2 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 3 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 0 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 2 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 2 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Reduce places removed 1 places and 1 transitions.
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 3 Pre rules applied. Total rules applied 0 place count 25 transition count 14
Deduced a syphon composed of 3 places in 0 ms
Ensure Unique test removed 2 places
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 0 with 8 rules applied. Total rules applied 8 place count 20 transition count 14
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 8 place count 20 transition count 13
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 10 place count 19 transition count 13
Applied a total of 10 rules in 11 ms. Remains 19 /26 variables (removed 7) and now considering 13/18 (removed 5) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 19/26 places, 13/18 transitions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 2 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 1 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 13 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 1 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 2 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 1 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 19 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.1 ms
Discarding 7 places :
Also discarding 4 output transitions
Drop transitions removed 4 transitions
Ensure Unique test removed 1 places
Reduce places removed 2 places and 1 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 3 place count 17 transition count 11
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 5 place count 15 transition count 11
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 5 place count 15 transition count 9
Deduced a syphon composed of 2 places in 0 ms
Ensure Unique test removed 2 places
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 11 place count 11 transition count 9
Applied a total of 11 rules in 15 ms. Remains 11 /26 variables (removed 15) and now considering 9/18 (removed 9) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15 ms. Remains : 11/26 places, 9/18 transitions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 1 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 1 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 25 transition count 17
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 24 transition count 17
Applied a total of 2 rules in 3 ms. Remains 24 /26 variables (removed 2) and now considering 17/18 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 24/26 places, 17/18 transitions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 2 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 1 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 17 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Reduce places removed 2 places and 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 24 transition count 16
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 3 place count 23 transition count 15
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 4 place count 22 transition count 15
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 3 Pre rules applied. Total rules applied 4 place count 22 transition count 12
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 10 place count 19 transition count 12
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 3 with 1 rules applied. Total rules applied 11 place count 18 transition count 12
Applied a total of 11 rules in 8 ms. Remains 18 /26 variables (removed 8) and now considering 12/18 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 18/26 places, 12/18 transitions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 2 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 2 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 26 /26 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 26/26 places, 18/18 transitions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 1 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 1 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 1 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 1 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 1 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Reduce places removed 2 places and 1 transitions.
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 2 Pre rules applied. Total rules applied 0 place count 24 transition count 15
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 22 transition count 15
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 5 place count 21 transition count 15
Applied a total of 5 rules in 7 ms. Remains 21 /26 variables (removed 5) and now considering 15/18 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 21/26 places, 15/18 transitions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 1 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 11 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 19 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.0 ms
Discarding 7 places :
Also discarding 4 output transitions
Drop transitions removed 4 transitions
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 19 transition count 13
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 18 transition count 13
Applied a total of 3 rules in 3 ms. Remains 18 /26 variables (removed 8) and now considering 13/18 (removed 5) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 18/26 places, 13/18 transitions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 1 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 1 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 13 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Graph (complete) has 31 edges and 26 vertex of which 14 are kept as prefixes of interest. Removing 12 places using SCC suffix rule.0 ms
Discarding 12 places :
Also discarding 8 output transitions
Drop transitions removed 8 transitions
Reduce places removed 1 places and 1 transitions.
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 2 Pre rules applied. Total rules applied 1 place count 13 transition count 7
Deduced a syphon composed of 2 places in 0 ms
Ensure Unique test removed 2 places
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 7 place count 9 transition count 7
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 7 place count 9 transition count 6
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 9 place count 8 transition count 6
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 10 place count 7 transition count 6
Applied a total of 10 rules in 8 ms. Remains 7 /26 variables (removed 19) and now considering 6/18 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 7/26 places, 6/18 transitions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 1 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 0 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 18/18 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 25 transition count 18
Applied a total of 1 rules in 1 ms. Remains 25 /26 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/26 places, 18/18 transitions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 1 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 2 ms
[2023-03-11 20:04:07] [INFO ] Input system was already deterministic with 18 transitions.
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 3 ms
[2023-03-11 20:04:07] [INFO ] Flatten gal took : 3 ms
[2023-03-11 20:04:07] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-11 20:04:07] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 26 places, 18 transitions and 51 arcs took 0 ms.
Total runtime 1886 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT HouseConstruction-PT-00500
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA HouseConstruction-PT-00500-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00500-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00500-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00500-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HouseConstruction-PT-00500-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678565279516

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
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HouseConstruction-PT-00500-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00500-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
HouseConstruction-PT-00500-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
HouseConstruction-PT-00500-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 10/1141 16/32 HouseConstruction-PT-00500-CTLFireability-13 3570130 m, 268762 m/sec, 13003678 t fired, .

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HouseConstruction-PT-00500-CTLFireability-02: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-06: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-09: DISJ true state space / EG
HouseConstruction-PT-00500-CTLFireability-11: EXEF true state space /EXEF

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48 CTL EXCL 15/1141 21/32 HouseConstruction-PT-00500-CTLFireability-13 4845300 m, 255034 m/sec, 19049676 t fired, .

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HouseConstruction-PT-00500-CTLFireability-02: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-06: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-09: DISJ true state space / EG
HouseConstruction-PT-00500-CTLFireability-11: EXEF true state space /EXEF

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HouseConstruction-PT-00500-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
HouseConstruction-PT-00500-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
HouseConstruction-PT-00500-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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48 CTL EXCL 20/1141 26/32 HouseConstruction-PT-00500-CTLFireability-13 6114723 m, 253884 m/sec, 25108870 t fired, .

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HouseConstruction-PT-00500-CTLFireability-06: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-09: DISJ true state space / EG
HouseConstruction-PT-00500-CTLFireability-11: EXEF true state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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HouseConstruction-PT-00500-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
HouseConstruction-PT-00500-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
HouseConstruction-PT-00500-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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48 CTL EXCL 25/1141 31/32 HouseConstruction-PT-00500-CTLFireability-13 7366340 m, 250323 m/sec, 31062575 t fired, .

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HouseConstruction-PT-00500-CTLFireability-02: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-06: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-09: DISJ true state space / EG
HouseConstruction-PT-00500-CTLFireability-11: EXEF true state space /EXEF

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HouseConstruction-PT-00500-CTLFireability-02: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-06: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-09: DISJ true state space / EG
HouseConstruction-PT-00500-CTLFireability-11: EXEF true state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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HouseConstruction-PT-00500-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
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HouseConstruction-PT-00500-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
HouseConstruction-PT-00500-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HouseConstruction-PT-00500-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HouseConstruction-PT-00500-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
HouseConstruction-PT-00500-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
HouseConstruction-PT-00500-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
HouseConstruction-PT-00500-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 5/1697 26/32 HouseConstruction-PT-00500-CTLFireability-12 5710575 m, 1142115 m/sec, 5832562 t fired, .

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HouseConstruction-PT-00500-CTLFireability-02: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-06: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-09: DISJ true state space / EG
HouseConstruction-PT-00500-CTLFireability-11: EXEF true state space /EXEF

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HouseConstruction-PT-00500-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
HouseConstruction-PT-00500-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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HouseConstruction-PT-00500-CTLFireability-02: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-06: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-09: DISJ true state space / EG
HouseConstruction-PT-00500-CTLFireability-11: EXEF true state space /EXEF

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29 CTL EXCL 5/3385 17/32 HouseConstruction-PT-00500-CTLFireability-08 3803313 m, 760662 m/sec, 5244778 t fired, .

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HouseConstruction-PT-00500-CTLFireability-02: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-06: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-09: DISJ true state space / EG
HouseConstruction-PT-00500-CTLFireability-11: EXEF true state space /EXEF

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29 CTL EXCL 10/3385 27/32 HouseConstruction-PT-00500-CTLFireability-08 6433821 m, 526101 m/sec, 10495439 t fired, .

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HouseConstruction-PT-00500-CTLFireability-06: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-09: DISJ true state space / EG
HouseConstruction-PT-00500-CTLFireability-11: EXEF true state space /EXEF

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HouseConstruction-PT-00500-CTLFireability-00: CONJ false CTL model checker
HouseConstruction-PT-00500-CTLFireability-01: CTL unknown AGGR
HouseConstruction-PT-00500-CTLFireability-02: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-03: CTL unknown AGGR
HouseConstruction-PT-00500-CTLFireability-04: CTL unknown AGGR
HouseConstruction-PT-00500-CTLFireability-05: CTL unknown AGGR
HouseConstruction-PT-00500-CTLFireability-06: CTL true CTL model checker
HouseConstruction-PT-00500-CTLFireability-07: CTL unknown AGGR
HouseConstruction-PT-00500-CTLFireability-08: CTL unknown AGGR
HouseConstruction-PT-00500-CTLFireability-09: DISJ true state space / EG
HouseConstruction-PT-00500-CTLFireability-10: CTL unknown AGGR
HouseConstruction-PT-00500-CTLFireability-11: EXEF true state space /EXEF
HouseConstruction-PT-00500-CTLFireability-12: CTL unknown AGGR
HouseConstruction-PT-00500-CTLFireability-13: CTL unknown AGGR
HouseConstruction-PT-00500-CTLFireability-14: CTL unknown AGGR
HouseConstruction-PT-00500-CTLFireability-15: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HouseConstruction-PT-00500"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is HouseConstruction-PT-00500, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840346100570"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/HouseConstruction-PT-00500.tgz
mv HouseConstruction-PT-00500 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;