fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r199-smll-167840346100502
Last Updated
May 14, 2023

About the Execution of LoLa+red for HirschbergSinclair-PT-50

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
395.191 27140.00 46132.00 691.30 FFTFTTTFTFFTTTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r199-smll-167840346100502.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is HirschbergSinclair-PT-50, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840346100502
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 13K Feb 26 02:12 CTLCardinality.txt
-rw-r--r-- 1 mcc users 95K Feb 26 02:12 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.0K Feb 26 02:11 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K Feb 26 02:11 CTLFireability.xml
-rw-r--r-- 1 mcc users 5.4K Feb 25 16:15 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 16:15 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:15 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:15 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 02:12 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 101K Feb 26 02:12 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.8K Feb 26 02:12 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 26 02:12 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 16:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 652K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME HirschbergSinclair-PT-50-ReachabilityCardinality-00
FORMULA_NAME HirschbergSinclair-PT-50-ReachabilityCardinality-01
FORMULA_NAME HirschbergSinclair-PT-50-ReachabilityCardinality-02
FORMULA_NAME HirschbergSinclair-PT-50-ReachabilityCardinality-03
FORMULA_NAME HirschbergSinclair-PT-50-ReachabilityCardinality-04
FORMULA_NAME HirschbergSinclair-PT-50-ReachabilityCardinality-05
FORMULA_NAME HirschbergSinclair-PT-50-ReachabilityCardinality-06
FORMULA_NAME HirschbergSinclair-PT-50-ReachabilityCardinality-07
FORMULA_NAME HirschbergSinclair-PT-50-ReachabilityCardinality-08
FORMULA_NAME HirschbergSinclair-PT-50-ReachabilityCardinality-09
FORMULA_NAME HirschbergSinclair-PT-50-ReachabilityCardinality-10
FORMULA_NAME HirschbergSinclair-PT-50-ReachabilityCardinality-11
FORMULA_NAME HirschbergSinclair-PT-50-ReachabilityCardinality-12
FORMULA_NAME HirschbergSinclair-PT-50-ReachabilityCardinality-13
FORMULA_NAME HirschbergSinclair-PT-50-ReachabilityCardinality-14
FORMULA_NAME HirschbergSinclair-PT-50-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678557319156

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=HirschbergSinclair-PT-50
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 17:55:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-11 17:55:23] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 17:55:23] [INFO ] Load time of PNML (sax parser for PT used): 235 ms
[2023-03-11 17:55:23] [INFO ] Transformed 1208 places.
[2023-03-11 17:55:23] [INFO ] Transformed 1102 transitions.
[2023-03-11 17:55:23] [INFO ] Parsed PT model containing 1208 places and 1102 transitions and 3361 arcs in 407 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 37 ms.
Working with output stream class java.io.PrintStream
Incomplete random walk after 10000 steps, including 9 resets, run finished after 774 ms. (steps per millisecond=12 ) properties (out of 16) seen :9
FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-15 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-14 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-09 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-07 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-03 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-01 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-00 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 56 ms. (steps per millisecond=178 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 69 ms. (steps per millisecond=144 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
// Phase 1: matrix 1102 rows 1208 cols
[2023-03-11 17:55:24] [INFO ] Computed 106 place invariants in 65 ms
[2023-03-11 17:55:26] [INFO ] After 1077ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:7
[2023-03-11 17:55:26] [INFO ] [Nat]Absence check using 100 positive place invariants in 106 ms returned sat
[2023-03-11 17:55:26] [INFO ] [Nat]Absence check using 100 positive and 6 generalized place invariants in 9 ms returned sat
[2023-03-11 17:55:29] [INFO ] After 2946ms SMT Verify possible using state equation in natural domain returned unsat :5 sat :2
[2023-03-11 17:55:30] [INFO ] Deduced a trap composed of 184 places in 647 ms of which 15 ms to minimize.
[2023-03-11 17:55:31] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 932 ms
[2023-03-11 17:55:33] [INFO ] Deduced a trap composed of 13 places in 708 ms of which 2 ms to minimize.
[2023-03-11 17:55:34] [INFO ] Deduced a trap composed of 95 places in 499 ms of which 3 ms to minimize.
[2023-03-11 17:55:35] [INFO ] Deduced a trap composed of 105 places in 607 ms of which 2 ms to minimize.
[2023-03-11 17:55:36] [INFO ] Trap strengthening (SAT) tested/added 4/3 trap constraints in 3434 ms
[2023-03-11 17:55:36] [INFO ] After 9263ms SMT Verify possible using trap constraints in natural domain returned unsat :5 sat :2
Attempting to minimize the solution found.
Minimization took 1548 ms.
[2023-03-11 17:55:37] [INFO ] After 11600ms SMT Verify possible using all constraints in natural domain returned unsat :5 sat :2
FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-13 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-12 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-11 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-06 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 7 Parikh solutions to 2 different solutions.
Parikh walk visited 0 properties in 106 ms.
Support contains 55 out of 1208 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1208/1208 places, 1102/1102 transitions.
Graph (complete) has 2314 edges and 1208 vertex of which 1157 are kept as prefixes of interest. Removing 51 places using SCC suffix rule.6 ms
Discarding 51 places :
Also discarding 0 output transitions
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Drop transitions removed 415 transitions
Trivial Post-agglo rules discarded 415 transitions
Performed 415 trivial Post agglomeration. Transition count delta: 415
Iterating post reduction 0 with 417 rules applied. Total rules applied 418 place count 1157 transition count 685
Reduce places removed 415 places and 0 transitions.
Graph (complete) has 1246 edges and 742 vertex of which 617 are kept as prefixes of interest. Removing 125 places using SCC suffix rule.2 ms
Discarding 125 places :
Also discarding 0 output transitions
Performed 24 Post agglomeration using F-continuation condition.Transition count delta: 24
Iterating post reduction 1 with 440 rules applied. Total rules applied 858 place count 617 transition count 661
Reduce places removed 24 places and 0 transitions.
Drop transitions removed 125 transitions
Reduce isomorphic transitions removed 125 transitions.
Iterating post reduction 2 with 149 rules applied. Total rules applied 1007 place count 593 transition count 536
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 1011 place count 589 transition count 532
Iterating global reduction 3 with 4 rules applied. Total rules applied 1015 place count 589 transition count 532
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 1019 place count 585 transition count 528
Iterating global reduction 3 with 4 rules applied. Total rules applied 1023 place count 585 transition count 528
Free-agglomeration rule (complex) applied 62 times.
Iterating global reduction 3 with 62 rules applied. Total rules applied 1085 place count 585 transition count 466
Reduce places removed 62 places and 0 transitions.
Iterating post reduction 3 with 62 rules applied. Total rules applied 1147 place count 523 transition count 466
Reduce places removed 43 places and 43 transitions.
Iterating global reduction 4 with 43 rules applied. Total rules applied 1190 place count 480 transition count 423
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 1191 place count 479 transition count 423
Performed 11 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 11 Pre rules applied. Total rules applied 1191 place count 479 transition count 412
Deduced a syphon composed of 11 places in 7 ms
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 5 with 22 rules applied. Total rules applied 1213 place count 468 transition count 412
Applied a total of 1213 rules in 322 ms. Remains 468 /1208 variables (removed 740) and now considering 412/1102 (removed 690) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 323 ms. Remains : 468/1208 places, 412/1102 transitions.
Incomplete random walk after 10000 steps, including 24 resets, run finished after 189 ms. (steps per millisecond=52 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 6 resets, run finished after 59 ms. (steps per millisecond=169 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 5 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 2) seen :1
FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-10 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Running SMT prover for 1 properties.
// Phase 1: matrix 412 rows 468 cols
[2023-03-11 17:55:38] [INFO ] Computed 56 place invariants in 18 ms
[2023-03-11 17:55:38] [INFO ] After 109ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-11 17:55:38] [INFO ] [Nat]Absence check using 2 positive place invariants in 11 ms returned sat
[2023-03-11 17:55:38] [INFO ] [Nat]Absence check using 2 positive and 54 generalized place invariants in 203 ms returned sat
[2023-03-11 17:55:39] [INFO ] After 566ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-11 17:55:39] [INFO ] State equation strengthened by 29 read => feed constraints.
[2023-03-11 17:55:39] [INFO ] After 152ms SMT Verify possible using 29 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-11 17:55:39] [INFO ] After 342ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 164 ms.
[2023-03-11 17:55:39] [INFO ] After 1384ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 5 ms.
Support contains 17 out of 468 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 468/468 places, 412/412 transitions.
Graph (complete) has 857 edges and 468 vertex of which 459 are kept as prefixes of interest. Removing 9 places using SCC suffix rule.2 ms
Discarding 9 places :
Also discarding 0 output transitions
Drop transitions removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Drop transitions removed 17 transitions
Trivial Post-agglo rules discarded 17 transitions
Performed 17 trivial Post agglomeration. Transition count delta: 17
Iterating post reduction 0 with 25 rules applied. Total rules applied 26 place count 459 transition count 387
Reduce places removed 30 places and 0 transitions.
Graph (complete) has 689 edges and 429 vertex of which 423 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.2 ms
Discarding 6 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Drop transitions removed 49 transitions
Trivial Post-agglo rules discarded 49 transitions
Performed 49 trivial Post agglomeration. Transition count delta: 49
Iterating post reduction 1 with 80 rules applied. Total rules applied 106 place count 423 transition count 337
Reduce places removed 49 places and 0 transitions.
Drop transitions removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 55 rules applied. Total rules applied 161 place count 374 transition count 331
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 162 place count 373 transition count 331
Performed 36 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 36 Pre rules applied. Total rules applied 162 place count 373 transition count 295
Deduced a syphon composed of 36 places in 11 ms
Reduce places removed 36 places and 0 transitions.
Iterating global reduction 4 with 72 rules applied. Total rules applied 234 place count 337 transition count 295
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 10 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 236 place count 336 transition count 294
Free-agglomeration rule (complex) applied 4 times.
Iterating global reduction 4 with 4 rules applied. Total rules applied 240 place count 336 transition count 290
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 4 with 4 rules applied. Total rules applied 244 place count 332 transition count 290
Reduce places removed 5 places and 5 transitions.
Iterating global reduction 5 with 5 rules applied. Total rules applied 249 place count 327 transition count 285
Reduce places removed 2 places and 0 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 5 with 7 rules applied. Total rules applied 256 place count 325 transition count 280
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 6 with 5 rules applied. Total rules applied 261 place count 320 transition count 280
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 7 with 4 Pre rules applied. Total rules applied 261 place count 320 transition count 276
Deduced a syphon composed of 4 places in 9 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 7 with 8 rules applied. Total rules applied 269 place count 316 transition count 276
Applied a total of 269 rules in 210 ms. Remains 316 /468 variables (removed 152) and now considering 276/412 (removed 136) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 210 ms. Remains : 316/468 places, 276/412 transitions.
Incomplete random walk after 10000 steps, including 36 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 1) seen :0
Finished Best-First random walk after 854 steps, including 0 resets, run visited all 1 properties in 3 ms. (steps per millisecond=284 )
FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
All properties solved without resorting to model-checking.
Total runtime 17239 ms.
starting LoLA
BK_INPUT HirschbergSinclair-PT-50
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HirschbergSinclair-PT-50-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678557346296

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 73 (type EXCL) for 6 HirschbergSinclair-PT-50-ReachabilityCardinality-02
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 53 (type FNDP) for 3 HirschbergSinclair-PT-50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type EQUN) for 3 HirschbergSinclair-PT-50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SRCH) for 3 HirschbergSinclair-PT-50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 53 (type FNDP) for HirschbergSinclair-PT-50-ReachabilityCardinality-01
lola: result : true
lola: fired transitions : 7
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 54 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 89 (type SRCH) for HirschbergSinclair-PT-50-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 48 (type FNDP) for 12 HirschbergSinclair-PT-50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 51 (type EQUN) for 12 HirschbergSinclair-PT-50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 92 (type SRCH) for 12 HirschbergSinclair-PT-50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 92 (type SRCH) for HirschbergSinclair-PT-50-ReachabilityCardinality-04
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 48 (type FNDP) for HirschbergSinclair-PT-50-ReachabilityCardinality-04
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 73 (type EXCL) for HirschbergSinclair-PT-50-ReachabilityCardinality-02
lola: result : true
lola: markings : 238
lola: fired transitions : 237
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 51 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 121 (type EXCL) for 36 HirschbergSinclair-PT-50-ReachabilityCardinality-12
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 56 (type FNDP) for 39 HirschbergSinclair-PT-50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type EQUN) for 39 HirschbergSinclair-PT-50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type SRCH) for 39 HirschbergSinclair-PT-50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-54.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-57.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787

lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 54 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-01
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 121 (type EXCL) for HirschbergSinclair-PT-50-ReachabilityCardinality-12
lola: result : false
lola: markings : 3959
lola: fired transitions : 5712
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 141 (type EXCL) for 24 HirschbergSinclair-PT-50-ReachabilityCardinality-08
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 141 (type EXCL) for HirschbergSinclair-PT-50-ReachabilityCardinality-08
lola: result : false
lola: markings : 205
lola: fired transitions : 265
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 154 (type EXCL) for 42 HirschbergSinclair-PT-50-ReachabilityCardinality-14
lola: time limit : 326 sec
lola: memory limit: 32 pages
lola: FINISHED task # 154 (type EXCL) for HirschbergSinclair-PT-50-ReachabilityCardinality-14
lola: result : true
lola: markings : 14
lola: fired transitions : 13
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 128 (type EXCL) for 18 HirschbergSinclair-PT-50-ReachabilityCardinality-06
lola: time limit : 359 sec
lola: memory limit: 32 pages

lola: FINISHED task # 51 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-04
lola: result : true

lola: FINISHED task # 57 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-13
lola: result : false
lola: CANCELED task # 56 (type FNDP) for HirschbergSinclair-PT-50-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 75 (type SRCH) for HirschbergSinclair-PT-50-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 144 (type FNDP) for 33 HirschbergSinclair-PT-50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 145 (type EQUN) for 33 HirschbergSinclair-PT-50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 147 (type SRCH) for 33 HirschbergSinclair-PT-50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 56 (type FNDP) for HirschbergSinclair-PT-50-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 96499
lola: tried executions : 2414
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 147 (type SRCH) for HirschbergSinclair-PT-50-ReachabilityCardinality-11
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 144 (type FNDP) for HirschbergSinclair-PT-50-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 145 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 83 (type FNDP) for 27 HirschbergSinclair-PT-50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 84 (type EQUN) for 27 HirschbergSinclair-PT-50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 86 (type SRCH) for 27 HirschbergSinclair-PT-50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-145.sara.

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 86 (type SRCH) for HirschbergSinclair-PT-50-ReachabilityCardinality-09
lola: result : true
lola: markings : 146
lola: fired transitions : 145
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 83 (type FNDP) for HirschbergSinclair-PT-50-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 84 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 107 (type FNDP) for 45 HirschbergSinclair-PT-50-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 108 (type EQUN) for 45 HirschbergSinclair-PT-50-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 110 (type SRCH) for 45 HirschbergSinclair-PT-50-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 83 (type FNDP) for HirschbergSinclair-PT-50-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 66
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 145 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-11
lola: result : false
lola: FINISHED task # 84 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-09
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 110 (type SRCH) for HirschbergSinclair-PT-50-ReachabilityCardinality-15
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 107 (type FNDP) for HirschbergSinclair-PT-50-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 108 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 69 (type FNDP) for 9 HirschbergSinclair-PT-50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type EQUN) for 9 HirschbergSinclair-PT-50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 77 (type SRCH) for 9 HirschbergSinclair-PT-50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 107 (type FNDP) for HirschbergSinclair-PT-50-ReachabilityCardinality-15
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 69 (type FNDP) for HirschbergSinclair-PT-50-ReachabilityCardinality-03
lola: result : true
lola: fired transitions : 6
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 70 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 77 (type SRCH) for HirschbergSinclair-PT-50-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 63 (type FNDP) for 21 HirschbergSinclair-PT-50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type EQUN) for 21 HirschbergSinclair-PT-50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 79 (type SRCH) for 21 HirschbergSinclair-PT-50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 63 (type FNDP) for HirschbergSinclair-PT-50-ReachabilityCardinality-07
lola: result : true
lola: fired transitions : 23
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 67 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 79 (type SRCH) for HirschbergSinclair-PT-50-ReachabilityCardinality-07 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 102 (type FNDP) for 0 HirschbergSinclair-PT-50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type EQUN) for 0 HirschbergSinclair-PT-50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type SRCH) for 0 HirschbergSinclair-PT-50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-70.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-108.sara.

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 113 (type SRCH) for HirschbergSinclair-PT-50-ReachabilityCardinality-00
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 70 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-03
lola: result : true
lola: CANCELED task # 102 (type FNDP) for HirschbergSinclair-PT-50-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 103 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 66 (type FNDP) for 30 HirschbergSinclair-PT-50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type EQUN) for 30 HirschbergSinclair-PT-50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 98 (type SRCH) for 30 HirschbergSinclair-PT-50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 102 (type FNDP) for HirschbergSinclair-PT-50-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-103.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 66 (type FNDP) for HirschbergSinclair-PT-50-ReachabilityCardinality-10
lola: result : true
lola: fired transitions : 156
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 96 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 98 (type SRCH) for HirschbergSinclair-PT-50-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 130 (type FNDP) for 15 HirschbergSinclair-PT-50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 131 (type EQUN) for 15 HirschbergSinclair-PT-50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 133 (type SRCH) for 15 HirschbergSinclair-PT-50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 130 (type FNDP) for HirschbergSinclair-PT-50-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 11
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 131 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 133 (type SRCH) for HirschbergSinclair-PT-50-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 124 (type FNDP) for 18 HirschbergSinclair-PT-50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 125 (type EQUN) for 18 HirschbergSinclair-PT-50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 127 (type SRCH) for 18 HirschbergSinclair-PT-50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-131.sara.

lola: FINISHED task # 103 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-00
lola: result : true
lola: FINISHED task # 131 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-05
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-96.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-125.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-67.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 108 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-15
lola: result : unknown
lola: FINISHED task # 127 (type SRCH) for HirschbergSinclair-PT-50-ReachabilityCardinality-06
lola: result : false
lola: markings : 26266
lola: fired transitions : 37256
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 124 (type FNDP) for HirschbergSinclair-PT-50-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 125 (type EQUN) for HirschbergSinclair-PT-50-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 128 (type EXCL) for HirschbergSinclair-PT-50-ReachabilityCardinality-06 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HirschbergSinclair-PT-50-ReachabilityCardinality-00: AG false tandem / insertion
HirschbergSinclair-PT-50-ReachabilityCardinality-01: AG false findpath
HirschbergSinclair-PT-50-ReachabilityCardinality-02: EF true tandem / relaxed
HirschbergSinclair-PT-50-ReachabilityCardinality-03: AG false findpath
HirschbergSinclair-PT-50-ReachabilityCardinality-04: EF true findpath
HirschbergSinclair-PT-50-ReachabilityCardinality-05: EF true findpath
HirschbergSinclair-PT-50-ReachabilityCardinality-06: AG true tandem / insertion
HirschbergSinclair-PT-50-ReachabilityCardinality-07: AG false findpath
HirschbergSinclair-PT-50-ReachabilityCardinality-08: AG true tandem / relaxed
HirschbergSinclair-PT-50-ReachabilityCardinality-09: AG false tandem / insertion
HirschbergSinclair-PT-50-ReachabilityCardinality-10: AG false findpath
HirschbergSinclair-PT-50-ReachabilityCardinality-11: AG true tandem / insertion
HirschbergSinclair-PT-50-ReachabilityCardinality-12: AG true tandem / relaxed
HirschbergSinclair-PT-50-ReachabilityCardinality-13: AG true state equation
HirschbergSinclair-PT-50-ReachabilityCardinality-14: EF true tandem / relaxed
HirschbergSinclair-PT-50-ReachabilityCardinality-15: AG false tandem / insertion


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HirschbergSinclair-PT-50"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is HirschbergSinclair-PT-50, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840346100502"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/HirschbergSinclair-PT-50.tgz
mv HirschbergSinclair-PT-50 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;