fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r199-smll-167840345700218
Last Updated
May 14, 2023

About the Execution of LoLa+red for GlobalResAllocation-PT-03

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
4572.268 34301.00 58620.00 871.40 FFTTFTFFTTTFFTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r199-smll-167840345700218.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is GlobalResAllocation-PT-03, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840345700218
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 20M
-rw-r--r-- 1 mcc users 17K Feb 25 17:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 103K Feb 25 17:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 1.1M Feb 25 17:47 CTLFireability.txt
-rw-r--r-- 1 mcc users 4.3M Feb 25 17:47 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 9.1K Feb 25 16:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 41K Feb 25 16:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 535K Feb 25 16:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 1.7M Feb 25 16:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 25 18:31 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 104K Feb 25 18:31 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 1.2M Feb 25 18:27 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 4.6M Feb 25 18:27 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 16:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.4K Feb 25 16:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 5.7M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GlobalResAllocation-PT-03-CTLFireability-00
FORMULA_NAME GlobalResAllocation-PT-03-CTLFireability-01
FORMULA_NAME GlobalResAllocation-PT-03-CTLFireability-02
FORMULA_NAME GlobalResAllocation-PT-03-CTLFireability-03
FORMULA_NAME GlobalResAllocation-PT-03-CTLFireability-04
FORMULA_NAME GlobalResAllocation-PT-03-CTLFireability-05
FORMULA_NAME GlobalResAllocation-PT-03-CTLFireability-06
FORMULA_NAME GlobalResAllocation-PT-03-CTLFireability-07
FORMULA_NAME GlobalResAllocation-PT-03-CTLFireability-08
FORMULA_NAME GlobalResAllocation-PT-03-CTLFireability-09
FORMULA_NAME GlobalResAllocation-PT-03-CTLFireability-10
FORMULA_NAME GlobalResAllocation-PT-03-CTLFireability-11
FORMULA_NAME GlobalResAllocation-PT-03-CTLFireability-12
FORMULA_NAME GlobalResAllocation-PT-03-CTLFireability-13
FORMULA_NAME GlobalResAllocation-PT-03-CTLFireability-14
FORMULA_NAME GlobalResAllocation-PT-03-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678496812779

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=GlobalResAllocation-PT-03
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 01:06:56] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-11 01:06:56] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 01:06:57] [INFO ] Load time of PNML (sax parser for PT used): 705 ms
[2023-03-11 01:06:57] [INFO ] Transformed 33 places.
[2023-03-11 01:06:57] [INFO ] Transformed 4791 transitions.
[2023-03-11 01:06:57] [INFO ] Parsed PT model containing 33 places and 4791 transitions and 38652 arcs in 872 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 201 ms.
[2023-03-11 01:06:57] [INFO ] Reduced 480 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 480 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 45 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 480 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 3510 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 45 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 3510 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 480 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 45 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 3510 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 3510 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 3510 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 45 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 3510 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 480 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 480 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 45 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 45 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 45 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 3510 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 3510 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 45 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 480 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 45 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 3510 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 45 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 480 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 45 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 45 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 3510 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 45 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 3510 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 45 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 45 identical enabling conditions.
[2023-03-11 01:06:57] [INFO ] Reduced 45 identical enabling conditions.
Ensure Unique test removed 4080 transitions
Reduce redundant transitions removed 4080 transitions.
Support contains 33 out of 33 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 711/711 transitions.
Reduce isomorphic (modulo) transitions removed 36 transitions.
Iterating post reduction 0 with 36 rules applied. Total rules applied 36 place count 33 transition count 693
Applied a total of 36 rules in 52 ms. Remains 33 /33 variables (removed 0) and now considering 693/711 (removed 18) transitions.
// Phase 1: matrix 693 rows 33 cols
[2023-03-11 01:06:57] [INFO ] Computed 12 place invariants in 43 ms
[2023-03-11 01:06:58] [INFO ] Dead Transitions using invariants and state equation in 826 ms found 459 transitions.
Found 459 dead transitions using SMT.
Drop transitions removed 459 transitions
Dead transitions reduction (with SMT) triggered by suspicious arc values removed 459 transitions.
// Phase 1: matrix 234 rows 33 cols
[2023-03-11 01:06:58] [INFO ] Computed 12 place invariants in 5 ms
[2023-03-11 01:06:58] [INFO ] Implicit Places using invariants in 52 ms returned []
[2023-03-11 01:06:58] [INFO ] Invariant cache hit.
[2023-03-11 01:06:58] [INFO ] Implicit Places using invariants and state equation in 144 ms returned []
Implicit Place search using SMT with State Equation took 220 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 33/33 places, 234/711 transitions.
Applied a total of 0 rules in 3 ms. Remains 33 /33 variables (removed 0) and now considering 234/234 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1150 ms. Remains : 33/33 places, 234/711 transitions.
Support contains 33 out of 33 places after structural reductions.
[2023-03-11 01:06:59] [INFO ] Flatten gal took : 149 ms
[2023-03-11 01:07:00] [INFO ] Flatten gal took : 213 ms
[2023-03-11 01:07:01] [INFO ] Input system was already deterministic with 234 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 1247 ms. (steps per millisecond=8 ) properties (out of 71) seen :37
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 34) seen :0
Running SMT prover for 34 properties.
[2023-03-11 01:07:03] [INFO ] Invariant cache hit.
[2023-03-11 01:07:03] [INFO ] [Real]Absence check using 7 positive place invariants in 3 ms returned sat
[2023-03-11 01:07:03] [INFO ] [Real]Absence check using 7 positive and 5 generalized place invariants in 2 ms returned sat
[2023-03-11 01:07:03] [INFO ] After 206ms SMT Verify possible using all constraints in real domain returned unsat :27 sat :0 real:7
[2023-03-11 01:07:03] [INFO ] [Nat]Absence check using 7 positive place invariants in 2 ms returned sat
[2023-03-11 01:07:03] [INFO ] [Nat]Absence check using 7 positive and 5 generalized place invariants in 2 ms returned sat
[2023-03-11 01:07:03] [INFO ] After 76ms SMT Verify possible using all constraints in natural domain returned unsat :34 sat :0
Fused 34 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 34 atomic propositions for a total of 16 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA GlobalResAllocation-PT-03-CTLFireability-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-11 01:07:04] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2023-03-11 01:07:04] [INFO ] Flatten gal took : 118 ms
[2023-03-11 01:07:04] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
FORMULA GlobalResAllocation-PT-03-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-PT-03-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-PT-03-CTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-PT-03-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-11 01:07:05] [INFO ] Flatten gal took : 113 ms
[2023-03-11 01:07:05] [INFO ] Input system was already deterministic with 234 transitions.
FORMULA GlobalResAllocation-PT-03-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 234/234 transitions.
Applied a total of 0 rules in 2 ms. Remains 33 /33 variables (removed 0) and now considering 234/234 (removed 0) transitions.
[2023-03-11 01:07:05] [INFO ] Invariant cache hit.
[2023-03-11 01:07:05] [INFO ] Dead Transitions using invariants and state equation in 217 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 222 ms. Remains : 33/33 places, 234/234 transitions.
[2023-03-11 01:07:05] [INFO ] Flatten gal took : 44 ms
[2023-03-11 01:07:06] [INFO ] Flatten gal took : 68 ms
[2023-03-11 01:07:06] [INFO ] Input system was already deterministic with 234 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 33/33 places, 234/234 transitions.
Applied a total of 0 rules in 26 ms. Remains 33 /33 variables (removed 0) and now considering 234/234 (removed 0) transitions.
[2023-03-11 01:07:06] [INFO ] Invariant cache hit.
[2023-03-11 01:07:06] [INFO ] Dead Transitions using invariants and state equation in 194 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 223 ms. Remains : 33/33 places, 234/234 transitions.
[2023-03-11 01:07:06] [INFO ] Flatten gal took : 36 ms
[2023-03-11 01:07:06] [INFO ] Flatten gal took : 39 ms
[2023-03-11 01:07:06] [INFO ] Input system was already deterministic with 234 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 33/33 places, 234/234 transitions.
Applied a total of 0 rules in 23 ms. Remains 33 /33 variables (removed 0) and now considering 234/234 (removed 0) transitions.
[2023-03-11 01:07:06] [INFO ] Invariant cache hit.
[2023-03-11 01:07:06] [INFO ] Dead Transitions using invariants and state equation in 195 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 221 ms. Remains : 33/33 places, 234/234 transitions.
[2023-03-11 01:07:06] [INFO ] Flatten gal took : 27 ms
[2023-03-11 01:07:06] [INFO ] Flatten gal took : 29 ms
[2023-03-11 01:07:06] [INFO ] Input system was already deterministic with 234 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 234/234 transitions.
Applied a total of 0 rules in 1 ms. Remains 33 /33 variables (removed 0) and now considering 234/234 (removed 0) transitions.
[2023-03-11 01:07:06] [INFO ] Invariant cache hit.
[2023-03-11 01:07:07] [INFO ] Dead Transitions using invariants and state equation in 186 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 191 ms. Remains : 33/33 places, 234/234 transitions.
[2023-03-11 01:07:07] [INFO ] Flatten gal took : 29 ms
[2023-03-11 01:07:07] [INFO ] Flatten gal took : 35 ms
[2023-03-11 01:07:07] [INFO ] Input system was already deterministic with 234 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 234/234 transitions.
Applied a total of 0 rules in 2 ms. Remains 33 /33 variables (removed 0) and now considering 234/234 (removed 0) transitions.
[2023-03-11 01:07:07] [INFO ] Invariant cache hit.
[2023-03-11 01:07:07] [INFO ] Dead Transitions using invariants and state equation in 172 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 177 ms. Remains : 33/33 places, 234/234 transitions.
[2023-03-11 01:07:07] [INFO ] Flatten gal took : 31 ms
[2023-03-11 01:07:07] [INFO ] Flatten gal took : 42 ms
[2023-03-11 01:07:07] [INFO ] Input system was already deterministic with 234 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 33/33 places, 234/234 transitions.
Applied a total of 0 rules in 13 ms. Remains 33 /33 variables (removed 0) and now considering 234/234 (removed 0) transitions.
[2023-03-11 01:07:07] [INFO ] Invariant cache hit.
[2023-03-11 01:07:07] [INFO ] Dead Transitions using invariants and state equation in 140 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 155 ms. Remains : 33/33 places, 234/234 transitions.
[2023-03-11 01:07:07] [INFO ] Flatten gal took : 15 ms
[2023-03-11 01:07:07] [INFO ] Flatten gal took : 16 ms
[2023-03-11 01:07:07] [INFO ] Input system was already deterministic with 234 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 234/234 transitions.
Applied a total of 0 rules in 1 ms. Remains 33 /33 variables (removed 0) and now considering 234/234 (removed 0) transitions.
[2023-03-11 01:07:07] [INFO ] Invariant cache hit.
[2023-03-11 01:07:08] [INFO ] Dead Transitions using invariants and state equation in 137 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 148 ms. Remains : 33/33 places, 234/234 transitions.
[2023-03-11 01:07:08] [INFO ] Flatten gal took : 18 ms
[2023-03-11 01:07:08] [INFO ] Flatten gal took : 23 ms
[2023-03-11 01:07:08] [INFO ] Input system was already deterministic with 234 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 234/234 transitions.
Applied a total of 0 rules in 2 ms. Remains 33 /33 variables (removed 0) and now considering 234/234 (removed 0) transitions.
[2023-03-11 01:07:08] [INFO ] Invariant cache hit.
[2023-03-11 01:07:08] [INFO ] Dead Transitions using invariants and state equation in 138 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 143 ms. Remains : 33/33 places, 234/234 transitions.
[2023-03-11 01:07:08] [INFO ] Flatten gal took : 29 ms
[2023-03-11 01:07:08] [INFO ] Flatten gal took : 47 ms
[2023-03-11 01:07:08] [INFO ] Input system was already deterministic with 234 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 33/33 places, 234/234 transitions.
Applied a total of 0 rules in 19 ms. Remains 33 /33 variables (removed 0) and now considering 234/234 (removed 0) transitions.
[2023-03-11 01:07:08] [INFO ] Invariant cache hit.
[2023-03-11 01:07:08] [INFO ] Dead Transitions using invariants and state equation in 148 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 169 ms. Remains : 33/33 places, 234/234 transitions.
[2023-03-11 01:07:08] [INFO ] Flatten gal took : 22 ms
[2023-03-11 01:07:08] [INFO ] Flatten gal took : 29 ms
[2023-03-11 01:07:08] [INFO ] Input system was already deterministic with 234 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 234/234 transitions.
Applied a total of 0 rules in 3 ms. Remains 33 /33 variables (removed 0) and now considering 234/234 (removed 0) transitions.
[2023-03-11 01:07:08] [INFO ] Invariant cache hit.
[2023-03-11 01:07:09] [INFO ] Dead Transitions using invariants and state equation in 191 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 197 ms. Remains : 33/33 places, 234/234 transitions.
[2023-03-11 01:07:09] [INFO ] Flatten gal took : 21 ms
[2023-03-11 01:07:09] [INFO ] Flatten gal took : 21 ms
[2023-03-11 01:07:09] [INFO ] Input system was already deterministic with 234 transitions.
[2023-03-11 01:07:09] [INFO ] Flatten gal took : 145 ms
[2023-03-11 01:07:09] [INFO ] Flatten gal took : 105 ms
[2023-03-11 01:07:10] [INFO ] Export to MCC of 10 properties in file /home/mcc/execution/CTLFireability.sr.xml took 75 ms.
[2023-03-11 01:07:10] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 33 places, 234 transitions and 1743 arcs took 3 ms.
Total runtime 14283 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT GlobalResAllocation-PT-03
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA GlobalResAllocation-PT-03-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-PT-03-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-PT-03-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-PT-03-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-PT-03-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-PT-03-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-PT-03-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-PT-03-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-PT-03-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-PT-03-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678496847080

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 1 (type EXCL) for 0 GlobalResAllocation-PT-03-CTLFireability-00
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: LAUNCH INITIAL
lola: LAUNCH task # 44 (type CNST) for 31 GlobalResAllocation-PT-03-CTLFireability-09
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 44 (type CNST) for GlobalResAllocation-PT-03-CTLFireability-09
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 1 (type EXCL) for GlobalResAllocation-PT-03-CTLFireability-00
lola: result : false
lola: markings : 6320
lola: fired transitions : 73961
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 42 (type EXCL) for 31 GlobalResAllocation-PT-03-CTLFireability-09
lola: time limit : 298 sec
lola: memory limit: 32 pages
lola: FINISHED task # 42 (type EXCL) for GlobalResAllocation-PT-03-CTLFireability-09
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 GlobalResAllocation-PT-03-CTLFireability-07
lola: time limit : 398 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for GlobalResAllocation-PT-03-CTLFireability-07
lola: result : false
lola: markings : 170
lola: fired transitions : 183
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 GlobalResAllocation-PT-03-CTLFireability-06
lola: time limit : 448 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for GlobalResAllocation-PT-03-CTLFireability-06
lola: result : false
lola: markings : 245
lola: fired transitions : 496
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 12 GlobalResAllocation-PT-03-CTLFireability-04
lola: time limit : 512 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for GlobalResAllocation-PT-03-CTLFireability-04
lola: result : false
lola: markings : 2281
lola: fired transitions : 20071
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 GlobalResAllocation-PT-03-CTLFireability-03
lola: time limit : 717 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for GlobalResAllocation-PT-03-CTLFireability-03
lola: result : true
lola: markings : 6320
lola: fired transitions : 76403
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 GlobalResAllocation-PT-03-CTLFireability-08
lola: time limit : 896 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for GlobalResAllocation-PT-03-CTLFireability-08
lola: result : true
lola: markings : 3
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 GlobalResAllocation-PT-03-CTLFireability-02
lola: time limit : 1195 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for GlobalResAllocation-PT-03-CTLFireability-02
lola: result : true
lola: markings : 3
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 19 GlobalResAllocation-PT-03-CTLFireability-05
lola: time limit : 1792 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for GlobalResAllocation-PT-03-CTLFireability-05
lola: result : true
lola: markings : 5008
lola: fired transitions : 27109
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 GlobalResAllocation-PT-03-CTLFireability-01
lola: time limit : 3585 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for GlobalResAllocation-PT-03-CTLFireability-01
lola: result : false
lola: markings : 3
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-03-CTLFireability-00: CTL false CTL model checker
GlobalResAllocation-PT-03-CTLFireability-01: CTL false CTL model checker
GlobalResAllocation-PT-03-CTLFireability-02: EG true state space / EG
GlobalResAllocation-PT-03-CTLFireability-03: CTL true CTL model checker
GlobalResAllocation-PT-03-CTLFireability-04: CONJ false CTL model checker
GlobalResAllocation-PT-03-CTLFireability-05: CTL true CTL model checker
GlobalResAllocation-PT-03-CTLFireability-06: CTL false CTL model checker
GlobalResAllocation-PT-03-CTLFireability-07: CTL false CTL model checker
GlobalResAllocation-PT-03-CTLFireability-08: EFEG true state space /EFEG
GlobalResAllocation-PT-03-CTLFireability-09: CONJ true CONJ


Time elapsed: 15 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GlobalResAllocation-PT-03"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is GlobalResAllocation-PT-03, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840345700218"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/GlobalResAllocation-PT-03.tgz
mv GlobalResAllocation-PT-03 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;