Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r199-smll-167840345600210.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is GlobalResAllocation-COL-11, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840345600210
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 564K
-rw-r--r-- 1 mcc users 11K Feb 25 16:49 CTLCardinality.txt
-rw-r--r-- 1 mcc users 102K Feb 25 16:49 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Feb 25 16:49 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 25 16:49 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Feb 25 16:13 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:13 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:13 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Feb 25 16:13 LTLFireability.xml
-rw-r--r-- 1 mcc users 19K Feb 25 16:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 178K Feb 25 16:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 25 16:49 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 41K Feb 25 16:49 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:13 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:13 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 29K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GlobalResAllocation-COL-11-CTLFireability-00
FORMULA_NAME GlobalResAllocation-COL-11-CTLFireability-01
FORMULA_NAME GlobalResAllocation-COL-11-CTLFireability-02
FORMULA_NAME GlobalResAllocation-COL-11-CTLFireability-03
FORMULA_NAME GlobalResAllocation-COL-11-CTLFireability-04
FORMULA_NAME GlobalResAllocation-COL-11-CTLFireability-05
FORMULA_NAME GlobalResAllocation-COL-11-CTLFireability-06
FORMULA_NAME GlobalResAllocation-COL-11-CTLFireability-07
FORMULA_NAME GlobalResAllocation-COL-11-CTLFireability-08
FORMULA_NAME GlobalResAllocation-COL-11-CTLFireability-09
FORMULA_NAME GlobalResAllocation-COL-11-CTLFireability-10
FORMULA_NAME GlobalResAllocation-COL-11-CTLFireability-11
FORMULA_NAME GlobalResAllocation-COL-11-CTLFireability-12
FORMULA_NAME GlobalResAllocation-COL-11-CTLFireability-13
FORMULA_NAME GlobalResAllocation-COL-11-CTLFireability-14
FORMULA_NAME GlobalResAllocation-COL-11-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678493838935

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=GlobalResAllocation-COL-11
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 00:17:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-11 00:17:22] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 00:17:22] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-11 00:17:22] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-11 00:17:23] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1003 ms
[2023-03-11 00:17:23] [INFO ] Imported 5 HL places and 7 HL transitions for a total of 297 PT places and 2705087.0 transition bindings in 19 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 19 ms.
[2023-03-11 00:17:23] [INFO ] Built PT skeleton of HLPN with 5 places and 7 transitions 29 arcs in 6 ms.
[2023-03-11 00:17:23] [INFO ] Skeletonized 16 HLPN properties in 4 ms.
Initial state reduction rules removed 3 formulas.
FORMULA GlobalResAllocation-COL-11-CTLFireability-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-11-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-11-CTLFireability-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 1 properties that can be checked using skeleton over-approximation.
Computed a total of 0 stabilizing places and 0 stable transitions
Finished random walk after 8 steps, including 0 resets, run visited all 2 properties in 8 ms. (steps per millisecond=1 )
[2023-03-11 00:17:23] [INFO ] Flatten gal took : 18 ms
[2023-03-11 00:17:23] [INFO ] Flatten gal took : 3 ms
Symmetric sort wr.t. initial and guards and successors and join/free detected :Res
Symmetric sort wr.t. initial detected :Res
Symmetric sort wr.t. initial and guards detected :Res
Applying symmetric unfolding of full symmetric sort :Res domain size was 22
Transition release1 forces synchronizations/join behavior on parameter p of sort Proc
[2023-03-11 00:17:23] [INFO ] Unfolded HLPN to a Petri net with 45 places and 77 transitions 319 arcs in 17 ms.
[2023-03-11 00:17:23] [INFO ] Unfolded 13 HLPN properties in 1 ms.
Initial state reduction rules removed 4 formulas.
FORMULA GlobalResAllocation-COL-11-CTLFireability-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-11-CTLFireability-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-11-CTLFireability-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-11-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 45 out of 45 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 77/77 transitions.
Reduce isomorphic (modulo) transitions removed 22 transitions.
Iterating post reduction 0 with 22 rules applied. Total rules applied 22 place count 45 transition count 66
Applied a total of 22 rules in 11 ms. Remains 45 /45 variables (removed 0) and now considering 66/77 (removed 11) transitions.
// Phase 1: matrix 66 rows 45 cols
[2023-03-11 00:17:23] [INFO ] Computed 23 place invariants in 18 ms
[2023-03-11 00:17:23] [INFO ] Dead Transitions using invariants and state equation in 355 ms found 0 transitions.
[2023-03-11 00:17:23] [INFO ] Invariant cache hit.
[2023-03-11 00:17:23] [INFO ] Implicit Places using invariants in 54 ms returned []
[2023-03-11 00:17:24] [INFO ] Invariant cache hit.
[2023-03-11 00:17:24] [INFO ] Implicit Places using invariants and state equation in 98 ms returned []
Implicit Place search using SMT with State Equation took 156 ms to find 0 implicit places.
[2023-03-11 00:17:24] [INFO ] Invariant cache hit.
[2023-03-11 00:17:24] [INFO ] Dead Transitions using invariants and state equation in 121 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 45/45 places, 66/77 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 684 ms. Remains : 45/45 places, 66/77 transitions.
Support contains 45 out of 45 places after structural reductions.
[2023-03-11 00:17:24] [INFO ] Flatten gal took : 35 ms
[2023-03-11 00:17:24] [INFO ] Flatten gal took : 37 ms
[2023-03-11 00:17:24] [INFO ] Input system was already deterministic with 66 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 373 ms. (steps per millisecond=26 ) properties (out of 19) seen :18
Finished Best-First random walk after 627 steps, including 0 resets, run visited all 1 properties in 11 ms. (steps per millisecond=57 )
[2023-03-11 00:17:25] [INFO ] Flatten gal took : 16 ms
[2023-03-11 00:17:25] [INFO ] Flatten gal took : 23 ms
[2023-03-11 00:17:25] [INFO ] Input system was already deterministic with 66 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 45/45 places, 66/66 transitions.
Applied a total of 0 rules in 8 ms. Remains 45 /45 variables (removed 0) and now considering 66/66 (removed 0) transitions.
[2023-03-11 00:17:25] [INFO ] Invariant cache hit.
[2023-03-11 00:17:25] [INFO ] Dead Transitions using invariants and state equation in 99 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 110 ms. Remains : 45/45 places, 66/66 transitions.
[2023-03-11 00:17:25] [INFO ] Flatten gal took : 6 ms
[2023-03-11 00:17:25] [INFO ] Flatten gal took : 6 ms
[2023-03-11 00:17:25] [INFO ] Input system was already deterministic with 66 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 45/45 places, 66/66 transitions.
Applied a total of 0 rules in 5 ms. Remains 45 /45 variables (removed 0) and now considering 66/66 (removed 0) transitions.
[2023-03-11 00:17:25] [INFO ] Invariant cache hit.
[2023-03-11 00:17:25] [INFO ] Dead Transitions using invariants and state equation in 109 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 117 ms. Remains : 45/45 places, 66/66 transitions.
[2023-03-11 00:17:25] [INFO ] Flatten gal took : 5 ms
[2023-03-11 00:17:25] [INFO ] Flatten gal took : 5 ms
[2023-03-11 00:17:25] [INFO ] Input system was already deterministic with 66 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 45/45 places, 66/66 transitions.
Applied a total of 0 rules in 4 ms. Remains 45 /45 variables (removed 0) and now considering 66/66 (removed 0) transitions.
[2023-03-11 00:17:25] [INFO ] Invariant cache hit.
[2023-03-11 00:17:25] [INFO ] Dead Transitions using invariants and state equation in 90 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 96 ms. Remains : 45/45 places, 66/66 transitions.
[2023-03-11 00:17:25] [INFO ] Flatten gal took : 5 ms
[2023-03-11 00:17:25] [INFO ] Flatten gal took : 16 ms
[2023-03-11 00:17:25] [INFO ] Input system was already deterministic with 66 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 66/66 transitions.
Ensure Unique test removed 11 places
Iterating post reduction 0 with 11 rules applied. Total rules applied 11 place count 34 transition count 66
Applied a total of 11 rules in 3 ms. Remains 34 /45 variables (removed 11) and now considering 66/66 (removed 0) transitions.
// Phase 1: matrix 66 rows 34 cols
[2023-03-11 00:17:25] [INFO ] Computed 12 place invariants in 2 ms
[2023-03-11 00:17:25] [INFO ] Dead Transitions using invariants and state equation in 95 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 100 ms. Remains : 34/45 places, 66/66 transitions.
[2023-03-11 00:17:25] [INFO ] Flatten gal took : 6 ms
[2023-03-11 00:17:25] [INFO ] Flatten gal took : 7 ms
[2023-03-11 00:17:25] [INFO ] Input system was already deterministic with 66 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 66/66 transitions.
Applied a total of 0 rules in 1 ms. Remains 45 /45 variables (removed 0) and now considering 66/66 (removed 0) transitions.
// Phase 1: matrix 66 rows 45 cols
[2023-03-11 00:17:25] [INFO ] Computed 23 place invariants in 3 ms
[2023-03-11 00:17:25] [INFO ] Dead Transitions using invariants and state equation in 99 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 102 ms. Remains : 45/45 places, 66/66 transitions.
[2023-03-11 00:17:25] [INFO ] Flatten gal took : 7 ms
[2023-03-11 00:17:25] [INFO ] Flatten gal took : 9 ms
[2023-03-11 00:17:25] [INFO ] Input system was already deterministic with 66 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 66/66 transitions.
Applied a total of 0 rules in 2 ms. Remains 45 /45 variables (removed 0) and now considering 66/66 (removed 0) transitions.
[2023-03-11 00:17:25] [INFO ] Invariant cache hit.
[2023-03-11 00:17:25] [INFO ] Dead Transitions using invariants and state equation in 77 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 80 ms. Remains : 45/45 places, 66/66 transitions.
[2023-03-11 00:17:26] [INFO ] Flatten gal took : 7 ms
[2023-03-11 00:17:26] [INFO ] Flatten gal took : 7 ms
[2023-03-11 00:17:26] [INFO ] Input system was already deterministic with 66 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 66/66 transitions.
Applied a total of 0 rules in 3 ms. Remains 45 /45 variables (removed 0) and now considering 66/66 (removed 0) transitions.
[2023-03-11 00:17:26] [INFO ] Invariant cache hit.
[2023-03-11 00:17:26] [INFO ] Dead Transitions using invariants and state equation in 82 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 86 ms. Remains : 45/45 places, 66/66 transitions.
[2023-03-11 00:17:26] [INFO ] Flatten gal took : 7 ms
[2023-03-11 00:17:26] [INFO ] Flatten gal took : 7 ms
[2023-03-11 00:17:26] [INFO ] Input system was already deterministic with 66 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 66/66 transitions.
Applied a total of 0 rules in 1 ms. Remains 45 /45 variables (removed 0) and now considering 66/66 (removed 0) transitions.
[2023-03-11 00:17:26] [INFO ] Invariant cache hit.
[2023-03-11 00:17:26] [INFO ] Dead Transitions using invariants and state equation in 93 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 95 ms. Remains : 45/45 places, 66/66 transitions.
[2023-03-11 00:17:26] [INFO ] Flatten gal took : 6 ms
[2023-03-11 00:17:26] [INFO ] Flatten gal took : 7 ms
[2023-03-11 00:17:26] [INFO ] Input system was already deterministic with 66 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 66/66 transitions.
Applied a total of 0 rules in 1 ms. Remains 45 /45 variables (removed 0) and now considering 66/66 (removed 0) transitions.
[2023-03-11 00:17:26] [INFO ] Invariant cache hit.
[2023-03-11 00:17:26] [INFO ] Dead Transitions using invariants and state equation in 78 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 80 ms. Remains : 45/45 places, 66/66 transitions.
[2023-03-11 00:17:26] [INFO ] Flatten gal took : 7 ms
[2023-03-11 00:17:26] [INFO ] Flatten gal took : 9 ms
[2023-03-11 00:17:26] [INFO ] Input system was already deterministic with 66 transitions.
[2023-03-11 00:17:26] [INFO ] Flatten gal took : 14 ms
[2023-03-11 00:17:26] [INFO ] Flatten gal took : 14 ms
[2023-03-11 00:17:26] [INFO ] Export to MCC of 9 properties in file /home/mcc/execution/CTLFireability.sr.xml took 19 ms.
[2023-03-11 00:17:26] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 45 places, 66 transitions and 275 arcs took 1 ms.
Total runtime 4431 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT GlobalResAllocation-COL-11
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/369
CTLFireability

FORMULA GlobalResAllocation-COL-11-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-11-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-11-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-11-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-11-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-11-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GlobalResAllocation-COL-11-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678493936158

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/369/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/369/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/369/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 4 (type EXCL) for 3 GlobalResAllocation-COL-11-CTLFireability-01
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 4 (type EXCL) for GlobalResAllocation-COL-11-CTLFireability-01
lola: result : true
lola: markings : 23
lola: fired transitions : 46
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 13 (type EXCL) for 12 GlobalResAllocation-COL-11-CTLFireability-07
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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FINAL RESULTS
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GlobalResAllocation-COL-11-CTLFireability-00: CTL false CTL model checker
GlobalResAllocation-COL-11-CTLFireability-01: EGEF true CTL model checker
GlobalResAllocation-COL-11-CTLFireability-02: EFAG false tscc_search
GlobalResAllocation-COL-11-CTLFireability-06: CTL true CTL model checker
GlobalResAllocation-COL-11-CTLFireability-07: CTL unknown AGGR
GlobalResAllocation-COL-11-CTLFireability-08: CONJ false CTL model checker
GlobalResAllocation-COL-11-CTLFireability-09: CTL true CTL model checker
GlobalResAllocation-COL-11-CTLFireability-13: CTL true CTL model checker
GlobalResAllocation-COL-11-CTLFireability-15: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GlobalResAllocation-COL-11"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is GlobalResAllocation-COL-11, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840345600210"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/GlobalResAllocation-COL-11.tgz
mv GlobalResAllocation-COL-11 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;