About the Execution of LoLa+red for GlobalResAllocation-COL-05
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 9381.460 | 97533.00 | 355637.00 | 543.60 | FFTTFTTTTFTTFFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r199-smll-167840345600174.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is GlobalResAllocation-COL-05, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840345600174
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 468K
-rw-r--r-- 1 mcc users 7.3K Feb 25 19:12 CTLCardinality.txt
-rw-r--r-- 1 mcc users 65K Feb 25 19:12 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K Feb 25 18:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 58K Feb 25 18:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3K Feb 25 16:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 26 00:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 94K Feb 26 00:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.5K Feb 25 23:39 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 77K Feb 25 23:39 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 28K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-00
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-01
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-02
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-03
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-04
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-05
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-06
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-07
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-08
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-09
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-10
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-11
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-12
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-13
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-14
FORMULA_NAME GlobalResAllocation-COL-05-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1678487143208
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=GlobalResAllocation-COL-05
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 22:25:46] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-10 22:25:46] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 22:25:46] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-10 22:25:46] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-10 22:25:47] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1071 ms
[2023-03-10 22:25:47] [INFO ] Imported 5 HL places and 7 HL transitions for a total of 75 PT places and 56105.0 transition bindings in 26 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 52 ms.
Working with output stream class java.io.PrintStream
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 22:25:47] [INFO ] Built PT skeleton of HLPN with 5 places and 7 transitions 29 arcs in 20 ms.
[2023-03-10 22:25:47] [INFO ] Skeletonized 15 HLPN properties in 2 ms.
Remains 15 properties that can be checked using skeleton over-approximation.
Computed a total of 0 stabilizing places and 0 stable transitions
[2023-03-10 22:25:47] [INFO ] Flatten gal took : 28 ms
[2023-03-10 22:25:47] [INFO ] Flatten gal took : 5 ms
Symmetric sort wr.t. initial and guards and successors and join/free detected :Res
Symmetric sort wr.t. initial detected :Res
Symmetric sort wr.t. initial and guards detected :Res
Applying symmetric unfolding of full symmetric sort :Res domain size was 10
Transition release1 forces synchronizations/join behavior on parameter p of sort Proc
[2023-03-10 22:25:47] [INFO ] Unfolded HLPN to a Petri net with 21 places and 35 transitions 145 arcs in 35 ms.
[2023-03-10 22:25:47] [INFO ] Unfolded 15 HLPN properties in 1 ms.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 1146 ms. (steps per millisecond=8 ) properties (out of 15) seen :3
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-04 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 123 ms. (steps per millisecond=81 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 85 ms. (steps per millisecond=117 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 113 ms. (steps per millisecond=88 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 73 ms. (steps per millisecond=137 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 135 ms. (steps per millisecond=74 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 97 ms. (steps per millisecond=103 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 121 ms. (steps per millisecond=82 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 88 ms. (steps per millisecond=113 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 57 ms. (steps per millisecond=175 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 109 ms. (steps per millisecond=91 ) properties (out of 12) seen :0
Running SMT prover for 12 properties.
Normalized transition count is 30 out of 35 initially.
// Phase 1: matrix 30 rows 21 cols
[2023-03-10 22:25:50] [INFO ] Computed 11 place invariants in 8 ms
[2023-03-10 22:25:50] [INFO ] [Real]Absence check using 6 positive place invariants in 4 ms returned sat
[2023-03-10 22:25:50] [INFO ] [Real]Absence check using 6 positive and 5 generalized place invariants in 3 ms returned sat
[2023-03-10 22:25:50] [INFO ] After 308ms SMT Verify possible using all constraints in real domain returned unsat :8 sat :0 real:4
[2023-03-10 22:25:50] [INFO ] [Nat]Absence check using 6 positive place invariants in 2 ms returned sat
[2023-03-10 22:25:50] [INFO ] [Nat]Absence check using 6 positive and 5 generalized place invariants in 2 ms returned sat
[2023-03-10 22:25:50] [INFO ] After 70ms SMT Verify possible using all constraints in natural domain returned unsat :12 sat :0
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-15 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-14 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-13 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-09 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-06 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-03 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-02 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-01 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-00 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 12 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 4617 ms.
starting LoLA
BK_INPUT GlobalResAllocation-COL-05
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-COL-05-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678487240741
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 55 (type SKEL/FNDP) for 36 GlobalResAllocation-COL-05-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type SKEL/EQUN) for 36 GlobalResAllocation-COL-05-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 60 (type SKEL/SRCH) for 36 GlobalResAllocation-COL-05-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SKEL/SRCH) for 36 GlobalResAllocation-COL-05-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 23 (type SKEL/CNST) for 21 GlobalResAllocation-COL-05-ReachabilityCardinality-07
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 60 (type SKEL/SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-12
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: result : false
lola: markings : 24
lola: fired transitions : 63
lola: time used : 0.000000
lola: memory pages used : 1
lola: TR BINDINGS
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 23 (type SKEL/CNST) for GlobalResAllocation-COL-05-ReachabilityCardinality-07
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 55 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 56 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 61 (type SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 52 (type SKEL/FNDP) for 33 GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/EQUN) for 33 GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type SKEL/SRCH) for 33 GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type SKEL/SRCH) for 33 GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 64 (type SKEL/SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: result : true
lola: markings : 6
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 55 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 17509
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: TR BINDINGS DONE
lola: Places: 75, Transitions: 56105
lola: FINISHED task # 52 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 63 (type SKEL/SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 53 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-11 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-56.sara.
lola: LAUNCH task # 90 (type SKEL/FNDP) for 12 GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 106 (type SKEL/EQUN) for 12 GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 108 (type SKEL/SRCH) for 12 GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 109 (type SKEL/SRCH) for 12 GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-53.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: sara: place or transition ordering is non-deterministic
rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 109 (type SKEL/SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: result : true
lola: markings : 11
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 90 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 106 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 108 (type SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 78 (type SKEL/FNDP) for 45 GlobalResAllocation-COL-05-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
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lola: time limit : 32000000 sec
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lola: LAUNCH task # 94 (type SKEL/FNDP) for 9 GlobalResAllocation-COL-05-ReachabilityCardinality-03
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lola: LAUNCH task # 100 (type SKEL/FNDP) for 6 GlobalResAllocation-COL-05-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-106.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 90 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 106 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-92.sara.
sara: place or transition ordering is non-deterministic
lola: @ trans enter3
lola: FINISHED task # 92 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-15
lola: result : false
lola: CANCELED task # 78 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 112 (type SKEL/FNDP) for 24 GlobalResAllocation-COL-05-ReachabilityCardinality-08
lola: time limit : 32000000 sec
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lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 78 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 5395
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 56 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-12
lola: result : false
lola: @ trans enter2
lola: @ trans enter1
lola: @ trans exit
lola: @ trans release1
lola: @ trans release2
lola: @ trans enter4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-COL-05-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
94 EF FNDP 5/257 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-03 1565518 t fired, 2 attempts, .
100 EF FNDP 5/257 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-02 1350487 t fired, 2 attempts, .
112 EF FNDP 5/257 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-08 1797271 t fired, 2 attempts, .
117 EF FNDP 5/276 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-06 1321689 t fired, 2 attempts, .
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GlobalResAllocation-COL-05-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
94 EF FNDP 10/252 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-03 3275472 t fired, 4 attempts, .
100 EF FNDP 10/252 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-02 2785846 t fired, 3 attempts, .
112 EF FNDP 10/252 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-08 3684605 t fired, 4 attempts, .
117 EF FNDP 10/271 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-06 2690385 t fired, 3 attempts, .
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GlobalResAllocation-COL-05-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
94 EF FNDP 15/247 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-03 4970666 t fired, 5 attempts, .
100 EF FNDP 15/247 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-02 4263339 t fired, 5 attempts, .
112 EF FNDP 15/247 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-08 5464002 t fired, 6 attempts, .
117 EF FNDP 15/266 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-06 4128618 t fired, 5 attempts, .
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GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
94 EF FNDP 20/242 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-03 6662435 t fired, 7 attempts, .
100 EF FNDP 20/242 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-02 5738603 t fired, 6 attempts, .
112 EF FNDP 20/242 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-08 7068553 t fired, 8 attempts, .
117 EF FNDP 20/261 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-06 5379842 t fired, 6 attempts, .
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GlobalResAllocation-COL-05-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
94 EF FNDP 25/237 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-03 8392155 t fired, 9 attempts, .
100 EF FNDP 25/237 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-02 7198380 t fired, 8 attempts, .
112 EF FNDP 25/237 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-08 9000649 t fired, 10 attempts, .
117 EF FNDP 25/256 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-06 6739970 t fired, 7 attempts, .
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GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
94 EF FNDP 30/232 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-03 10120556 t fired, 11 attempts, .
100 EF FNDP 30/232 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-02 8572611 t fired, 9 attempts, .
112 EF FNDP 30/232 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-08 10892783 t fired, 11 attempts, .
117 EF FNDP 30/251 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-06 8075886 t fired, 9 attempts, .
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lola: FINISHED task # 53 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-COL-05-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
94 EF FNDP 35/226 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-03 11678211 t fired, 12 attempts, .
100 EF FNDP 35/226 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-02 10085554 t fired, 11 attempts, .
112 EF FNDP 35/226 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-08 12464620 t fired, 13 attempts, .
117 EF FNDP 35/245 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-06 9349280 t fired, 10 attempts, .
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GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
94 EF FNDP 40/222 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-03 13458174 t fired, 14 attempts, .
100 EF FNDP 40/222 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-02 11755728 t fired, 12 attempts, .
112 EF FNDP 40/222 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-08 14252513 t fired, 15 attempts, .
117 EF FNDP 40/241 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-06 10821605 t fired, 11 attempts, .
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GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
94 EF FNDP 45/217 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-03 15004647 t fired, 16 attempts, .
100 EF FNDP 45/217 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-02 13378997 t fired, 14 attempts, .
112 EF FNDP 45/217 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-08 15988569 t fired, 16 attempts, .
117 EF FNDP 45/236 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-06 12139853 t fired, 13 attempts, .
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GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
94 EF FNDP 50/212 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-03 16588873 t fired, 17 attempts, .
100 EF FNDP 50/212 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-02 14733805 t fired, 15 attempts, .
112 EF FNDP 50/212 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-08 17746469 t fired, 18 attempts, .
117 EF FNDP 50/231 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-06 13406509 t fired, 14 attempts, .
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GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
94 EF FNDP 55/207 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-03 18223432 t fired, 19 attempts, .
100 EF FNDP 55/207 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-02 16224227 t fired, 17 attempts, .
112 EF FNDP 55/207 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-08 19346985 t fired, 20 attempts, .
117 EF FNDP 55/226 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-06 14760585 t fired, 15 attempts, .
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GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
94 EF FNDP 60/202 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-03 20195797 t fired, 21 attempts, .
100 EF FNDP 60/202 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-02 17864919 t fired, 18 attempts, .
112 EF FNDP 60/202 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-08 21041157 t fired, 22 attempts, .
117 EF FNDP 60/221 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-06 16197274 t fired, 17 attempts, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
94 EF FNDP 65/197 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-03 21985676 t fired, 22 attempts, .
100 EF FNDP 65/197 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-02 19372070 t fired, 20 attempts, .
112 EF FNDP 65/197 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-08 22753130 t fired, 23 attempts, .
117 EF FNDP 65/216 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-06 17656845 t fired, 18 attempts, .
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lola: Rule S: 0 transitions removed,0 places removed
lola: planning for GlobalResAllocation-COL-05-ReachabilityCardinality-12 stopped (result already fixed).
lola: planning for GlobalResAllocation-COL-05-ReachabilityCardinality-15 stopped (result already fixed).
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
94 EF FNDP 70/189 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-03 23929075 t fired, 24 attempts, .
100 EF FNDP 70/189 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-02 21010273 t fired, 22 attempts, .
112 EF FNDP 70/189 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-08 24614494 t fired, 25 attempts, .
117 EF FNDP 70/208 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-06 19128857 t fired, 20 attempts, .
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GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
94 EF FNDP 75/187 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-03 26112916 t fired, 27 attempts, .
100 EF FNDP 75/187 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-02 22779101 t fired, 23 attempts, .
112 EF FNDP 75/187 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-08 26688363 t fired, 27 attempts, .
117 EF FNDP 75/206 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-06 20525648 t fired, 21 attempts, .
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GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG 0 4 1 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
94 EF FNDP 80/182 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-03 27906755 t fired, 28 attempts, .
100 EF FNDP 80/182 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-02 24604515 t fired, 25 attempts, .
112 EF FNDP 80/182 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-08 28668008 t fired, 29 attempts, .
117 EF FNDP 80/201 0/5 GlobalResAllocation-COL-05-ReachabilityCardinality-06 21867654 t fired, 22 attempts, .
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
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GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF 0 10 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF 0 10 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG 0 9 0 0 0 1 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG 0 9 0 0 0 1 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG 0 5 0 0 3 0 0 2
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG 0 9 0 0 0 1 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG 0 9 0 0 0 1 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF 0 10 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF 0 10 0 0 0 0 0 0
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF 0 5 0 0 4 0 0 1
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF 0 10 0 0 0 0 0 0
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lola: result : false
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lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 124 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 126 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 99 (type SKEL/FNDP) for 0 GlobalResAllocation-COL-05-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 139 (type SKEL/EQUN) for 0 GlobalResAllocation-COL-05-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 141 (type SKEL/SRCH) for 0 GlobalResAllocation-COL-05-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 141 (type SKEL/SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-00
lola: result : false
lola: markings : 33
lola: fired transitions : 101
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 99 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 139 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 160 (type FNDP) for 30 GlobalResAllocation-COL-05-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 161 (type EQUN) for 30 GlobalResAllocation-COL-05-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 163 (type SRCH) for 30 GlobalResAllocation-COL-05-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-126.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 126 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-09
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-139.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 139 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-00
lola: result : false
lola: FINISHED task # 163 (type SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-10
lola: result : true
lola: markings : 9
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 160 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 161 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 95 (type SKEL/FNDP) for 15 GlobalResAllocation-COL-05-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 110 (type SKEL/EQUN) for 15 GlobalResAllocation-COL-05-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 143 (type SKEL/SRCH) for 15 GlobalResAllocation-COL-05-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 143 (type SKEL/SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-05
lola: result : false
lola: markings : 48
lola: fired transitions : 178
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 95 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 110 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 70 (type SKEL/FNDP) for 42 GlobalResAllocation-COL-05-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type SKEL/EQUN) for 42 GlobalResAllocation-COL-05-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SKEL/SRCH) for 42 GlobalResAllocation-COL-05-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 73 (type SKEL/SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-14
lola: result : false
lola: markings : 19
lola: fired transitions : 52
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 70 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 71 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-14 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 105 (type SKEL/FNDP) for 3 GlobalResAllocation-COL-05-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 118 (type SKEL/EQUN) for 3 GlobalResAllocation-COL-05-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 147 (type SKEL/SRCH) for 3 GlobalResAllocation-COL-05-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 160 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-10
lola: result : unknown
lola: fired transitions : 3
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-110.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 147 (type SKEL/SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-01
lola: result : false
lola: markings : 19
lola: fired transitions : 52
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 105 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 118 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 101 (type SKEL/EQUN) for 9 GlobalResAllocation-COL-05-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 120 (type SKEL/EQUN) for 24 GlobalResAllocation-COL-05-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type SKEL/SRCH) for 9 GlobalResAllocation-COL-05-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 105 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 2760
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-71.sara.
lola: FINISHED task # 118 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-01
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: result : unknown
lola: FINISHED task # 122 (type SKEL/SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-03
lola: result : false
lola: markings : 33
lola: fired transitions : 101
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-161.sara.
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 101 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 131 (type SKEL/EQUN) for 18 GlobalResAllocation-COL-05-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 133 (type SKEL/SRCH) for 18 GlobalResAllocation-COL-05-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 110 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-05
lola: result : false
lola: FINISHED task # 133 (type SKEL/SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-06
lola: result : false
lola: markings : 33
lola: fired transitions : 101
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 131 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 145 (type SKEL/EQUN) for 6 GlobalResAllocation-COL-05-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 153 (type SKEL/SRCH) for 6 GlobalResAllocation-COL-05-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 153 (type SKEL/SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-02
lola: result : false
lola: markings : 42
lola: fired transitions : 117
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 145 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 180 (type FNDP) for 12 GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 181 (type EQUN) for 12 GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-120.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 71 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-14
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 101 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-03
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-145.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 120 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-08
lola: result : false
lola: LAUNCH task # 173 (type FNDP) for 33 GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-131.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 145 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-02
lola: result : false
lola: FINISHED task # 180 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-04
lola: result : true
lola: fired transitions : 8
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 181 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 98 (type SKEL/FNDP) for 39 GlobalResAllocation-COL-05-ReachabilityCardinality-13
lola: time limit : 32000000 sec
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lola: LAUNCH task # 113 (type SKEL/EQUN) for 39 GlobalResAllocation-COL-05-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 131 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-06
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-113.sara.
lola: FINISHED task # 113 (type SKEL/EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-13
lola: result : false
lola: CANCELED task # 98 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 222 (type EXCL) for GlobalResAllocation-COL-05-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 177 (type EXCL) for 33 GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: time limit : 3512 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 174 (type EQUN) for 33 GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 176 (type SRCH) for 33 GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 98 (type SKEL/FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 90820
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-181.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-174.sara.
lola: FINISHED task # 177 (type EXCL) for GlobalResAllocation-COL-05-ReachabilityCardinality-11
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 173 (type FNDP) for GlobalResAllocation-COL-05-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 174 (type EQUN) for GlobalResAllocation-COL-05-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 176 (type SRCH) for GlobalResAllocation-COL-05-ReachabilityCardinality-11 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-COL-05-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-01: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-02: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-04: AG false findpath
GlobalResAllocation-COL-05-ReachabilityCardinality-05: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
GlobalResAllocation-COL-05-ReachabilityCardinality-08: AG true skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-09: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-10: EF true tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-11: EF true tandem / relaxed
GlobalResAllocation-COL-05-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-13: EF false skeleton: state equation
GlobalResAllocation-COL-05-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
GlobalResAllocation-COL-05-ReachabilityCardinality-15: AG true skeleton: state equation
Time elapsed: 89 secs. Pages in use: 3
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GlobalResAllocation-COL-05"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is GlobalResAllocation-COL-05, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840345600174"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/GlobalResAllocation-COL-05.tgz
mv GlobalResAllocation-COL-05 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;