Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r199-smll-167840345600154.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is GPUForwardProgress-PT-40b, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r199-smll-167840345600154
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 692K
-rw-r--r-- 1 mcc users 8.8K Feb 25 14:17 CTLCardinality.txt
-rw-r--r-- 1 mcc users 102K Feb 25 14:17 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Feb 25 14:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K Feb 25 14:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 16:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 25 16:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 16:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 14:18 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 136K Feb 25 14:18 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.9K Feb 25 14:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 78K Feb 25 14:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 199K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-00
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-01
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-02
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-03
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-04
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-05
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-06
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-07
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-08
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-09
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-10
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-11
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-12
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-13
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-14
FORMULA_NAME GPUForwardProgress-PT-40b-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678484764650

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=GPUForwardProgress-PT-40b
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 21:46:08] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 21:46:08] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 21:46:08] [INFO ] Load time of PNML (sax parser for PT used): 210 ms
[2023-03-10 21:46:08] [INFO ] Transformed 796 places.
[2023-03-10 21:46:08] [INFO ] Transformed 837 transitions.
[2023-03-10 21:46:08] [INFO ] Found NUPN structural information;
[2023-03-10 21:46:08] [INFO ] Parsed PT model containing 796 places and 837 transitions and 2077 arcs in 368 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 19 ms.
Support contains 111 out of 796 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 796/796 places, 837/837 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 795 transition count 837
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 63 place count 733 transition count 775
Iterating global reduction 1 with 62 rules applied. Total rules applied 125 place count 733 transition count 775
Discarding 25 places :
Symmetric choice reduction at 1 with 25 rule applications. Total rules 150 place count 708 transition count 750
Iterating global reduction 1 with 25 rules applied. Total rules applied 175 place count 708 transition count 750
Ensure Unique test removed 23 transitions
Reduce isomorphic transitions removed 23 transitions.
Iterating post reduction 1 with 23 rules applied. Total rules applied 198 place count 708 transition count 727
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 199 place count 707 transition count 726
Iterating global reduction 2 with 1 rules applied. Total rules applied 200 place count 707 transition count 726
Applied a total of 200 rules in 334 ms. Remains 707 /796 variables (removed 89) and now considering 726/837 (removed 111) transitions.
// Phase 1: matrix 726 rows 707 cols
[2023-03-10 21:46:09] [INFO ] Computed 41 place invariants in 44 ms
[2023-03-10 21:46:09] [INFO ] Implicit Places using invariants in 873 ms returned []
[2023-03-10 21:46:09] [INFO ] Invariant cache hit.
[2023-03-10 21:46:11] [INFO ] Implicit Places using invariants and state equation in 1277 ms returned []
Implicit Place search using SMT with State Equation took 2192 ms to find 0 implicit places.
[2023-03-10 21:46:11] [INFO ] Invariant cache hit.
[2023-03-10 21:46:12] [INFO ] Dead Transitions using invariants and state equation in 1049 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 707/796 places, 726/837 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3589 ms. Remains : 707/796 places, 726/837 transitions.
Support contains 111 out of 707 places after structural reductions.
[2023-03-10 21:46:12] [INFO ] Flatten gal took : 184 ms
[2023-03-10 21:46:12] [INFO ] Flatten gal took : 84 ms
[2023-03-10 21:46:13] [INFO ] Input system was already deterministic with 726 transitions.
Incomplete random walk after 10000 steps, including 28 resets, run finished after 1134 ms. (steps per millisecond=8 ) properties (out of 85) seen :54
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 31) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 30) seen :0
Running SMT prover for 30 properties.
[2023-03-10 21:46:14] [INFO ] Invariant cache hit.
[2023-03-10 21:46:15] [INFO ] [Real]Absence check using 0 positive and 41 generalized place invariants in 52 ms returned sat
[2023-03-10 21:46:17] [INFO ] After 846ms SMT Verify possible using state equation in real domain returned unsat :0 sat :3 real:27
[2023-03-10 21:46:17] [INFO ] After 1149ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :0 real:30
[2023-03-10 21:46:17] [INFO ] After 2482ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:30
[2023-03-10 21:46:18] [INFO ] [Nat]Absence check using 0 positive and 41 generalized place invariants in 52 ms returned sat
[2023-03-10 21:46:20] [INFO ] After 1754ms SMT Verify possible using state equation in natural domain returned unsat :2 sat :28
[2023-03-10 21:46:22] [INFO ] After 3875ms SMT Verify possible using trap constraints in natural domain returned unsat :2 sat :28
Attempting to minimize the solution found.
Minimization took 1392 ms.
[2023-03-10 21:46:24] [INFO ] After 6852ms SMT Verify possible using all constraints in natural domain returned unsat :2 sat :28
Fused 30 Parikh solutions to 28 different solutions.
Finished Parikh walk after 153 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=76 )
Parikh walk visited 28 properties in 544 ms.
Successfully simplified 2 atomic propositions for a total of 16 simplifications.
[2023-03-10 21:46:24] [INFO ] Flatten gal took : 66 ms
[2023-03-10 21:46:24] [INFO ] Flatten gal took : 56 ms
[2023-03-10 21:46:25] [INFO ] Input system was already deterministic with 726 transitions.
Computed a total of 136 stabilizing places and 136 stable transitions
Graph (complete) has 1095 edges and 707 vertex of which 663 are kept as prefixes of interest. Removing 44 places using SCC suffix rule.38 ms
Starting structural reductions in SI_CTL mode, iteration 0 : 707/707 places, 726/726 transitions.
Graph (trivial) has 591 edges and 707 vertex of which 6 / 707 are part of one of the 1 SCC in 7 ms
Free SCC test removed 5 places
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Graph (complete) has 1089 edges and 702 vertex of which 658 are kept as prefixes of interest. Removing 44 places using SCC suffix rule.8 ms
Discarding 44 places :
Also discarding 3 output transitions
Drop transitions removed 3 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 349 transitions
Trivial Post-agglo rules discarded 349 transitions
Performed 349 trivial Post agglomeration. Transition count delta: 349
Iterating post reduction 0 with 349 rules applied. Total rules applied 351 place count 657 transition count 367
Reduce places removed 349 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 1 with 370 rules applied. Total rules applied 721 place count 308 transition count 346
Reduce places removed 5 places and 0 transitions.
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Iterating post reduction 2 with 10 rules applied. Total rules applied 731 place count 303 transition count 341
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 3 with 5 rules applied. Total rules applied 736 place count 298 transition count 341
Performed 81 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 81 Pre rules applied. Total rules applied 736 place count 298 transition count 260
Deduced a syphon composed of 81 places in 1 ms
Reduce places removed 81 places and 0 transitions.
Iterating global reduction 4 with 162 rules applied. Total rules applied 898 place count 217 transition count 260
Discarding 40 places :
Symmetric choice reduction at 4 with 40 rule applications. Total rules 938 place count 177 transition count 220
Iterating global reduction 4 with 40 rules applied. Total rules applied 978 place count 177 transition count 220
Performed 80 Post agglomeration using F-continuation condition.Transition count delta: 80
Deduced a syphon composed of 80 places in 0 ms
Reduce places removed 80 places and 0 transitions.
Iterating global reduction 4 with 160 rules applied. Total rules applied 1138 place count 97 transition count 140
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 1139 place count 97 transition count 139
Discarding 1 places :
Symmetric choice reduction at 5 with 1 rule applications. Total rules 1140 place count 96 transition count 138
Iterating global reduction 5 with 1 rules applied. Total rules applied 1141 place count 96 transition count 138
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 1143 place count 95 transition count 137
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 5 with 1 rules applied. Total rules applied 1144 place count 95 transition count 137
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 5 with 1 rules applied. Total rules applied 1145 place count 94 transition count 136
Applied a total of 1145 rules in 207 ms. Remains 94 /707 variables (removed 613) and now considering 136/726 (removed 590) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 209 ms. Remains : 94/707 places, 136/726 transitions.
[2023-03-10 21:46:25] [INFO ] Flatten gal took : 9 ms
[2023-03-10 21:46:25] [INFO ] Flatten gal took : 9 ms
[2023-03-10 21:46:25] [INFO ] Input system was already deterministic with 136 transitions.
Starting structural reductions in LTL mode, iteration 0 : 707/707 places, 726/726 transitions.
Discarding 26 places :
Symmetric choice reduction at 0 with 26 rule applications. Total rules 26 place count 681 transition count 700
Iterating global reduction 0 with 26 rules applied. Total rules applied 52 place count 681 transition count 700
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 57 place count 681 transition count 695
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 68 place count 670 transition count 684
Iterating global reduction 1 with 11 rules applied. Total rules applied 79 place count 670 transition count 684
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 89 place count 670 transition count 674
Applied a total of 89 rules in 561 ms. Remains 670 /707 variables (removed 37) and now considering 674/726 (removed 52) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 561 ms. Remains : 670/707 places, 674/726 transitions.
[2023-03-10 21:46:25] [INFO ] Flatten gal took : 30 ms
[2023-03-10 21:46:25] [INFO ] Flatten gal took : 29 ms
[2023-03-10 21:46:26] [INFO ] Input system was already deterministic with 674 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 707/707 places, 726/726 transitions.
Graph (trivial) has 601 edges and 707 vertex of which 6 / 707 are part of one of the 1 SCC in 2 ms
Free SCC test removed 5 places
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Graph (complete) has 1089 edges and 702 vertex of which 658 are kept as prefixes of interest. Removing 44 places using SCC suffix rule.4 ms
Discarding 44 places :
Also discarding 3 output transitions
Drop transitions removed 3 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 359 transitions
Trivial Post-agglo rules discarded 359 transitions
Performed 359 trivial Post agglomeration. Transition count delta: 359
Iterating post reduction 0 with 359 rules applied. Total rules applied 361 place count 657 transition count 357
Reduce places removed 359 places and 0 transitions.
Ensure Unique test removed 17 transitions
Reduce isomorphic transitions removed 17 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 1 with 381 rules applied. Total rules applied 742 place count 298 transition count 335
Reduce places removed 5 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 6 rules applied. Total rules applied 748 place count 293 transition count 334
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 749 place count 292 transition count 334
Performed 82 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 82 Pre rules applied. Total rules applied 749 place count 292 transition count 252
Deduced a syphon composed of 82 places in 1 ms
Reduce places removed 82 places and 0 transitions.
Iterating global reduction 4 with 164 rules applied. Total rules applied 913 place count 210 transition count 252
Discarding 39 places :
Symmetric choice reduction at 4 with 39 rule applications. Total rules 952 place count 171 transition count 213
Iterating global reduction 4 with 39 rules applied. Total rules applied 991 place count 171 transition count 213
Performed 81 Post agglomeration using F-continuation condition.Transition count delta: 81
Deduced a syphon composed of 81 places in 1 ms
Reduce places removed 81 places and 0 transitions.
Iterating global reduction 4 with 162 rules applied. Total rules applied 1153 place count 90 transition count 132
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 1154 place count 90 transition count 131
Discarding 1 places :
Symmetric choice reduction at 5 with 1 rule applications. Total rules 1155 place count 89 transition count 130
Iterating global reduction 5 with 1 rules applied. Total rules applied 1156 place count 89 transition count 130
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 1158 place count 88 transition count 129
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 5 with 1 rules applied. Total rules applied 1159 place count 87 transition count 128
Applied a total of 1159 rules in 71 ms. Remains 87 /707 variables (removed 620) and now considering 128/726 (removed 598) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 72 ms. Remains : 87/707 places, 128/726 transitions.
[2023-03-10 21:46:26] [INFO ] Flatten gal took : 5 ms
[2023-03-10 21:46:26] [INFO ] Flatten gal took : 5 ms
[2023-03-10 21:46:26] [INFO ] Input system was already deterministic with 128 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 707/707 places, 726/726 transitions.
Graph (trivial) has 598 edges and 707 vertex of which 6 / 707 are part of one of the 1 SCC in 1 ms
Free SCC test removed 5 places
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Graph (complete) has 1089 edges and 702 vertex of which 658 are kept as prefixes of interest. Removing 44 places using SCC suffix rule.4 ms
Discarding 44 places :
Also discarding 3 output transitions
Drop transitions removed 3 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 357 transitions
Trivial Post-agglo rules discarded 357 transitions
Performed 357 trivial Post agglomeration. Transition count delta: 357
Iterating post reduction 0 with 357 rules applied. Total rules applied 359 place count 657 transition count 359
Reduce places removed 357 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 1 with 377 rules applied. Total rules applied 736 place count 300 transition count 339
Reduce places removed 4 places and 0 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 2 with 6 rules applied. Total rules applied 742 place count 296 transition count 337
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 744 place count 294 transition count 337
Performed 83 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 83 Pre rules applied. Total rules applied 744 place count 294 transition count 254
Deduced a syphon composed of 83 places in 1 ms
Reduce places removed 83 places and 0 transitions.
Iterating global reduction 4 with 166 rules applied. Total rules applied 910 place count 211 transition count 254
Discarding 39 places :
Symmetric choice reduction at 4 with 39 rule applications. Total rules 949 place count 172 transition count 215
Iterating global reduction 4 with 39 rules applied. Total rules applied 988 place count 172 transition count 215
Performed 81 Post agglomeration using F-continuation condition.Transition count delta: 81
Deduced a syphon composed of 81 places in 0 ms
Reduce places removed 81 places and 0 transitions.
Iterating global reduction 4 with 162 rules applied. Total rules applied 1150 place count 91 transition count 134
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 1151 place count 91 transition count 133
Discarding 1 places :
Symmetric choice reduction at 5 with 1 rule applications. Total rules 1152 place count 90 transition count 132
Iterating global reduction 5 with 1 rules applied. Total rules applied 1153 place count 90 transition count 132
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 1155 place count 89 transition count 131
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 5 with 1 rules applied. Total rules applied 1156 place count 89 transition count 131
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 5 with 1 rules applied. Total rules applied 1157 place count 88 transition count 130
Applied a total of 1157 rules in 71 ms. Remains 88 /707 variables (removed 619) and now considering 130/726 (removed 596) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 71 ms. Remains : 88/707 places, 130/726 transitions.
[2023-03-10 21:46:26] [INFO ] Flatten gal took : 4 ms
[2023-03-10 21:46:26] [INFO ] Flatten gal took : 5 ms
[2023-03-10 21:46:26] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in LTL mode, iteration 0 : 707/707 places, 726/726 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 679 transition count 698
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 679 transition count 698
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 61 place count 679 transition count 693
Discarding 12 places :
Symmetric choice reduction at 1 with 12 rule applications. Total rules 73 place count 667 transition count 681
Iterating global reduction 1 with 12 rules applied. Total rules applied 85 place count 667 transition count 681
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 1 with 11 rules applied. Total rules applied 96 place count 667 transition count 670
Applied a total of 96 rules in 91 ms. Remains 667 /707 variables (removed 40) and now considering 670/726 (removed 56) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 92 ms. Remains : 667/707 places, 670/726 transitions.
[2023-03-10 21:46:26] [INFO ] Flatten gal took : 24 ms
[2023-03-10 21:46:26] [INFO ] Flatten gal took : 26 ms
[2023-03-10 21:46:26] [INFO ] Input system was already deterministic with 670 transitions.
Starting structural reductions in LTL mode, iteration 0 : 707/707 places, 726/726 transitions.
Discarding 29 places :
Symmetric choice reduction at 0 with 29 rule applications. Total rules 29 place count 678 transition count 697
Iterating global reduction 0 with 29 rules applied. Total rules applied 58 place count 678 transition count 697
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 63 place count 678 transition count 692
Discarding 12 places :
Symmetric choice reduction at 1 with 12 rule applications. Total rules 75 place count 666 transition count 680
Iterating global reduction 1 with 12 rules applied. Total rules applied 87 place count 666 transition count 680
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 1 with 11 rules applied. Total rules applied 98 place count 666 transition count 669
Applied a total of 98 rules in 84 ms. Remains 666 /707 variables (removed 41) and now considering 669/726 (removed 57) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 85 ms. Remains : 666/707 places, 669/726 transitions.
[2023-03-10 21:46:26] [INFO ] Flatten gal took : 24 ms
[2023-03-10 21:46:26] [INFO ] Flatten gal took : 23 ms
[2023-03-10 21:46:26] [INFO ] Input system was already deterministic with 669 transitions.
Starting structural reductions in LTL mode, iteration 0 : 707/707 places, 726/726 transitions.
Discarding 29 places :
Symmetric choice reduction at 0 with 29 rule applications. Total rules 29 place count 678 transition count 697
Iterating global reduction 0 with 29 rules applied. Total rules applied 58 place count 678 transition count 697
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 63 place count 678 transition count 692
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 74 place count 667 transition count 681
Iterating global reduction 1 with 11 rules applied. Total rules applied 85 place count 667 transition count 681
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 95 place count 667 transition count 671
Applied a total of 95 rules in 69 ms. Remains 667 /707 variables (removed 40) and now considering 671/726 (removed 55) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 70 ms. Remains : 667/707 places, 671/726 transitions.
[2023-03-10 21:46:26] [INFO ] Flatten gal took : 27 ms
[2023-03-10 21:46:26] [INFO ] Flatten gal took : 23 ms
[2023-03-10 21:46:26] [INFO ] Input system was already deterministic with 671 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 707/707 places, 726/726 transitions.
Graph (trivial) has 601 edges and 707 vertex of which 6 / 707 are part of one of the 1 SCC in 2 ms
Free SCC test removed 5 places
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Graph (complete) has 1089 edges and 702 vertex of which 658 are kept as prefixes of interest. Removing 44 places using SCC suffix rule.3 ms
Discarding 44 places :
Also discarding 3 output transitions
Drop transitions removed 3 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 358 transitions
Trivial Post-agglo rules discarded 358 transitions
Performed 358 trivial Post agglomeration. Transition count delta: 358
Iterating post reduction 0 with 358 rules applied. Total rules applied 360 place count 657 transition count 358
Reduce places removed 358 places and 0 transitions.
Ensure Unique test removed 17 transitions
Reduce isomorphic transitions removed 17 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 1 with 380 rules applied. Total rules applied 740 place count 299 transition count 336
Reduce places removed 5 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 6 rules applied. Total rules applied 746 place count 294 transition count 335
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 747 place count 293 transition count 335
Performed 83 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 83 Pre rules applied. Total rules applied 747 place count 293 transition count 252
Deduced a syphon composed of 83 places in 1 ms
Reduce places removed 83 places and 0 transitions.
Iterating global reduction 4 with 166 rules applied. Total rules applied 913 place count 210 transition count 252
Discarding 39 places :
Symmetric choice reduction at 4 with 39 rule applications. Total rules 952 place count 171 transition count 213
Iterating global reduction 4 with 39 rules applied. Total rules applied 991 place count 171 transition count 213
Performed 81 Post agglomeration using F-continuation condition.Transition count delta: 81
Deduced a syphon composed of 81 places in 0 ms
Reduce places removed 81 places and 0 transitions.
Iterating global reduction 4 with 162 rules applied. Total rules applied 1153 place count 90 transition count 132
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 1154 place count 90 transition count 131
Discarding 1 places :
Symmetric choice reduction at 5 with 1 rule applications. Total rules 1155 place count 89 transition count 130
Iterating global reduction 5 with 1 rules applied. Total rules applied 1156 place count 89 transition count 130
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 1158 place count 88 transition count 129
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 5 with 1 rules applied. Total rules applied 1159 place count 87 transition count 128
Applied a total of 1159 rules in 71 ms. Remains 87 /707 variables (removed 620) and now considering 128/726 (removed 598) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 71 ms. Remains : 87/707 places, 128/726 transitions.
[2023-03-10 21:46:26] [INFO ] Flatten gal took : 4 ms
[2023-03-10 21:46:26] [INFO ] Flatten gal took : 4 ms
[2023-03-10 21:46:26] [INFO ] Input system was already deterministic with 128 transitions.
Finished random walk after 2 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=2 )
FORMULA GPUForwardProgress-PT-40b-CTLFireability-07 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 707/707 places, 726/726 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 679 transition count 698
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 679 transition count 698
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 61 place count 679 transition count 693
Discarding 12 places :
Symmetric choice reduction at 1 with 12 rule applications. Total rules 73 place count 667 transition count 681
Iterating global reduction 1 with 12 rules applied. Total rules applied 85 place count 667 transition count 681
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 1 with 11 rules applied. Total rules applied 96 place count 667 transition count 670
Applied a total of 96 rules in 79 ms. Remains 667 /707 variables (removed 40) and now considering 670/726 (removed 56) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 85 ms. Remains : 667/707 places, 670/726 transitions.
[2023-03-10 21:46:27] [INFO ] Flatten gal took : 38 ms
[2023-03-10 21:46:27] [INFO ] Flatten gal took : 30 ms
[2023-03-10 21:46:27] [INFO ] Input system was already deterministic with 670 transitions.
Starting structural reductions in LTL mode, iteration 0 : 707/707 places, 726/726 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 679 transition count 698
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 679 transition count 698
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 61 place count 679 transition count 693
Discarding 12 places :
Symmetric choice reduction at 1 with 12 rule applications. Total rules 73 place count 667 transition count 681
Iterating global reduction 1 with 12 rules applied. Total rules applied 85 place count 667 transition count 681
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Iterating post reduction 1 with 12 rules applied. Total rules applied 97 place count 667 transition count 669
Applied a total of 97 rules in 60 ms. Remains 667 /707 variables (removed 40) and now considering 669/726 (removed 57) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 61 ms. Remains : 667/707 places, 669/726 transitions.
[2023-03-10 21:46:27] [INFO ] Flatten gal took : 19 ms
[2023-03-10 21:46:27] [INFO ] Flatten gal took : 19 ms
[2023-03-10 21:46:27] [INFO ] Input system was already deterministic with 669 transitions.
Starting structural reductions in LTL mode, iteration 0 : 707/707 places, 726/726 transitions.
Discarding 26 places :
Symmetric choice reduction at 0 with 26 rule applications. Total rules 26 place count 681 transition count 700
Iterating global reduction 0 with 26 rules applied. Total rules applied 52 place count 681 transition count 700
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 57 place count 681 transition count 695
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 67 place count 671 transition count 685
Iterating global reduction 1 with 10 rules applied. Total rules applied 77 place count 671 transition count 685
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 87 place count 671 transition count 675
Applied a total of 87 rules in 52 ms. Remains 671 /707 variables (removed 36) and now considering 675/726 (removed 51) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 52 ms. Remains : 671/707 places, 675/726 transitions.
[2023-03-10 21:46:27] [INFO ] Flatten gal took : 24 ms
[2023-03-10 21:46:27] [INFO ] Flatten gal took : 18 ms
[2023-03-10 21:46:27] [INFO ] Input system was already deterministic with 675 transitions.
Starting structural reductions in LTL mode, iteration 0 : 707/707 places, 726/726 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 679 transition count 698
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 679 transition count 698
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 60 place count 679 transition count 694
Discarding 13 places :
Symmetric choice reduction at 1 with 13 rule applications. Total rules 73 place count 666 transition count 681
Iterating global reduction 1 with 13 rules applied. Total rules applied 86 place count 666 transition count 681
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Iterating post reduction 1 with 12 rules applied. Total rules applied 98 place count 666 transition count 669
Applied a total of 98 rules in 63 ms. Remains 666 /707 variables (removed 41) and now considering 669/726 (removed 57) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 63 ms. Remains : 666/707 places, 669/726 transitions.
[2023-03-10 21:46:27] [INFO ] Flatten gal took : 18 ms
[2023-03-10 21:46:27] [INFO ] Flatten gal took : 20 ms
[2023-03-10 21:46:27] [INFO ] Input system was already deterministic with 669 transitions.
Starting structural reductions in LTL mode, iteration 0 : 707/707 places, 726/726 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 679 transition count 698
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 679 transition count 698
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 61 place count 679 transition count 693
Discarding 12 places :
Symmetric choice reduction at 1 with 12 rule applications. Total rules 73 place count 667 transition count 681
Iterating global reduction 1 with 12 rules applied. Total rules applied 85 place count 667 transition count 681
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 1 with 11 rules applied. Total rules applied 96 place count 667 transition count 670
Applied a total of 96 rules in 53 ms. Remains 667 /707 variables (removed 40) and now considering 670/726 (removed 56) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 53 ms. Remains : 667/707 places, 670/726 transitions.
[2023-03-10 21:46:27] [INFO ] Flatten gal took : 17 ms
[2023-03-10 21:46:27] [INFO ] Flatten gal took : 17 ms
[2023-03-10 21:46:27] [INFO ] Input system was already deterministic with 670 transitions.
Starting structural reductions in LTL mode, iteration 0 : 707/707 places, 726/726 transitions.
Discarding 29 places :
Symmetric choice reduction at 0 with 29 rule applications. Total rules 29 place count 678 transition count 697
Iterating global reduction 0 with 29 rules applied. Total rules applied 58 place count 678 transition count 697
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 63 place count 678 transition count 692
Discarding 12 places :
Symmetric choice reduction at 1 with 12 rule applications. Total rules 75 place count 666 transition count 680
Iterating global reduction 1 with 12 rules applied. Total rules applied 87 place count 666 transition count 680
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 1 with 11 rules applied. Total rules applied 98 place count 666 transition count 669
Applied a total of 98 rules in 51 ms. Remains 666 /707 variables (removed 41) and now considering 669/726 (removed 57) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 52 ms. Remains : 666/707 places, 669/726 transitions.
[2023-03-10 21:46:27] [INFO ] Flatten gal took : 17 ms
[2023-03-10 21:46:27] [INFO ] Flatten gal took : 18 ms
[2023-03-10 21:46:27] [INFO ] Input system was already deterministic with 669 transitions.
Starting structural reductions in LTL mode, iteration 0 : 707/707 places, 726/726 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 683 transition count 702
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 683 transition count 702
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 51 place count 683 transition count 699
Discarding 12 places :
Symmetric choice reduction at 1 with 12 rule applications. Total rules 63 place count 671 transition count 687
Iterating global reduction 1 with 12 rules applied. Total rules applied 75 place count 671 transition count 687
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 1 with 11 rules applied. Total rules applied 86 place count 671 transition count 676
Applied a total of 86 rules in 52 ms. Remains 671 /707 variables (removed 36) and now considering 676/726 (removed 50) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 53 ms. Remains : 671/707 places, 676/726 transitions.
[2023-03-10 21:46:28] [INFO ] Flatten gal took : 17 ms
[2023-03-10 21:46:28] [INFO ] Flatten gal took : 18 ms
[2023-03-10 21:46:28] [INFO ] Input system was already deterministic with 676 transitions.
Starting structural reductions in LTL mode, iteration 0 : 707/707 places, 726/726 transitions.
Discarding 27 places :
Symmetric choice reduction at 0 with 27 rule applications. Total rules 27 place count 680 transition count 699
Iterating global reduction 0 with 27 rules applied. Total rules applied 54 place count 680 transition count 699
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 58 place count 680 transition count 695
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 69 place count 669 transition count 684
Iterating global reduction 1 with 11 rules applied. Total rules applied 80 place count 669 transition count 684
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 90 place count 669 transition count 674
Applied a total of 90 rules in 67 ms. Remains 669 /707 variables (removed 38) and now considering 674/726 (removed 52) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 67 ms. Remains : 669/707 places, 674/726 transitions.
[2023-03-10 21:46:28] [INFO ] Flatten gal took : 17 ms
[2023-03-10 21:46:28] [INFO ] Flatten gal took : 17 ms
[2023-03-10 21:46:28] [INFO ] Input system was already deterministic with 674 transitions.
[2023-03-10 21:46:28] [INFO ] Flatten gal took : 19 ms
[2023-03-10 21:46:28] [INFO ] Flatten gal took : 19 ms
[2023-03-10 21:46:28] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-10 21:46:28] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 707 places, 726 transitions and 1853 arcs took 6 ms.
Total runtime 20177 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT GPUForwardProgress-PT-40b
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA GPUForwardProgress-PT-40b-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-40b-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-40b-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-40b-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-40b-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-40b-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-40b-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA GPUForwardProgress-PT-40b-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678485247022

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 27 (type EXCL) for 24 GPUForwardProgress-PT-40b-CTLFireability-09
lola: time limit : 138 sec
lola: memory limit: 32 pages
lola: FINISHED task # 27 (type EXCL) for GPUForwardProgress-PT-40b-CTLFireability-09
lola: result : false
lola: markings : 37
lola: fired transitions : 52
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 1 (type EXCL) for 0 GPUForwardProgress-PT-40b-CTLFireability-00
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: planning for (null) stopped (result already fixed).
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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GPUForwardProgress-PT-40b-CTLFireability-09: CONJ false CTL model checker

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1 CTL EXCL 65/224 28/32 GPUForwardProgress-PT-40b-CTLFireability-00 6557969 m, 101851 m/sec, 42056553 t fired, .

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1 CTL EXCL 70/224 30/32 GPUForwardProgress-PT-40b-CTLFireability-00 7061286 m, 100663 m/sec, 45389482 t fired, .

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1 CTL EXCL 75/224 32/32 GPUForwardProgress-PT-40b-CTLFireability-00 7571250 m, 101992 m/sec, 48678378 t fired, .

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GPUForwardProgress-PT-40b-CTLFireability-09: CONJ false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-13: CONJ false state space /EXEF
GPUForwardProgress-PT-40b-CTLFireability-15: DISJ true CTL model checker

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48 CTL EXCL 5/319 3/32 GPUForwardProgress-PT-40b-CTLFireability-14 366368 m, 73273 m/sec, 930747 t fired, .

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48 CTL EXCL 10/319 5/32 GPUForwardProgress-PT-40b-CTLFireability-14 745945 m, 75915 m/sec, 1921466 t fired, .

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48 CTL EXCL 15/319 7/32 GPUForwardProgress-PT-40b-CTLFireability-14 1123911 m, 75593 m/sec, 2916062 t fired, .

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48 CTL EXCL 20/319 9/32 GPUForwardProgress-PT-40b-CTLFireability-14 1499214 m, 75060 m/sec, 3912218 t fired, .

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48 CTL EXCL 25/319 11/32 GPUForwardProgress-PT-40b-CTLFireability-14 1871592 m, 74475 m/sec, 4912703 t fired, .

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48 CTL EXCL 30/319 13/32 GPUForwardProgress-PT-40b-CTLFireability-14 2243169 m, 74315 m/sec, 5895816 t fired, .

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48 CTL EXCL 35/319 15/32 GPUForwardProgress-PT-40b-CTLFireability-14 2613009 m, 73968 m/sec, 6880002 t fired, .

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48 CTL EXCL 40/319 17/32 GPUForwardProgress-PT-40b-CTLFireability-14 2977268 m, 72851 m/sec, 7869851 t fired, .

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48 CTL EXCL 45/319 19/32 GPUForwardProgress-PT-40b-CTLFireability-14 3345448 m, 73636 m/sec, 8859277 t fired, .

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48 CTL EXCL 50/319 21/32 GPUForwardProgress-PT-40b-CTLFireability-14 3706620 m, 72234 m/sec, 9850611 t fired, .

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48 CTL EXCL 55/319 23/32 GPUForwardProgress-PT-40b-CTLFireability-14 4070301 m, 72736 m/sec, 10838903 t fired, .

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48 CTL EXCL 60/319 25/32 GPUForwardProgress-PT-40b-CTLFireability-14 4430621 m, 72064 m/sec, 11796617 t fired, .

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48 CTL EXCL 65/319 27/32 GPUForwardProgress-PT-40b-CTLFireability-14 4797589 m, 73393 m/sec, 12780122 t fired, .

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48 CTL EXCL 70/319 29/32 GPUForwardProgress-PT-40b-CTLFireability-14 5162008 m, 72883 m/sec, 13764364 t fired, .

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48 CTL EXCL 75/319 30/32 GPUForwardProgress-PT-40b-CTLFireability-14 5524486 m, 72495 m/sec, 14750348 t fired, .

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48 CTL EXCL 80/319 32/32 GPUForwardProgress-PT-40b-CTLFireability-14 5865893 m, 68281 m/sec, 15698996 t fired, .

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GPUForwardProgress-PT-40b-CTLFireability-11: CTL true CTL model checker
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22 CTL EXCL 5/490 4/32 GPUForwardProgress-PT-40b-CTLFireability-08 570578 m, 114115 m/sec, 879975 t fired, .

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22 CTL EXCL 10/490 7/32 GPUForwardProgress-PT-40b-CTLFireability-08 1147187 m, 115321 m/sec, 1817862 t fired, .

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22 CTL EXCL 15/490 10/32 GPUForwardProgress-PT-40b-CTLFireability-08 1715614 m, 113685 m/sec, 2760786 t fired, .

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22 CTL EXCL 40/490 25/32 GPUForwardProgress-PT-40b-CTLFireability-08 4480182 m, 112476 m/sec, 7433279 t fired, .

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22 CTL EXCL 45/490 28/32 GPUForwardProgress-PT-40b-CTLFireability-08 5029529 m, 109869 m/sec, 8363693 t fired, .

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22 CTL EXCL 50/490 31/32 GPUForwardProgress-PT-40b-CTLFireability-08 5573852 m, 108864 m/sec, 9296903 t fired, .

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16 CTL EXCL 5/675 4/32 GPUForwardProgress-PT-40b-CTLFireability-05 570301 m, 114060 m/sec, 890072 t fired, .

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16 CTL EXCL 10/675 7/32 GPUForwardProgress-PT-40b-CTLFireability-05 1149032 m, 115746 m/sec, 1832209 t fired, .

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13 CTL EXCL 5/830 6/32 GPUForwardProgress-PT-40b-CTLFireability-04 760094 m, 152018 m/sec, 903938 t fired, .

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13 CTL EXCL 10/830 9/32 GPUForwardProgress-PT-40b-CTLFireability-04 1344561 m, 116893 m/sec, 1839910 t fired, .

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13 CTL EXCL 15/830 13/32 GPUForwardProgress-PT-40b-CTLFireability-04 1918127 m, 114713 m/sec, 2778541 t fired, .

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4 CTL EXCL 30/1091 20/32 GPUForwardProgress-PT-40b-CTLFireability-01 3410508 m, 110856 m/sec, 5628595 t fired, .

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4 CTL EXCL 35/1091 23/32 GPUForwardProgress-PT-40b-CTLFireability-01 3951091 m, 108116 m/sec, 6581453 t fired, .

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4 CTL EXCL 40/1091 25/32 GPUForwardProgress-PT-40b-CTLFireability-01 4522074 m, 114196 m/sec, 7514436 t fired, .

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4 CTL EXCL 45/1091 28/32 GPUForwardProgress-PT-40b-CTLFireability-01 5075577 m, 110700 m/sec, 8453302 t fired, .

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4 CTL EXCL 50/1091 31/32 GPUForwardProgress-PT-40b-CTLFireability-01 5622370 m, 109358 m/sec, 9396960 t fired, .

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10 CTL EXCL 5/3218 3/32 GPUForwardProgress-PT-40b-CTLFireability-03 541063 m, 108212 m/sec, 2700029 t fired, .

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10 CTL EXCL 10/3218 5/32 GPUForwardProgress-PT-40b-CTLFireability-03 1096065 m, 111000 m/sec, 5549465 t fired, .

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10 CTL EXCL 15/3218 7/32 GPUForwardProgress-PT-40b-CTLFireability-03 1631491 m, 107085 m/sec, 8340274 t fired, .

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10 CTL EXCL 20/3218 10/32 GPUForwardProgress-PT-40b-CTLFireability-03 2166623 m, 107026 m/sec, 11122811 t fired, .

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10 CTL EXCL 30/3218 14/32 GPUForwardProgress-PT-40b-CTLFireability-03 3227447 m, 104209 m/sec, 16727746 t fired, .

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GPUForwardProgress-PT-40b-CTLFireability-02: EG true state space / EG
GPUForwardProgress-PT-40b-CTLFireability-06: CTL false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-09: CONJ false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-11: CTL true CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-12: CTL false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-13: CONJ false state space /EXEF
GPUForwardProgress-PT-40b-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-40b-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-40b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 50/3218 23/32 GPUForwardProgress-PT-40b-CTLFireability-03 5279977 m, 93741 m/sec, 27595897 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-40b-CTLFireability-02: EG true state space / EG
GPUForwardProgress-PT-40b-CTLFireability-06: CTL false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-09: CONJ false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-11: CTL true CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-12: CTL false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-13: CONJ false state space /EXEF
GPUForwardProgress-PT-40b-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-40b-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-40b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 55/3218 25/32 GPUForwardProgress-PT-40b-CTLFireability-03 5792356 m, 102475 m/sec, 30333587 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-40b-CTLFireability-02: EG true state space / EG
GPUForwardProgress-PT-40b-CTLFireability-06: CTL false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-09: CONJ false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-11: CTL true CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-12: CTL false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-13: CONJ false state space /EXEF
GPUForwardProgress-PT-40b-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-40b-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-40b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 60/3218 27/32 GPUForwardProgress-PT-40b-CTLFireability-03 6311479 m, 103824 m/sec, 33130643 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-40b-CTLFireability-02: EG true state space / EG
GPUForwardProgress-PT-40b-CTLFireability-06: CTL false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-09: CONJ false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-11: CTL true CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-12: CTL false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-13: CONJ false state space /EXEF
GPUForwardProgress-PT-40b-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-40b-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-40b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 65/3218 30/32 GPUForwardProgress-PT-40b-CTLFireability-03 6813617 m, 100427 m/sec, 35858602 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-40b-CTLFireability-02: EG true state space / EG
GPUForwardProgress-PT-40b-CTLFireability-06: CTL false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-09: CONJ false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-11: CTL true CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-12: CTL false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-13: CONJ false state space /EXEF
GPUForwardProgress-PT-40b-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-40b-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
GPUForwardProgress-PT-40b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 70/3218 32/32 GPUForwardProgress-PT-40b-CTLFireability-03 7304313 m, 98139 m/sec, 38587601 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-40b-CTLFireability-02: EG true state space / EG
GPUForwardProgress-PT-40b-CTLFireability-06: CTL false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-09: CONJ false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-11: CTL true CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-12: CTL false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-13: CONJ false state space /EXEF
GPUForwardProgress-PT-40b-CTLFireability-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GPUForwardProgress-PT-40b-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
GPUForwardProgress-PT-40b-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GPUForwardProgress-PT-40b-CTLFireability-00: CTL unknown AGGR
GPUForwardProgress-PT-40b-CTLFireability-01: CTL unknown AGGR
GPUForwardProgress-PT-40b-CTLFireability-02: EG true state space / EG
GPUForwardProgress-PT-40b-CTLFireability-03: CTL unknown AGGR
GPUForwardProgress-PT-40b-CTLFireability-04: CTL unknown AGGR
GPUForwardProgress-PT-40b-CTLFireability-05: CTL unknown AGGR
GPUForwardProgress-PT-40b-CTLFireability-06: CTL false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-08: CTL unknown AGGR
GPUForwardProgress-PT-40b-CTLFireability-09: CONJ false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-10: CTL true CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-11: CTL true CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-12: CTL false CTL model checker
GPUForwardProgress-PT-40b-CTLFireability-13: CONJ false state space /EXEF
GPUForwardProgress-PT-40b-CTLFireability-14: CTL unknown AGGR
GPUForwardProgress-PT-40b-CTLFireability-15: DISJ true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GPUForwardProgress-PT-40b"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is GPUForwardProgress-PT-40b, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r199-smll-167840345600154"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/GPUForwardProgress-PT-40b.tgz
mv GPUForwardProgress-PT-40b execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;