fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r170-tall-167838857000302
Last Updated
May 14, 2023

About the Execution of Marcie+red for FamilyReunion-COL-L00010M0001C001P001G001

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
8102.535 3600000.00 3620304.00 18679.10 FFFFFFTFTFFFFFTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r170-tall-167838857000302.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool marciexred
Input is FamilyReunion-COL-L00010M0001C001P001G001, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r170-tall-167838857000302
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 596K
-rw-r--r-- 1 mcc users 6.9K Feb 26 12:01 CTLCardinality.txt
-rw-r--r-- 1 mcc users 69K Feb 26 12:01 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.1K Feb 26 11:59 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 26 11:59 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:05 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 16:05 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Feb 25 16:05 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:05 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 12:06 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 134K Feb 26 12:06 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.9K Feb 26 12:04 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 62K Feb 26 12:04 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 16:05 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:05 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 24 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 134K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-02
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-03
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-04
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-12
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-13
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-14
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678500704542

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=marciexred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FamilyReunion-COL-L00010M0001C001P001G001
Applying reductions before tool marcie
Invoking reducer
Running Version 202303021504
[2023-03-11 02:11:47] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-11 02:11:47] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 02:11:47] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-11 02:11:47] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-11 02:11:48] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 502 ms
[2023-03-11 02:11:48] [INFO ] Detected 5 constant HL places corresponding to 10 PT places.
[2023-03-11 02:11:48] [INFO ] Imported 104 HL places and 66 HL transitions for a total of 1486 PT places and 1245.0 transition bindings in 21 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 27 ms.
Working with output stream class java.io.PrintStream
[2023-03-11 02:11:48] [INFO ] Built PT skeleton of HLPN with 104 places and 66 transitions 198 arcs in 5 ms.
[2023-03-11 02:11:48] [INFO ] Skeletonized 16 HLPN properties in 1 ms.
Remains 16 properties that can be checked using skeleton over-approximation.
Reduce places removed 5 places and 0 transitions.
Computed a total of 99 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 99 transition count 66
[2023-03-11 02:11:48] [INFO ] Flatten gal took : 26 ms
[2023-03-11 02:11:48] [INFO ] Flatten gal took : 10 ms
Transition Gate2ANDJoin forces synchronizations/join behavior on parameter l of sort LegalResident
Symmetric sort wr.t. initial and guards and successors and join/free detected :Response
Symmetric sort wr.t. initial detected :Response
Transition SendClearanceToRel : guard parameter $r(Response:2) in guard (EQ $r 0)introduces in Response(2) partition with 2 elements
Symmetric sort wr.t. initial and guards and successors and join/free detected :CINFORMI
Symmetric sort wr.t. initial detected :CINFORMI
Symmetric sort wr.t. initial and guards detected :CINFORMI
Applying symmetric unfolding of full symmetric sort :CINFORMI domain size was 2
Symmetric sort wr.t. initial and guards and successors and join/free detected :GovernmentCommission
Symmetric sort wr.t. initial detected :GovernmentCommission
Symmetric sort wr.t. initial and guards detected :GovernmentCommission
Applying symmetric unfolding of full symmetric sort :GovernmentCommission domain size was 2
Transition Gate1ANDJoin forces synchronizations/join behavior on parameter p of sort PublicAdminOffice
Transition ReceiveLangChoice forces synchronizations/join behavior on parameter m of sort MICSystem
[2023-03-11 02:11:48] [INFO ] Unfolded HLPN to a Petri net with 1379 places and 1069 transitions 3062 arcs in 25 ms.
[2023-03-11 02:11:48] [INFO ] Unfolded 16 HLPN properties in 1 ms.
Deduced a syphon composed of 11 places in 12 ms
Reduce places removed 19 places and 0 transitions.
Incomplete random walk after 10000 steps, including 15 resets, run finished after 617 ms. (steps per millisecond=16 ) properties (out of 16) seen :5
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 11) seen :1
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 51 ms. (steps per millisecond=196 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 210 ms. (steps per millisecond=47 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 181 ms. (steps per millisecond=55 ) properties (out of 10) seen :1
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 9) seen :0
Running SMT prover for 9 properties.
// Phase 1: matrix 1069 rows 1360 cols
[2023-03-11 02:11:49] [INFO ] Computed 331 place invariants in 57 ms
[2023-03-11 02:11:51] [INFO ] [Real]Absence check using 31 positive place invariants in 18 ms returned sat
[2023-03-11 02:11:51] [INFO ] [Real]Absence check using 31 positive and 300 generalized place invariants in 79 ms returned sat
[2023-03-11 02:11:51] [INFO ] After 1377ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:7
[2023-03-11 02:11:52] [INFO ] [Nat]Absence check using 31 positive place invariants in 15 ms returned sat
[2023-03-11 02:11:52] [INFO ] [Nat]Absence check using 31 positive and 300 generalized place invariants in 76 ms returned sat
[2023-03-11 02:11:52] [INFO ] After 475ms SMT Verify possible using all constraints in natural domain returned unsat :9 sat :0
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-14 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-13 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-04 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-02 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 9 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 4654 ms.
timeout --kill-after=10s --signal=SIGINT 1m for testing only

Marcie built on Linux at 2019-11-18.
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: /home/mcc/BenchKit/bin//../reducer/bin//../../marcie/bin/marcie --net-file=model.pnml --mcc-file=ReachabilityCardinality.xml --memory=6 --mcc-mode

parse successfull
net created successfully

Unfolding complete |P|=1475|T|=1234|A|=3799
Time for unfolding: 0m 5.253sec

Net: FamilyReunion_COL_L00010M0001C001P001G001
(NrP: 1475 NrTr: 1234 NrArc: 3799)

parse formulas
formulas created successfully
place and transition orderings generation:0m 0.164sec

net check time: 0m 0.000sec

init dd package: 0m 2.719sec

TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 8045376 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16100916 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
check for maximal unmarked siphon
ok
check for constant places
c0_CINFORMI0
c0_CINFORMI1
c2_CINFORMI0
c2_CINFORMI1
m0_MICSystem0
m0_MICSystem1
p0_PublicAdminOffice0
p0_PublicAdminOffice1
r0_Response0
r0_Response1
found 10 constant places
check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m 0.004sec

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L00010M0001C001P001G001"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="marciexred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool marciexred"
echo " Input is FamilyReunion-COL-L00010M0001C001P001G001, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r170-tall-167838857000302"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L00010M0001C001P001G001.tgz
mv FamilyReunion-COL-L00010M0001C001P001G001 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;