fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r167-tall-167838853300602
Last Updated
May 14, 2023

About the Execution of LoLa+red for FunctionPointer-PT-a002

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
5042.544 202820.00 187401.00 873.50 F?????TF?F?T??F? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r167-tall-167838853300602.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is FunctionPointer-PT-a002, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838853300602
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 464K
-rw-r--r-- 1 mcc users 6.7K Feb 25 11:52 CTLCardinality.txt
-rw-r--r-- 1 mcc users 74K Feb 25 11:52 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K Feb 25 11:51 CTLFireability.txt
-rw-r--r-- 1 mcc users 42K Feb 25 11:51 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:08 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:08 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:08 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:08 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 11:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 112K Feb 25 11:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.6K Feb 25 11:53 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 77K Feb 25 11:53 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:08 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:08 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 34K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FunctionPointer-PT-a002-CTLFireability-00
FORMULA_NAME FunctionPointer-PT-a002-CTLFireability-01
FORMULA_NAME FunctionPointer-PT-a002-CTLFireability-02
FORMULA_NAME FunctionPointer-PT-a002-CTLFireability-03
FORMULA_NAME FunctionPointer-PT-a002-CTLFireability-04
FORMULA_NAME FunctionPointer-PT-a002-CTLFireability-05
FORMULA_NAME FunctionPointer-PT-a002-CTLFireability-06
FORMULA_NAME FunctionPointer-PT-a002-CTLFireability-07
FORMULA_NAME FunctionPointer-PT-a002-CTLFireability-08
FORMULA_NAME FunctionPointer-PT-a002-CTLFireability-09
FORMULA_NAME FunctionPointer-PT-a002-CTLFireability-10
FORMULA_NAME FunctionPointer-PT-a002-CTLFireability-11
FORMULA_NAME FunctionPointer-PT-a002-CTLFireability-12
FORMULA_NAME FunctionPointer-PT-a002-CTLFireability-13
FORMULA_NAME FunctionPointer-PT-a002-CTLFireability-14
FORMULA_NAME FunctionPointer-PT-a002-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678493245975

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FunctionPointer-PT-a002
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 00:07:27] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-11 00:07:27] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 00:07:27] [INFO ] Load time of PNML (sax parser for PT used): 37 ms
[2023-03-11 00:07:27] [INFO ] Transformed 40 places.
[2023-03-11 00:07:27] [INFO ] Transformed 70 transitions.
[2023-03-11 00:07:27] [INFO ] Parsed PT model containing 40 places and 70 transitions and 284 arcs in 94 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Initial state reduction rules removed 1 formulas.
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 4 transitions.
FORMULA FunctionPointer-PT-a002-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 30 out of 34 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 34/34 places, 66/66 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 31 transition count 66
Applied a total of 3 rules in 9 ms. Remains 31 /34 variables (removed 3) and now considering 66/66 (removed 0) transitions.
[2023-03-11 00:07:27] [INFO ] Flow matrix only has 46 transitions (discarded 20 similar events)
// Phase 1: matrix 46 rows 31 cols
[2023-03-11 00:07:27] [INFO ] Computed 2 place invariants in 11 ms
[2023-03-11 00:07:27] [INFO ] Implicit Places using invariants in 140 ms returned []
[2023-03-11 00:07:27] [INFO ] Flow matrix only has 46 transitions (discarded 20 similar events)
[2023-03-11 00:07:27] [INFO ] Invariant cache hit.
[2023-03-11 00:07:27] [INFO ] State equation strengthened by 8 read => feed constraints.
[2023-03-11 00:07:27] [INFO ] Implicit Places using invariants and state equation in 59 ms returned []
Implicit Place search using SMT with State Equation took 223 ms to find 0 implicit places.
[2023-03-11 00:07:27] [INFO ] Flow matrix only has 46 transitions (discarded 20 similar events)
[2023-03-11 00:07:27] [INFO ] Invariant cache hit.
[2023-03-11 00:07:27] [INFO ] Dead Transitions using invariants and state equation in 65 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 31/34 places, 66/66 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 298 ms. Remains : 31/34 places, 66/66 transitions.
Support contains 30 out of 31 places after structural reductions.
[2023-03-11 00:07:28] [INFO ] Flatten gal took : 20 ms
[2023-03-11 00:07:28] [INFO ] Flatten gal took : 9 ms
[2023-03-11 00:07:28] [INFO ] Input system was already deterministic with 66 transitions.
Incomplete random walk after 10001 steps, including 63 resets, run finished after 335 ms. (steps per millisecond=29 ) properties (out of 48) seen :43
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 17 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 5) seen :2
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 33 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-11 00:07:28] [INFO ] Flow matrix only has 46 transitions (discarded 20 similar events)
[2023-03-11 00:07:28] [INFO ] Invariant cache hit.
[2023-03-11 00:07:28] [INFO ] [Real]Absence check using 1 positive place invariants in 1 ms returned sat
[2023-03-11 00:07:28] [INFO ] [Real]Absence check using 1 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-11 00:07:28] [INFO ] After 79ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:2
[2023-03-11 00:07:28] [INFO ] [Nat]Absence check using 1 positive place invariants in 0 ms returned sat
[2023-03-11 00:07:28] [INFO ] [Nat]Absence check using 1 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-11 00:07:28] [INFO ] After 16ms SMT Verify possible using state equation in natural domain returned unsat :2 sat :1
[2023-03-11 00:07:28] [INFO ] State equation strengthened by 8 read => feed constraints.
[2023-03-11 00:07:28] [INFO ] After 4ms SMT Verify possible using 8 Read/Feed constraints in natural domain returned unsat :2 sat :1
[2023-03-11 00:07:28] [INFO ] After 11ms SMT Verify possible using trap constraints in natural domain returned unsat :2 sat :1
Attempting to minimize the solution found.
Minimization took 12 ms.
[2023-03-11 00:07:28] [INFO ] After 73ms SMT Verify possible using all constraints in natural domain returned unsat :2 sat :1
Fused 3 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 2 ms.
Support contains 5 out of 31 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 31/31 places, 66/66 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 30 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 30 transition count 64
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 30 transition count 62
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 6 place count 30 transition count 60
Applied a total of 6 rules in 13 ms. Remains 30 /31 variables (removed 1) and now considering 60/66 (removed 6) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 13 ms. Remains : 30/31 places, 60/66 transitions.
Incomplete random walk after 10002 steps, including 52 resets, run finished after 12 ms. (steps per millisecond=833 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 33 resets, run finished after 8 ms. (steps per millisecond=1250 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 3029463 steps, run timeout after 3001 ms. (steps per millisecond=1009 ) properties seen :{}
Probabilistic random walk after 3029463 steps, saw 1853282 distinct states, run finished after 3002 ms. (steps per millisecond=1009 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-11 00:07:31] [INFO ] Flow matrix only has 43 transitions (discarded 17 similar events)
// Phase 1: matrix 43 rows 30 cols
[2023-03-11 00:07:31] [INFO ] Computed 2 place invariants in 6 ms
[2023-03-11 00:07:31] [INFO ] [Real]Absence check using 1 positive place invariants in 1 ms returned sat
[2023-03-11 00:07:31] [INFO ] [Real]Absence check using 1 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-11 00:07:31] [INFO ] After 48ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-11 00:07:31] [INFO ] [Nat]Absence check using 1 positive place invariants in 1 ms returned sat
[2023-03-11 00:07:31] [INFO ] [Nat]Absence check using 1 positive and 1 generalized place invariants in 0 ms returned sat
[2023-03-11 00:07:31] [INFO ] After 12ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-11 00:07:31] [INFO ] State equation strengthened by 8 read => feed constraints.
[2023-03-11 00:07:31] [INFO ] After 4ms SMT Verify possible using 8 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-11 00:07:31] [INFO ] After 8ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 4 ms.
[2023-03-11 00:07:31] [INFO ] After 52ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 0 ms.
Support contains 5 out of 30 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 30/30 places, 60/60 transitions.
Applied a total of 0 rules in 3 ms. Remains 30 /30 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 3 ms. Remains : 30/30 places, 60/60 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 30/30 places, 60/60 transitions.
Applied a total of 0 rules in 2 ms. Remains 30 /30 variables (removed 0) and now considering 60/60 (removed 0) transitions.
[2023-03-11 00:07:31] [INFO ] Flow matrix only has 43 transitions (discarded 17 similar events)
[2023-03-11 00:07:31] [INFO ] Invariant cache hit.
[2023-03-11 00:07:32] [INFO ] Implicit Places using invariants in 29 ms returned []
[2023-03-11 00:07:32] [INFO ] Flow matrix only has 43 transitions (discarded 17 similar events)
[2023-03-11 00:07:32] [INFO ] Invariant cache hit.
[2023-03-11 00:07:32] [INFO ] State equation strengthened by 8 read => feed constraints.
[2023-03-11 00:07:32] [INFO ] Implicit Places using invariants and state equation in 38 ms returned []
Implicit Place search using SMT with State Equation took 69 ms to find 0 implicit places.
[2023-03-11 00:07:32] [INFO ] Redundant transitions in 1 ms returned []
[2023-03-11 00:07:32] [INFO ] Flow matrix only has 43 transitions (discarded 17 similar events)
[2023-03-11 00:07:32] [INFO ] Invariant cache hit.
[2023-03-11 00:07:32] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 112 ms. Remains : 30/30 places, 60/60 transitions.
Ensure Unique test removed 17 transitions
Reduce isomorphic transitions removed 17 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 19 rules applied. Total rules applied 19 place count 30 transition count 41
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 21 place count 28 transition count 41
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 6 Pre rules applied. Total rules applied 21 place count 28 transition count 35
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 33 place count 22 transition count 35
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 35 place count 21 transition count 34
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 36 place count 20 transition count 31
Iterating global reduction 2 with 1 rules applied. Total rules applied 37 place count 20 transition count 31
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 38 place count 20 transition count 30
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 38 place count 20 transition count 29
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 40 place count 19 transition count 29
Applied a total of 40 rules in 8 ms. Remains 19 /30 variables (removed 11) and now considering 29/60 (removed 31) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 29 rows 19 cols
[2023-03-11 00:07:32] [INFO ] Computed 2 place invariants in 1 ms
[2023-03-11 00:07:32] [INFO ] [Real]Absence check using 1 positive place invariants in 1 ms returned sat
[2023-03-11 00:07:32] [INFO ] [Real]Absence check using 1 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-11 00:07:32] [INFO ] After 27ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-11 00:07:32] [INFO ] [Nat]Absence check using 1 positive place invariants in 1 ms returned sat
[2023-03-11 00:07:32] [INFO ] [Nat]Absence check using 1 positive and 1 generalized place invariants in 0 ms returned sat
[2023-03-11 00:07:32] [INFO ] After 8ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-11 00:07:32] [INFO ] After 11ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 2 ms.
[2023-03-11 00:07:32] [INFO ] After 33ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Successfully simplified 2 atomic propositions for a total of 15 simplifications.
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 5 ms
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 6 ms
[2023-03-11 00:07:32] [INFO ] Input system was already deterministic with 66 transitions.
Computed a total of 3 stabilizing places and 8 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 31/31 places, 66/66 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 30 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 30 transition count 64
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 30 transition count 62
Applied a total of 4 rules in 2 ms. Remains 30 /31 variables (removed 1) and now considering 62/66 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 30/31 places, 62/66 transitions.
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 4 ms
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 4 ms
[2023-03-11 00:07:32] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 31/31 places, 66/66 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 30 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 30 transition count 64
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 30 transition count 62
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 6 place count 30 transition count 60
Applied a total of 6 rules in 7 ms. Remains 30 /31 variables (removed 1) and now considering 60/66 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 30/31 places, 60/66 transitions.
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 4 ms
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 3 ms
[2023-03-11 00:07:32] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 31/31 places, 66/66 transitions.
Applied a total of 0 rules in 1 ms. Remains 31 /31 variables (removed 0) and now considering 66/66 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 31/31 places, 66/66 transitions.
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 3 ms
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 4 ms
[2023-03-11 00:07:32] [INFO ] Input system was already deterministic with 66 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 31/31 places, 66/66 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 30 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 30 transition count 64
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 30 transition count 62
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 6 place count 30 transition count 60
Applied a total of 6 rules in 6 ms. Remains 30 /31 variables (removed 1) and now considering 60/66 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 30/31 places, 60/66 transitions.
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 3 ms
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 3 ms
[2023-03-11 00:07:32] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 31/31 places, 66/66 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 30 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 30 transition count 64
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 30 transition count 62
Applied a total of 4 rules in 2 ms. Remains 30 /31 variables (removed 1) and now considering 62/66 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 30/31 places, 62/66 transitions.
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 3 ms
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 3 ms
[2023-03-11 00:07:32] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 31/31 places, 66/66 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 30 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 30 transition count 64
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 30 transition count 62
Applied a total of 4 rules in 2 ms. Remains 30 /31 variables (removed 1) and now considering 62/66 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 30/31 places, 62/66 transitions.
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 3 ms
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 4 ms
[2023-03-11 00:07:32] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 31/31 places, 66/66 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 30 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 30 transition count 64
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 30 transition count 62
Applied a total of 4 rules in 4 ms. Remains 30 /31 variables (removed 1) and now considering 62/66 (removed 4) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 30/31 places, 62/66 transitions.
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 3 ms
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 4 ms
[2023-03-11 00:07:32] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 31/31 places, 66/66 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 30 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 30 transition count 64
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 30 transition count 62
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 6 place count 30 transition count 60
Applied a total of 6 rules in 6 ms. Remains 30 /31 variables (removed 1) and now considering 60/66 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 30/31 places, 60/66 transitions.
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 3 ms
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 4 ms
[2023-03-11 00:07:32] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 31/31 places, 66/66 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 30 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 30 transition count 64
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 30 transition count 62
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 6 place count 30 transition count 60
Applied a total of 6 rules in 6 ms. Remains 30 /31 variables (removed 1) and now considering 60/66 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 30/31 places, 60/66 transitions.
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 2 ms
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 3 ms
[2023-03-11 00:07:32] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 31/31 places, 66/66 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 30 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 30 transition count 64
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 30 transition count 62
Applied a total of 4 rules in 2 ms. Remains 30 /31 variables (removed 1) and now considering 62/66 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 30/31 places, 62/66 transitions.
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 3 ms
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 4 ms
[2023-03-11 00:07:32] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 31/31 places, 66/66 transitions.
Applied a total of 0 rules in 1 ms. Remains 31 /31 variables (removed 0) and now considering 66/66 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 31/31 places, 66/66 transitions.
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 2 ms
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 3 ms
[2023-03-11 00:07:32] [INFO ] Input system was already deterministic with 66 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 31/31 places, 66/66 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 30 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 30 transition count 64
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 30 transition count 62
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 1 with 2 rules applied. Total rules applied 6 place count 30 transition count 60
Applied a total of 6 rules in 6 ms. Remains 30 /31 variables (removed 1) and now considering 60/66 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 30/31 places, 60/66 transitions.
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 2 ms
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 3 ms
[2023-03-11 00:07:32] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 31/31 places, 66/66 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 30 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 30 transition count 64
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 30 transition count 62
Applied a total of 4 rules in 2 ms. Remains 30 /31 variables (removed 1) and now considering 62/66 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 30/31 places, 62/66 transitions.
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 2 ms
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 3 ms
[2023-03-11 00:07:32] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 31/31 places, 66/66 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 30 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 30 transition count 64
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 30 transition count 62
Applied a total of 4 rules in 2 ms. Remains 30 /31 variables (removed 1) and now considering 62/66 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 30/31 places, 62/66 transitions.
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 2 ms
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 3 ms
[2023-03-11 00:07:32] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 31/31 places, 66/66 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 30 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 30 transition count 64
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 30 transition count 62
Applied a total of 4 rules in 1 ms. Remains 30 /31 variables (removed 1) and now considering 62/66 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/31 places, 62/66 transitions.
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 3 ms
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 3 ms
[2023-03-11 00:07:32] [INFO ] Input system was already deterministic with 62 transitions.
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 4 ms
[2023-03-11 00:07:32] [INFO ] Flatten gal took : 4 ms
[2023-03-11 00:07:32] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-11 00:07:32] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 31 places, 66 transitions and 264 arcs took 1 ms.
Total runtime 5153 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT FunctionPointer-PT-a002
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA FunctionPointer-PT-a002-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FunctionPointer-PT-a002-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FunctionPointer-PT-a002-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FunctionPointer-PT-a002-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FunctionPointer-PT-a002-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678493448795

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 21 (type EXCL) for 18 FunctionPointer-PT-a002-CTLFireability-06
lola: time limit : 133 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 58 (type FNDP) for 18 FunctionPointer-PT-a002-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type EQUN) for 18 FunctionPointer-PT-a002-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SRCH) for 18 FunctionPointer-PT-a002-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 61 (type SRCH) for FunctionPointer-PT-a002-CTLFireability-06
lola: result : unknown
lola: markings : 6
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 58 (type FNDP) for FunctionPointer-PT-a002-CTLFireability-06
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: CANCELED task # 21 (type EXCL) for FunctionPointer-PT-a002-CTLFireability-06 (obsolete)
lola: CANCELED task # 59 (type EQUN) for FunctionPointer-PT-a002-CTLFireability-06 (obsolete)
lola: LAUNCH task # 47 (type EXCL) for 44 FunctionPointer-PT-a002-CTLFireability-12
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/375/CTLFireability-59.sara.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 59 (type EQUN) for FunctionPointer-PT-a002-CTLFireability-06
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FunctionPointer-PT-a002-CTLFireability-06: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FunctionPointer-PT-a002-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-07: AGEF 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-11: CONJ 0 2 0 0 2 0 0 0
FunctionPointer-PT-a002-CTLFireability-12: DISJ 0 1 1 0 2 0 0 0
FunctionPointer-PT-a002-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 5/225 16/32 FunctionPointer-PT-a002-CTLFireability-12 3823390 m, 764678 m/sec, 4878113 t fired, .

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FunctionPointer-PT-a002-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-11: CONJ 0 2 0 0 2 0 0 0
FunctionPointer-PT-a002-CTLFireability-12: DISJ 0 1 1 0 2 0 0 0
FunctionPointer-PT-a002-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 10/225 31/32 FunctionPointer-PT-a002-CTLFireability-12 7498915 m, 735105 m/sec, 9567576 t fired, .

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lola: time limit : 239 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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FunctionPointer-PT-a002-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 5/239 21/32 FunctionPointer-PT-a002-CTLFireability-15 5054279 m, 1010855 m/sec, 5054279 t fired, .

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7 CTL EXCL 10/439 14/32 FunctionPointer-PT-a002-CTLFireability-02 3421817 m, 330209 m/sec, 7551590 t fired, .

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7 CTL EXCL 15/439 21/32 FunctionPointer-PT-a002-CTLFireability-02 5057173 m, 327071 m/sec, 11160650 t fired, .

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7 CTL EXCL 20/439 28/32 FunctionPointer-PT-a002-CTLFireability-02 6671337 m, 322832 m/sec, 14722944 t fired, .

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FunctionPointer-PT-a002-CTLFireability-00: CTL false CTL model checker
FunctionPointer-PT-a002-CTLFireability-06: DISJ true findpath
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4 CTL EXCL 5/1163 5/32 FunctionPointer-PT-a002-CTLFireability-01 1124093 m, 224818 m/sec, 4883967 t fired, .

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4 CTL EXCL 10/1163 10/32 FunctionPointer-PT-a002-CTLFireability-01 2203002 m, 215781 m/sec, 9571638 t fired, .

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4 CTL EXCL 15/1163 14/32 FunctionPointer-PT-a002-CTLFireability-01 3258162 m, 211032 m/sec, 14156120 t fired, .

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4 CTL EXCL 20/1163 18/32 FunctionPointer-PT-a002-CTLFireability-01 4305819 m, 209531 m/sec, 18708019 t fired, .

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4 CTL EXCL 25/1163 22/32 FunctionPointer-PT-a002-CTLFireability-01 5345158 m, 207867 m/sec, 23223765 t fired, .

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4 CTL EXCL 30/1163 27/32 FunctionPointer-PT-a002-CTLFireability-01 6378246 m, 206617 m/sec, 27712352 t fired, .

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4 CTL EXCL 35/1163 31/32 FunctionPointer-PT-a002-CTLFireability-01 7402874 m, 204925 m/sec, 32164185 t fired, .

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29 CTL EXCL 5/1725 6/32 FunctionPointer-PT-a002-CTLFireability-08 1367537 m, 273507 m/sec, 4432697 t fired, .

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29 CTL EXCL 10/1725 11/32 FunctionPointer-PT-a002-CTLFireability-08 2684327 m, 263358 m/sec, 8700915 t fired, .

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29 CTL EXCL 15/1725 17/32 FunctionPointer-PT-a002-CTLFireability-08 3973364 m, 257807 m/sec, 12879171 t fired, .

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FunctionPointer-PT-a002-CTLFireability-06: DISJ true findpath
FunctionPointer-PT-a002-CTLFireability-07: AGEF false tscc_search
FunctionPointer-PT-a002-CTLFireability-09: CTL false CTL model checker
FunctionPointer-PT-a002-CTLFireability-11: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FunctionPointer-PT-a002-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-12: DISJ 0 0 0 0 3 0 1 0
FunctionPointer-PT-a002-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 20/1725 22/32 FunctionPointer-PT-a002-CTLFireability-08 5256663 m, 256659 m/sec, 17038828 t fired, .

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FunctionPointer-PT-a002-CTLFireability-00: CTL false CTL model checker
FunctionPointer-PT-a002-CTLFireability-06: DISJ true findpath
FunctionPointer-PT-a002-CTLFireability-07: AGEF false tscc_search
FunctionPointer-PT-a002-CTLFireability-09: CTL false CTL model checker
FunctionPointer-PT-a002-CTLFireability-11: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FunctionPointer-PT-a002-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-12: DISJ 0 0 0 0 3 0 1 0
FunctionPointer-PT-a002-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 25/1725 27/32 FunctionPointer-PT-a002-CTLFireability-08 6527852 m, 254237 m/sec, 21159235 t fired, .

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FunctionPointer-PT-a002-CTLFireability-00: CTL false CTL model checker
FunctionPointer-PT-a002-CTLFireability-06: DISJ true findpath
FunctionPointer-PT-a002-CTLFireability-07: AGEF false tscc_search
FunctionPointer-PT-a002-CTLFireability-09: CTL false CTL model checker
FunctionPointer-PT-a002-CTLFireability-11: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FunctionPointer-PT-a002-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-12: DISJ 0 0 0 0 3 0 1 0
FunctionPointer-PT-a002-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 30/1725 32/32 FunctionPointer-PT-a002-CTLFireability-08 7791296 m, 252688 m/sec, 25254536 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FunctionPointer-PT-a002-CTLFireability-00: CTL false CTL model checker
FunctionPointer-PT-a002-CTLFireability-06: DISJ true findpath
FunctionPointer-PT-a002-CTLFireability-07: AGEF false tscc_search
FunctionPointer-PT-a002-CTLFireability-09: CTL false CTL model checker
FunctionPointer-PT-a002-CTLFireability-11: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FunctionPointer-PT-a002-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-12: DISJ 0 0 0 0 3 0 1 0
FunctionPointer-PT-a002-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: LAUNCH task # 10 (type EXCL) for 9 FunctionPointer-PT-a002-CTLFireability-03
lola: time limit : 3415 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FunctionPointer-PT-a002-CTLFireability-00: CTL false CTL model checker
FunctionPointer-PT-a002-CTLFireability-06: DISJ true findpath
FunctionPointer-PT-a002-CTLFireability-07: AGEF false tscc_search
FunctionPointer-PT-a002-CTLFireability-09: CTL false CTL model checker
FunctionPointer-PT-a002-CTLFireability-11: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FunctionPointer-PT-a002-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FunctionPointer-PT-a002-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-12: DISJ 0 0 0 0 3 0 1 0
FunctionPointer-PT-a002-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/3415 18/32 FunctionPointer-PT-a002-CTLFireability-03 4360071 m, 872014 m/sec, 5562846 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FunctionPointer-PT-a002-CTLFireability-00: CTL false CTL model checker
FunctionPointer-PT-a002-CTLFireability-06: DISJ true findpath
FunctionPointer-PT-a002-CTLFireability-07: AGEF false tscc_search
FunctionPointer-PT-a002-CTLFireability-09: CTL false CTL model checker
FunctionPointer-PT-a002-CTLFireability-11: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FunctionPointer-PT-a002-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-12: DISJ 0 0 0 0 3 0 1 0
FunctionPointer-PT-a002-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FunctionPointer-PT-a002-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FunctionPointer-PT-a002-CTLFireability-00: CTL false CTL model checker
FunctionPointer-PT-a002-CTLFireability-01: CTL unknown AGGR
FunctionPointer-PT-a002-CTLFireability-02: CTL unknown AGGR
FunctionPointer-PT-a002-CTLFireability-03: CTL unknown AGGR
FunctionPointer-PT-a002-CTLFireability-04: CTL unknown AGGR
FunctionPointer-PT-a002-CTLFireability-05: CTL unknown AGGR
FunctionPointer-PT-a002-CTLFireability-06: DISJ true findpath
FunctionPointer-PT-a002-CTLFireability-07: AGEF false tscc_search
FunctionPointer-PT-a002-CTLFireability-08: CTL unknown AGGR
FunctionPointer-PT-a002-CTLFireability-09: CTL false CTL model checker
FunctionPointer-PT-a002-CTLFireability-10: CTL unknown AGGR
FunctionPointer-PT-a002-CTLFireability-11: CONJ true CONJ
FunctionPointer-PT-a002-CTLFireability-12: DISJ unknown DISJ
FunctionPointer-PT-a002-CTLFireability-13: CTL unknown AGGR
FunctionPointer-PT-a002-CTLFireability-15: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FunctionPointer-PT-a002"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is FunctionPointer-PT-a002, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r167-tall-167838853300602"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FunctionPointer-PT-a002.tgz
mv FunctionPointer-PT-a002 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;