Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r167-tall-167838852900306.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is FamilyReunion-COL-L00020M0002C001P001G001, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838852900306
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 560K
-rw-r--r-- 1 mcc users 7.4K Feb 26 11:40 CTLCardinality.txt
-rw-r--r-- 1 mcc users 78K Feb 26 11:40 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.5K Feb 26 11:36 CTLFireability.txt
-rw-r--r-- 1 mcc users 55K Feb 26 11:36 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:05 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:05 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K Feb 25 16:05 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:05 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.9K Feb 26 11:48 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 90K Feb 26 11:48 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 11:45 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 65K Feb 26 11:45 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 16:05 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:05 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 24 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 135K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-01
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-02
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-11
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678448160019

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FamilyReunion-COL-L00020M0002C001P001G001
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 11:36:01] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 11:36:01] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 11:36:01] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-10 11:36:01] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-10 11:36:02] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 708 ms
[2023-03-10 11:36:02] [INFO ] Detected 5 constant HL places corresponding to 11 PT places.
[2023-03-10 11:36:02] [INFO ] Imported 104 HL places and 66 HL transitions for a total of 3292 PT places and 2774.0 transition bindings in 22 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 11 ms.
[2023-03-10 11:36:02] [INFO ] Built PT skeleton of HLPN with 104 places and 66 transitions 198 arcs in 5 ms.
[2023-03-10 11:36:02] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Computed a total of 104 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 104 transition count 66
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 11 formulas.
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Remains 10 properties that can be checked using skeleton over-approximation.
Initial state reduction rules removed 1 formulas.
Reduce places removed 5 places and 0 transitions.
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 99 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 99 transition count 66
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Incomplete random walk after 10005 steps, including 7 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 24) seen :19
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 5) seen :3
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
// Phase 1: matrix 66 rows 99 cols
[2023-03-10 11:36:02] [INFO ] Computed 33 place invariants in 16 ms
[2023-03-10 11:36:02] [INFO ] [Real]Absence check using 4 positive place invariants in 5 ms returned sat
[2023-03-10 11:36:02] [INFO ] [Real]Absence check using 4 positive and 29 generalized place invariants in 7 ms returned sat
[2023-03-10 11:36:02] [INFO ] After 37ms SMT Verify possible using state equation in real domain returned unsat :0 sat :2
[2023-03-10 11:36:02] [INFO ] After 59ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-10 11:36:02] [INFO ] After 240ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-10 11:36:02] [INFO ] [Nat]Absence check using 4 positive place invariants in 1 ms returned sat
[2023-03-10 11:36:02] [INFO ] [Nat]Absence check using 4 positive and 29 generalized place invariants in 6 ms returned sat
[2023-03-10 11:36:02] [INFO ] After 30ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-10 11:36:02] [INFO ] After 50ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 11 ms.
[2023-03-10 11:36:02] [INFO ] After 118ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :2
Fused 2 Parikh solutions to 1 different solutions.
Finished Parikh walk after 166 steps, including 0 resets, run visited all 2 properties in 4 ms. (steps per millisecond=41 )
Parikh walk visited 2 properties in 3 ms.
[2023-03-10 11:36:02] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-10 11:36:02] [INFO ] Flatten gal took : 44 ms
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 11:36:02] [INFO ] Flatten gal took : 9 ms
Transition Gate2ANDJoin forces synchronizations/join behavior on parameter l of sort LegalResident
Transition ReceiveLangChoice forces synchronizations/join behavior on parameter m of sort MICSystem
Symmetric sort wr.t. initial and guards and successors and join/free detected :Response
Symmetric sort wr.t. initial detected :Response
Transition SendClearanceToRel : guard parameter $r(Response:2) in guard (EQ $r 0)introduces in Response(2) partition with 2 elements
Symmetric sort wr.t. initial and guards and successors and join/free detected :CINFORMI
Symmetric sort wr.t. initial detected :CINFORMI
Symmetric sort wr.t. initial and guards detected :CINFORMI
Applying symmetric unfolding of full symmetric sort :CINFORMI domain size was 2
Symmetric sort wr.t. initial and guards and successors and join/free detected :GovernmentCommission
Symmetric sort wr.t. initial detected :GovernmentCommission
Symmetric sort wr.t. initial and guards detected :GovernmentCommission
Applying symmetric unfolding of full symmetric sort :GovernmentCommission domain size was 2
Transition Gate1ANDJoin forces synchronizations/join behavior on parameter p of sort PublicAdminOffice
[2023-03-10 11:36:02] [INFO ] Unfolded HLPN to a Petri net with 3095 places and 2438 transitions 6997 arcs in 33 ms.
[2023-03-10 11:36:02] [INFO ] Unfolded 13 HLPN properties in 1 ms.
[2023-03-10 11:36:02] [INFO ] Reduced 21 identical enabling conditions.
[2023-03-10 11:36:02] [INFO ] Reduced 21 identical enabling conditions.
[2023-03-10 11:36:02] [INFO ] Reduced 21 identical enabling conditions.
[2023-03-10 11:36:02] [INFO ] Reduced 42 identical enabling conditions.
Deduced a syphon composed of 21 places in 16 ms
Reduce places removed 30 places and 0 transitions.
Support contains 2147 out of 3065 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 3065/3065 places, 2438/2438 transitions.
Reduce places removed 73 places and 0 transitions.
Discarding 63 places :
Implicit places reduction removed 63 places
Iterating post reduction 0 with 136 rules applied. Total rules applied 136 place count 2929 transition count 2438
Discarding 83 places :
Symmetric choice reduction at 1 with 83 rule applications. Total rules 219 place count 2846 transition count 2355
Iterating global reduction 1 with 83 rules applied. Total rules applied 302 place count 2846 transition count 2355
Applied a total of 302 rules in 168 ms. Remains 2846 /3065 variables (removed 219) and now considering 2355/2438 (removed 83) transitions.
// Phase 1: matrix 2355 rows 2846 cols
[2023-03-10 11:36:03] [INFO ] Computed 635 place invariants in 111 ms
[2023-03-10 11:36:03] [INFO ] Implicit Places using invariants in 684 ms returned []
[2023-03-10 11:36:03] [INFO ] Invariant cache hit.
[2023-03-10 11:36:06] [INFO ] Implicit Places using invariants and state equation in 2410 ms returned [609, 1514, 1662, 1663, 1664, 1665, 1666, 1667, 1668, 1669, 1670, 1671, 1672, 1673, 1674, 1675, 1676, 1677, 1678, 1679, 1680, 1681, 1682, 1981, 1982, 1983, 1984, 1985, 1986, 1987, 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2615, 2616, 2617, 2618, 2619, 2620, 2621, 2622, 2623, 2624, 2625, 2626, 2627, 2628, 2629, 2630, 2631, 2632, 2633, 2634, 2635]
Discarding 65 places :
Implicit Place search using SMT with State Equation took 3106 ms to find 65 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 2781/3065 places, 2355/2438 transitions.
Applied a total of 0 rules in 29 ms. Remains 2781 /2781 variables (removed 0) and now considering 2355/2355 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 3304 ms. Remains : 2781/3065 places, 2355/2438 transitions.
Support contains 2147 out of 2781 places after structural reductions.
[2023-03-10 11:36:06] [INFO ] Flatten gal took : 154 ms
[2023-03-10 11:36:06] [INFO ] Flatten gal took : 108 ms
[2023-03-10 11:36:07] [INFO ] Input system was already deterministic with 2355 transitions.
Incomplete random walk after 10000 steps, including 8 resets, run finished after 309 ms. (steps per millisecond=32 ) properties (out of 50) seen :48
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 93 ms. (steps per millisecond=107 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 128 ms. (steps per millisecond=78 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
// Phase 1: matrix 2355 rows 2781 cols
[2023-03-10 11:36:07] [INFO ] Computed 570 place invariants in 62 ms
[2023-03-10 11:36:08] [INFO ] [Real]Absence check using 0 positive and 570 generalized place invariants in 163 ms returned sat
[2023-03-10 11:36:08] [INFO ] After 623ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-10 11:36:09] [INFO ] [Nat]Absence check using 0 positive and 570 generalized place invariants in 169 ms returned sat
[2023-03-10 11:36:12] [INFO ] After 3729ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-10 11:36:14] [INFO ] After 5705ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 1713 ms.
[2023-03-10 11:36:16] [INFO ] After 8041ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :2
Finished Parikh walk after 124 steps, including 0 resets, run visited all 1 properties in 3 ms. (steps per millisecond=41 )
Parikh walk visited 2 properties in 9 ms.
[2023-03-10 11:36:16] [INFO ] Flatten gal took : 143 ms
[2023-03-10 11:36:17] [INFO ] Flatten gal took : 81 ms
[2023-03-10 11:36:17] [INFO ] Input system was already deterministic with 2355 transitions.
Computed a total of 2781 stabilizing places and 2355 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 2781 transition count 2355
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 2 formulas.
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in SI_CTL mode, iteration 0 : 2781/2781 places, 2355/2355 transitions.
Graph (complete) has 3759 edges and 2781 vertex of which 2589 are kept as prefixes of interest. Removing 192 places using SCC suffix rule.13 ms
Discarding 192 places :
Also discarding 192 output transitions
Drop transitions removed 192 transitions
Discarding 252 places :
Implicit places reduction removed 252 places
Drop transitions removed 588 transitions
Trivial Post-agglo rules discarded 588 transitions
Performed 588 trivial Post agglomeration. Transition count delta: 588
Iterating post reduction 0 with 840 rules applied. Total rules applied 841 place count 2337 transition count 1575
Reduce places removed 588 places and 0 transitions.
Performed 105 Post agglomeration using F-continuation condition.Transition count delta: 105
Iterating post reduction 1 with 693 rules applied. Total rules applied 1534 place count 1749 transition count 1470
Reduce places removed 105 places and 0 transitions.
Iterating post reduction 2 with 105 rules applied. Total rules applied 1639 place count 1644 transition count 1470
Performed 399 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 399 Pre rules applied. Total rules applied 1639 place count 1644 transition count 1071
Deduced a syphon composed of 399 places in 1 ms
Ensure Unique test removed 84 places
Reduce places removed 483 places and 0 transitions.
Iterating global reduction 3 with 882 rules applied. Total rules applied 2521 place count 1161 transition count 1071
Discarding 42 places :
Implicit places reduction removed 42 places
Performed 42 Post agglomeration using F-continuation condition.Transition count delta: 42
Iterating post reduction 3 with 84 rules applied. Total rules applied 2605 place count 1119 transition count 1029
Reduce places removed 42 places and 0 transitions.
Iterating post reduction 4 with 42 rules applied. Total rules applied 2647 place count 1077 transition count 1029
Performed 21 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 21 Pre rules applied. Total rules applied 2647 place count 1077 transition count 1008
Deduced a syphon composed of 21 places in 0 ms
Reduce places removed 21 places and 0 transitions.
Iterating global reduction 5 with 42 rules applied. Total rules applied 2689 place count 1056 transition count 1008
Discarding 24 places :
Symmetric choice reduction at 5 with 24 rule applications. Total rules 2713 place count 1032 transition count 924
Iterating global reduction 5 with 24 rules applied. Total rules applied 2737 place count 1032 transition count 924
Performed 21 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 21 Pre rules applied. Total rules applied 2737 place count 1032 transition count 903
Deduced a syphon composed of 21 places in 0 ms
Reduce places removed 21 places and 0 transitions.
Iterating global reduction 5 with 42 rules applied. Total rules applied 2779 place count 1011 transition count 903
Applied a total of 2779 rules in 285 ms. Remains 1011 /2781 variables (removed 1770) and now considering 903/2355 (removed 1452) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 285 ms. Remains : 1011/2781 places, 903/2355 transitions.
[2023-03-10 11:36:17] [INFO ] Flatten gal took : 22 ms
[2023-03-10 11:36:17] [INFO ] Flatten gal took : 25 ms
[2023-03-10 11:36:17] [INFO ] Input system was already deterministic with 903 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2781/2781 places, 2355/2355 transitions.
Discarding 378 places :
Implicit places reduction removed 378 places
Iterating post reduction 0 with 378 rules applied. Total rules applied 378 place count 2403 transition count 2355
Discarding 149 places :
Symmetric choice reduction at 1 with 149 rule applications. Total rules 527 place count 2254 transition count 2186
Iterating global reduction 1 with 149 rules applied. Total rules applied 676 place count 2254 transition count 2186
Discarding 83 places :
Symmetric choice reduction at 1 with 83 rule applications. Total rules 759 place count 2171 transition count 2103
Iterating global reduction 1 with 83 rules applied. Total rules applied 842 place count 2171 transition count 2103
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 844 place count 2169 transition count 2061
Iterating global reduction 1 with 2 rules applied. Total rules applied 846 place count 2169 transition count 2061
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 888 place count 2127 transition count 2019
Iterating global reduction 1 with 42 rules applied. Total rules applied 930 place count 2127 transition count 2019
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 972 place count 2085 transition count 1977
Iterating global reduction 1 with 42 rules applied. Total rules applied 1014 place count 2085 transition count 1977
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1056 place count 2043 transition count 1935
Iterating global reduction 1 with 42 rules applied. Total rules applied 1098 place count 2043 transition count 1935
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1140 place count 2001 transition count 1893
Iterating global reduction 1 with 42 rules applied. Total rules applied 1182 place count 2001 transition count 1893
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1224 place count 1959 transition count 1851
Iterating global reduction 1 with 42 rules applied. Total rules applied 1266 place count 1959 transition count 1851
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1308 place count 1917 transition count 1809
Iterating global reduction 1 with 42 rules applied. Total rules applied 1350 place count 1917 transition count 1809
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1392 place count 1875 transition count 1767
Iterating global reduction 1 with 42 rules applied. Total rules applied 1434 place count 1875 transition count 1767
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1476 place count 1833 transition count 1725
Iterating global reduction 1 with 42 rules applied. Total rules applied 1518 place count 1833 transition count 1725
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1560 place count 1791 transition count 1683
Iterating global reduction 1 with 42 rules applied. Total rules applied 1602 place count 1791 transition count 1683
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1644 place count 1749 transition count 1641
Iterating global reduction 1 with 42 rules applied. Total rules applied 1686 place count 1749 transition count 1641
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1728 place count 1707 transition count 1599
Iterating global reduction 1 with 42 rules applied. Total rules applied 1770 place count 1707 transition count 1599
Applied a total of 1770 rules in 1267 ms. Remains 1707 /2781 variables (removed 1074) and now considering 1599/2355 (removed 756) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1268 ms. Remains : 1707/2781 places, 1599/2355 transitions.
[2023-03-10 11:36:19] [INFO ] Flatten gal took : 36 ms
[2023-03-10 11:36:19] [INFO ] Flatten gal took : 35 ms
[2023-03-10 11:36:19] [INFO ] Input system was already deterministic with 1599 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2781/2781 places, 2355/2355 transitions.
Graph (complete) has 3759 edges and 2781 vertex of which 2570 are kept as prefixes of interest. Removing 211 places using SCC suffix rule.7 ms
Discarding 211 places :
Also discarding 211 output transitions
Drop transitions removed 211 transitions
Discarding 357 places :
Implicit places reduction removed 357 places
Drop transitions removed 882 transitions
Trivial Post-agglo rules discarded 882 transitions
Performed 882 trivial Post agglomeration. Transition count delta: 882
Iterating post reduction 0 with 1239 rules applied. Total rules applied 1240 place count 2213 transition count 1262
Reduce places removed 882 places and 0 transitions.
Performed 105 Post agglomeration using F-continuation condition.Transition count delta: 105
Iterating post reduction 1 with 987 rules applied. Total rules applied 2227 place count 1331 transition count 1157
Reduce places removed 105 places and 0 transitions.
Iterating post reduction 2 with 105 rules applied. Total rules applied 2332 place count 1226 transition count 1157
Performed 252 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 252 Pre rules applied. Total rules applied 2332 place count 1226 transition count 905
Deduced a syphon composed of 252 places in 0 ms
Ensure Unique test removed 42 places
Reduce places removed 294 places and 0 transitions.
Iterating global reduction 3 with 546 rules applied. Total rules applied 2878 place count 932 transition count 905
Discarding 42 places :
Implicit places reduction removed 42 places
Iterating post reduction 3 with 42 rules applied. Total rules applied 2920 place count 890 transition count 905
Discarding 65 places :
Symmetric choice reduction at 4 with 65 rule applications. Total rules 2985 place count 825 transition count 800
Iterating global reduction 4 with 65 rules applied. Total rules applied 3050 place count 825 transition count 800
Performed 42 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 42 Pre rules applied. Total rules applied 3050 place count 825 transition count 758
Deduced a syphon composed of 42 places in 1 ms
Reduce places removed 42 places and 0 transitions.
Iterating global reduction 4 with 84 rules applied. Total rules applied 3134 place count 783 transition count 758
Applied a total of 3134 rules in 124 ms. Remains 783 /2781 variables (removed 1998) and now considering 758/2355 (removed 1597) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 124 ms. Remains : 783/2781 places, 758/2355 transitions.
[2023-03-10 11:36:19] [INFO ] Flatten gal took : 17 ms
[2023-03-10 11:36:19] [INFO ] Flatten gal took : 18 ms
[2023-03-10 11:36:19] [INFO ] Input system was already deterministic with 758 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2781/2781 places, 2355/2355 transitions.
Discarding 378 places :
Implicit places reduction removed 378 places
Iterating post reduction 0 with 378 rules applied. Total rules applied 378 place count 2403 transition count 2355
Discarding 108 places :
Symmetric choice reduction at 1 with 108 rule applications. Total rules 486 place count 2295 transition count 2227
Iterating global reduction 1 with 108 rules applied. Total rules applied 594 place count 2295 transition count 2227
Discarding 63 places :
Symmetric choice reduction at 1 with 63 rule applications. Total rules 657 place count 2232 transition count 2164
Iterating global reduction 1 with 63 rules applied. Total rules applied 720 place count 2232 transition count 2164
Discarding 23 places :
Symmetric choice reduction at 1 with 23 rule applications. Total rules 743 place count 2209 transition count 2101
Iterating global reduction 1 with 23 rules applied. Total rules applied 766 place count 2209 transition count 2101
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 808 place count 2167 transition count 2059
Iterating global reduction 1 with 42 rules applied. Total rules applied 850 place count 2167 transition count 2059
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 892 place count 2125 transition count 2017
Iterating global reduction 1 with 42 rules applied. Total rules applied 934 place count 2125 transition count 2017
Applied a total of 934 rules in 729 ms. Remains 2125 /2781 variables (removed 656) and now considering 2017/2355 (removed 338) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 729 ms. Remains : 2125/2781 places, 2017/2355 transitions.
[2023-03-10 11:36:20] [INFO ] Flatten gal took : 43 ms
[2023-03-10 11:36:20] [INFO ] Flatten gal took : 38 ms
[2023-03-10 11:36:20] [INFO ] Input system was already deterministic with 2017 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2781/2781 places, 2355/2355 transitions.
Discarding 399 places :
Implicit places reduction removed 399 places
Iterating post reduction 0 with 399 rules applied. Total rules applied 399 place count 2382 transition count 2355
Discarding 149 places :
Symmetric choice reduction at 1 with 149 rule applications. Total rules 548 place count 2233 transition count 2186
Iterating global reduction 1 with 149 rules applied. Total rules applied 697 place count 2233 transition count 2186
Discarding 104 places :
Symmetric choice reduction at 1 with 104 rule applications. Total rules 801 place count 2129 transition count 2082
Iterating global reduction 1 with 104 rules applied. Total rules applied 905 place count 2129 transition count 2082
Discarding 23 places :
Symmetric choice reduction at 1 with 23 rule applications. Total rules 928 place count 2106 transition count 2019
Iterating global reduction 1 with 23 rules applied. Total rules applied 951 place count 2106 transition count 2019
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 993 place count 2064 transition count 1977
Iterating global reduction 1 with 42 rules applied. Total rules applied 1035 place count 2064 transition count 1977
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1077 place count 2022 transition count 1935
Iterating global reduction 1 with 42 rules applied. Total rules applied 1119 place count 2022 transition count 1935
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1161 place count 1980 transition count 1893
Iterating global reduction 1 with 42 rules applied. Total rules applied 1203 place count 1980 transition count 1893
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1245 place count 1938 transition count 1851
Iterating global reduction 1 with 42 rules applied. Total rules applied 1287 place count 1938 transition count 1851
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1329 place count 1896 transition count 1809
Iterating global reduction 1 with 42 rules applied. Total rules applied 1371 place count 1896 transition count 1809
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1413 place count 1854 transition count 1767
Iterating global reduction 1 with 42 rules applied. Total rules applied 1455 place count 1854 transition count 1767
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1497 place count 1812 transition count 1725
Iterating global reduction 1 with 42 rules applied. Total rules applied 1539 place count 1812 transition count 1725
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1581 place count 1770 transition count 1683
Iterating global reduction 1 with 42 rules applied. Total rules applied 1623 place count 1770 transition count 1683
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1665 place count 1728 transition count 1641
Iterating global reduction 1 with 42 rules applied. Total rules applied 1707 place count 1728 transition count 1641
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1749 place count 1686 transition count 1599
Iterating global reduction 1 with 42 rules applied. Total rules applied 1791 place count 1686 transition count 1599
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1833 place count 1644 transition count 1557
Iterating global reduction 1 with 42 rules applied. Total rules applied 1875 place count 1644 transition count 1557
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1917 place count 1602 transition count 1515
Iterating global reduction 1 with 42 rules applied. Total rules applied 1959 place count 1602 transition count 1515
Applied a total of 1959 rules in 1156 ms. Remains 1602 /2781 variables (removed 1179) and now considering 1515/2355 (removed 840) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1157 ms. Remains : 1602/2781 places, 1515/2355 transitions.
[2023-03-10 11:36:21] [INFO ] Flatten gal took : 30 ms
[2023-03-10 11:36:21] [INFO ] Flatten gal took : 37 ms
[2023-03-10 11:36:21] [INFO ] Input system was already deterministic with 1515 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2781/2781 places, 2355/2355 transitions.
Graph (complete) has 3759 edges and 2781 vertex of which 2378 are kept as prefixes of interest. Removing 403 places using SCC suffix rule.3 ms
Discarding 403 places :
Also discarding 360 output transitions
Drop transitions removed 360 transitions
Reduce places removed 21 places and 21 transitions.
Discarding 231 places :
Implicit places reduction removed 231 places
Drop transitions removed 588 transitions
Trivial Post-agglo rules discarded 588 transitions
Performed 588 trivial Post agglomeration. Transition count delta: 588
Iterating post reduction 0 with 819 rules applied. Total rules applied 820 place count 2126 transition count 1386
Reduce places removed 588 places and 0 transitions.
Performed 126 Post agglomeration using F-continuation condition.Transition count delta: 126
Iterating post reduction 1 with 714 rules applied. Total rules applied 1534 place count 1538 transition count 1260
Reduce places removed 126 places and 0 transitions.
Iterating post reduction 2 with 126 rules applied. Total rules applied 1660 place count 1412 transition count 1260
Performed 357 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 357 Pre rules applied. Total rules applied 1660 place count 1412 transition count 903
Deduced a syphon composed of 357 places in 0 ms
Ensure Unique test removed 105 places
Reduce places removed 462 places and 0 transitions.
Iterating global reduction 3 with 819 rules applied. Total rules applied 2479 place count 950 transition count 903
Drop transitions removed 42 transitions
Trivial Post-agglo rules discarded 42 transitions
Performed 42 trivial Post agglomeration. Transition count delta: 42
Iterating post reduction 3 with 42 rules applied. Total rules applied 2521 place count 950 transition count 861
Reduce places removed 42 places and 0 transitions.
Iterating post reduction 4 with 42 rules applied. Total rules applied 2563 place count 908 transition count 861
Performed 21 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 21 Pre rules applied. Total rules applied 2563 place count 908 transition count 840
Deduced a syphon composed of 21 places in 0 ms
Reduce places removed 21 places and 0 transitions.
Iterating global reduction 5 with 42 rules applied. Total rules applied 2605 place count 887 transition count 840
Discarding 66 places :
Symmetric choice reduction at 5 with 66 rule applications. Total rules 2671 place count 821 transition count 714
Iterating global reduction 5 with 66 rules applied. Total rules applied 2737 place count 821 transition count 714
Ensure Unique test removed 21 transitions
Reduce isomorphic transitions removed 21 transitions.
Discarding 21 places :
Implicit places reduction removed 21 places
Drop transitions removed 42 transitions
Trivial Post-agglo rules discarded 42 transitions
Performed 42 trivial Post agglomeration. Transition count delta: 42
Iterating post reduction 5 with 84 rules applied. Total rules applied 2821 place count 800 transition count 651
Reduce places removed 42 places and 0 transitions.
Iterating post reduction 6 with 42 rules applied. Total rules applied 2863 place count 758 transition count 651
Performed 42 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 7 with 42 Pre rules applied. Total rules applied 2863 place count 758 transition count 609
Deduced a syphon composed of 42 places in 0 ms
Reduce places removed 42 places and 0 transitions.
Iterating global reduction 7 with 84 rules applied. Total rules applied 2947 place count 716 transition count 609
Applied a total of 2947 rules in 119 ms. Remains 716 /2781 variables (removed 2065) and now considering 609/2355 (removed 1746) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 120 ms. Remains : 716/2781 places, 609/2355 transitions.
[2023-03-10 11:36:21] [INFO ] Flatten gal took : 13 ms
[2023-03-10 11:36:21] [INFO ] Flatten gal took : 14 ms
[2023-03-10 11:36:21] [INFO ] Input system was already deterministic with 609 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2781/2781 places, 2355/2355 transitions.
Discarding 336 places :
Implicit places reduction removed 336 places
Iterating post reduction 0 with 336 rules applied. Total rules applied 336 place count 2445 transition count 2355
Discarding 87 places :
Symmetric choice reduction at 1 with 87 rule applications. Total rules 423 place count 2358 transition count 2248
Iterating global reduction 1 with 87 rules applied. Total rules applied 510 place count 2358 transition count 2248
Applied a total of 510 rules in 188 ms. Remains 2358 /2781 variables (removed 423) and now considering 2248/2355 (removed 107) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 188 ms. Remains : 2358/2781 places, 2248/2355 transitions.
[2023-03-10 11:36:22] [INFO ] Flatten gal took : 41 ms
[2023-03-10 11:36:22] [INFO ] Flatten gal took : 40 ms
[2023-03-10 11:36:22] [INFO ] Input system was already deterministic with 2248 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2781/2781 places, 2355/2355 transitions.
Discarding 399 places :
Implicit places reduction removed 399 places
Iterating post reduction 0 with 399 rules applied. Total rules applied 399 place count 2382 transition count 2355
Discarding 107 places :
Symmetric choice reduction at 1 with 107 rule applications. Total rules 506 place count 2275 transition count 2228
Iterating global reduction 1 with 107 rules applied. Total rules applied 613 place count 2275 transition count 2228
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 675 place count 2213 transition count 2166
Iterating global reduction 1 with 62 rules applied. Total rules applied 737 place count 2213 transition count 2166
Discarding 41 places :
Symmetric choice reduction at 1 with 41 rule applications. Total rules 778 place count 2172 transition count 2105
Iterating global reduction 1 with 41 rules applied. Total rules applied 819 place count 2172 transition count 2105
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 839 place count 2152 transition count 2085
Iterating global reduction 1 with 20 rules applied. Total rules applied 859 place count 2152 transition count 2085
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 879 place count 2132 transition count 2065
Iterating global reduction 1 with 20 rules applied. Total rules applied 899 place count 2132 transition count 2065
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 919 place count 2112 transition count 2045
Iterating global reduction 1 with 20 rules applied. Total rules applied 939 place count 2112 transition count 2045
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 959 place count 2092 transition count 2025
Iterating global reduction 1 with 20 rules applied. Total rules applied 979 place count 2092 transition count 2025
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 999 place count 2072 transition count 2005
Iterating global reduction 1 with 20 rules applied. Total rules applied 1019 place count 2072 transition count 2005
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 1039 place count 2052 transition count 1985
Iterating global reduction 1 with 20 rules applied. Total rules applied 1059 place count 2052 transition count 1985
Applied a total of 1059 rules in 763 ms. Remains 2052 /2781 variables (removed 729) and now considering 1985/2355 (removed 370) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 763 ms. Remains : 2052/2781 places, 1985/2355 transitions.
[2023-03-10 11:36:22] [INFO ] Flatten gal took : 34 ms
[2023-03-10 11:36:22] [INFO ] Flatten gal took : 35 ms
[2023-03-10 11:36:23] [INFO ] Input system was already deterministic with 1985 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2781/2781 places, 2355/2355 transitions.
Discarding 399 places :
Implicit places reduction removed 399 places
Iterating post reduction 0 with 399 rules applied. Total rules applied 399 place count 2382 transition count 2355
Discarding 149 places :
Symmetric choice reduction at 1 with 149 rule applications. Total rules 548 place count 2233 transition count 2186
Iterating global reduction 1 with 149 rules applied. Total rules applied 697 place count 2233 transition count 2186
Discarding 104 places :
Symmetric choice reduction at 1 with 104 rule applications. Total rules 801 place count 2129 transition count 2082
Iterating global reduction 1 with 104 rules applied. Total rules applied 905 place count 2129 transition count 2082
Discarding 43 places :
Symmetric choice reduction at 1 with 43 rule applications. Total rules 948 place count 2086 transition count 1979
Iterating global reduction 1 with 43 rules applied. Total rules applied 991 place count 2086 transition count 1979
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1053 place count 2024 transition count 1917
Iterating global reduction 1 with 62 rules applied. Total rules applied 1115 place count 2024 transition count 1917
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1177 place count 1962 transition count 1855
Iterating global reduction 1 with 62 rules applied. Total rules applied 1239 place count 1962 transition count 1855
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1301 place count 1900 transition count 1793
Iterating global reduction 1 with 62 rules applied. Total rules applied 1363 place count 1900 transition count 1793
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1425 place count 1838 transition count 1731
Iterating global reduction 1 with 62 rules applied. Total rules applied 1487 place count 1838 transition count 1731
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1549 place count 1776 transition count 1669
Iterating global reduction 1 with 62 rules applied. Total rules applied 1611 place count 1776 transition count 1669
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1673 place count 1714 transition count 1607
Iterating global reduction 1 with 62 rules applied. Total rules applied 1735 place count 1714 transition count 1607
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1777 place count 1672 transition count 1565
Iterating global reduction 1 with 42 rules applied. Total rules applied 1819 place count 1672 transition count 1565
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1861 place count 1630 transition count 1523
Iterating global reduction 1 with 42 rules applied. Total rules applied 1903 place count 1630 transition count 1523
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1945 place count 1588 transition count 1481
Iterating global reduction 1 with 42 rules applied. Total rules applied 1987 place count 1588 transition count 1481
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 2029 place count 1546 transition count 1439
Iterating global reduction 1 with 42 rules applied. Total rules applied 2071 place count 1546 transition count 1439
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 2113 place count 1504 transition count 1397
Iterating global reduction 1 with 42 rules applied. Total rules applied 2155 place count 1504 transition count 1397
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 2197 place count 1462 transition count 1355
Iterating global reduction 1 with 42 rules applied. Total rules applied 2239 place count 1462 transition count 1355
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 2281 place count 1420 transition count 1313
Iterating global reduction 1 with 42 rules applied. Total rules applied 2323 place count 1420 transition count 1313
Ensure Unique test removed 42 transitions
Reduce isomorphic transitions removed 42 transitions.
Discarding 21 places :
Implicit places reduction removed 21 places
Iterating post reduction 1 with 63 rules applied. Total rules applied 2386 place count 1399 transition count 1271
Applied a total of 2386 rules in 1153 ms. Remains 1399 /2781 variables (removed 1382) and now considering 1271/2355 (removed 1084) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1154 ms. Remains : 1399/2781 places, 1271/2355 transitions.
[2023-03-10 11:36:24] [INFO ] Flatten gal took : 22 ms
[2023-03-10 11:36:24] [INFO ] Flatten gal took : 23 ms
[2023-03-10 11:36:24] [INFO ] Input system was already deterministic with 1271 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2781/2781 places, 2355/2355 transitions.
Discarding 294 places :
Implicit places reduction removed 294 places
Iterating post reduction 0 with 294 rules applied. Total rules applied 294 place count 2487 transition count 2355
Discarding 105 places :
Symmetric choice reduction at 1 with 105 rule applications. Total rules 399 place count 2382 transition count 2230
Iterating global reduction 1 with 105 rules applied. Total rules applied 504 place count 2382 transition count 2230
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 566 place count 2320 transition count 2168
Iterating global reduction 1 with 62 rules applied. Total rules applied 628 place count 2320 transition count 2168
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 648 place count 2300 transition count 2128
Iterating global reduction 1 with 20 rules applied. Total rules applied 668 place count 2300 transition count 2128
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 688 place count 2280 transition count 2108
Iterating global reduction 1 with 20 rules applied. Total rules applied 708 place count 2280 transition count 2108
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 728 place count 2260 transition count 2088
Iterating global reduction 1 with 20 rules applied. Total rules applied 748 place count 2260 transition count 2088
Applied a total of 748 rules in 444 ms. Remains 2260 /2781 variables (removed 521) and now considering 2088/2355 (removed 267) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 446 ms. Remains : 2260/2781 places, 2088/2355 transitions.
[2023-03-10 11:36:24] [INFO ] Flatten gal took : 37 ms
[2023-03-10 11:36:24] [INFO ] Flatten gal took : 40 ms
[2023-03-10 11:36:24] [INFO ] Input system was already deterministic with 2088 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2781/2781 places, 2355/2355 transitions.
Discarding 189 places :
Implicit places reduction removed 189 places
Iterating post reduction 0 with 189 rules applied. Total rules applied 189 place count 2592 transition count 2355
Discarding 65 places :
Symmetric choice reduction at 1 with 65 rule applications. Total rules 254 place count 2527 transition count 2270
Iterating global reduction 1 with 65 rules applied. Total rules applied 319 place count 2527 transition count 2270
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 381 place count 2465 transition count 2208
Iterating global reduction 1 with 62 rules applied. Total rules applied 443 place count 2465 transition count 2208
Discarding 41 places :
Symmetric choice reduction at 1 with 41 rule applications. Total rules 484 place count 2424 transition count 2147
Iterating global reduction 1 with 41 rules applied. Total rules applied 525 place count 2424 transition count 2147
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 545 place count 2404 transition count 2127
Iterating global reduction 1 with 20 rules applied. Total rules applied 565 place count 2404 transition count 2127
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 585 place count 2384 transition count 2107
Iterating global reduction 1 with 20 rules applied. Total rules applied 605 place count 2384 transition count 2107
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 625 place count 2364 transition count 2087
Iterating global reduction 1 with 20 rules applied. Total rules applied 645 place count 2364 transition count 2087
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 665 place count 2344 transition count 2067
Iterating global reduction 1 with 20 rules applied. Total rules applied 685 place count 2344 transition count 2067
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 705 place count 2324 transition count 2047
Iterating global reduction 1 with 20 rules applied. Total rules applied 725 place count 2324 transition count 2047
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 745 place count 2304 transition count 2027
Iterating global reduction 1 with 20 rules applied. Total rules applied 765 place count 2304 transition count 2027
Applied a total of 765 rules in 670 ms. Remains 2304 /2781 variables (removed 477) and now considering 2027/2355 (removed 328) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 671 ms. Remains : 2304/2781 places, 2027/2355 transitions.
[2023-03-10 11:36:25] [INFO ] Flatten gal took : 38 ms
[2023-03-10 11:36:25] [INFO ] Flatten gal took : 41 ms
[2023-03-10 11:36:25] [INFO ] Input system was already deterministic with 2027 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2781/2781 places, 2355/2355 transitions.
Discarding 378 places :
Implicit places reduction removed 378 places
Iterating post reduction 0 with 378 rules applied. Total rules applied 378 place count 2403 transition count 2355
Discarding 149 places :
Symmetric choice reduction at 1 with 149 rule applications. Total rules 527 place count 2254 transition count 2186
Iterating global reduction 1 with 149 rules applied. Total rules applied 676 place count 2254 transition count 2186
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 738 place count 2192 transition count 2124
Iterating global reduction 1 with 62 rules applied. Total rules applied 800 place count 2192 transition count 2124
Discarding 41 places :
Symmetric choice reduction at 1 with 41 rule applications. Total rules 841 place count 2151 transition count 2063
Iterating global reduction 1 with 41 rules applied. Total rules applied 882 place count 2151 transition count 2063
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 902 place count 2131 transition count 2043
Iterating global reduction 1 with 20 rules applied. Total rules applied 922 place count 2131 transition count 2043
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 942 place count 2111 transition count 2023
Iterating global reduction 1 with 20 rules applied. Total rules applied 962 place count 2111 transition count 2023
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 982 place count 2091 transition count 2003
Iterating global reduction 1 with 20 rules applied. Total rules applied 1002 place count 2091 transition count 2003
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 1022 place count 2071 transition count 1983
Iterating global reduction 1 with 20 rules applied. Total rules applied 1042 place count 2071 transition count 1983
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 1062 place count 2051 transition count 1963
Iterating global reduction 1 with 20 rules applied. Total rules applied 1082 place count 2051 transition count 1963
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 1102 place count 2031 transition count 1943
Iterating global reduction 1 with 20 rules applied. Total rules applied 1122 place count 2031 transition count 1943
Applied a total of 1122 rules in 798 ms. Remains 2031 /2781 variables (removed 750) and now considering 1943/2355 (removed 412) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 799 ms. Remains : 2031/2781 places, 1943/2355 transitions.
[2023-03-10 11:36:26] [INFO ] Flatten gal took : 32 ms
[2023-03-10 11:36:26] [INFO ] Flatten gal took : 34 ms
[2023-03-10 11:36:26] [INFO ] Input system was already deterministic with 1943 transitions.
[2023-03-10 11:36:26] [INFO ] Flatten gal took : 62 ms
[2023-03-10 11:36:27] [INFO ] Flatten gal took : 64 ms
[2023-03-10 11:36:27] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 19 ms.
[2023-03-10 11:36:27] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 2781 places, 2355 transitions and 6156 arcs took 10 ms.
Total runtime 25731 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT FamilyReunion-COL-L00020M0002C001P001G001
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678449033626

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
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lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 46 (type EXCL) for 21 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09
lola: time limit : 246 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 44 (type FNDP) for 21 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 45 (type EQUN) for 21 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 48 (type SRCH) for 21 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 48 (type SRCH) for FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 44 (type FNDP) for FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09
lola: result : true
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 45 (type EQUN) for FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
sara: try reading problem file /home/mcc/execution/374/CTLFireability-45.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 45 (type EQUN) for FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09
lola: result : true
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46 EG EXCL 3/265 2/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09 126746 m, 25349 m/sec, 873948 t fired, .

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46 EG EXCL 8/265 4/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09 294194 m, 33489 m/sec, 2190020 t fired, .

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46 EG EXCL 13/265 6/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09 455504 m, 32262 m/sec, 3512895 t fired, .

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46 EG EXCL 18/265 8/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09 612685 m, 31436 m/sec, 4834527 t fired, .

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46 EG EXCL 23/265 10/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09 773969 m, 32256 m/sec, 6154701 t fired, .

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46 EG EXCL 28/265 11/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09 923908 m, 29987 m/sec, 7480863 t fired, .

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46 EG EXCL 33/265 13/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09 1077516 m, 30721 m/sec, 8801064 t fired, .

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46 EG EXCL 38/265 15/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09 1225247 m, 29546 m/sec, 10124696 t fired, .

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46 EG EXCL 43/265 16/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09 1366800 m, 28310 m/sec, 11454454 t fired, .

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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: DISJ 0 0 0 0 7 0 1 1
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 55/710 31/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-01 1968203 m, 34715 m/sec, 4265247 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: CTL false CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: CTL true CTL model checker

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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: DISJ 0 0 0 0 7 0 1 1
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

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lola: result : false
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: CTL false CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: CTL false CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: CTL true CTL model checker

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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: DISJ 0 0 0 0 7 0 1 1
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/1390 8/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 705371 m, 141074 m/sec, 774880 t fired, .

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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: CTL false CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: CTL true CTL model checker

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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: DISJ 0 0 0 0 7 0 1 1
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/1390 15/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 1407301 m, 140386 m/sec, 1549156 t fired, .

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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: CTL false CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: CTL true CTL model checker

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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: DISJ 0 0 0 0 7 0 1 1
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

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1 CTL EXCL 15/1390 22/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 2108804 m, 140300 m/sec, 2325715 t fired, .

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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: DISJ 0 0 0 0 7 0 1 1
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/1390 29/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 2813074 m, 140854 m/sec, 3105579 t fired, .

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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: CTL false CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: CTL true CTL model checker

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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: DISJ 0 0 0 0 7 0 1 1
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

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lola: result : false
lola: markings : 55
lola: fired transitions : 113
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lola: memory pages used : 1
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00: CTL unknown AGGR
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-01: CTL unknown AGGR
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-02: CTL false CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: CTL unknown AGGR
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: CTL unknown AGGR
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: CTL false CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: CTL false CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: DISJ unknown DISJ
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-11: CTL unknown AGGR
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: CTL unknown AGGR
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: CTL unknown AGGR
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L00020M0002C001P001G001"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is FamilyReunion-COL-L00020M0002C001P001G001, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r167-tall-167838852900306"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L00020M0002C001P001G001.tgz
mv FamilyReunion-COL-L00020M0002C001P001G001 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;