fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r167-tall-167838852900305
Last Updated
May 14, 2023

About the Execution of LoLa+red for FamilyReunion-COL-L00020M0002C001P001G001

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1111.911 3600000.00 343206.00 11112.80 ?FTTTTF?FFTTTF?F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r167-tall-167838852900305.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..........................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is FamilyReunion-COL-L00020M0002C001P001G001, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838852900305
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 560K
-rw-r--r-- 1 mcc users 7.4K Feb 26 11:40 CTLCardinality.txt
-rw-r--r-- 1 mcc users 78K Feb 26 11:40 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.5K Feb 26 11:36 CTLFireability.txt
-rw-r--r-- 1 mcc users 55K Feb 26 11:36 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:05 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:05 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K Feb 25 16:05 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:05 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.9K Feb 26 11:48 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 90K Feb 26 11:48 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 11:45 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 65K Feb 26 11:45 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 16:05 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:05 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 24 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 135K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-01
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-03
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-05
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-08
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-09
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-10
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-11
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-13
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678448102917

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FamilyReunion-COL-L00020M0002C001P001G001
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 11:35:04] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-10 11:35:04] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 11:35:04] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-10 11:35:04] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-10 11:35:05] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 737 ms
[2023-03-10 11:35:05] [INFO ] Detected 5 constant HL places corresponding to 11 PT places.
[2023-03-10 11:35:05] [INFO ] Imported 104 HL places and 66 HL transitions for a total of 3292 PT places and 2774.0 transition bindings in 24 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 21 ms.
[2023-03-10 11:35:05] [INFO ] Built PT skeleton of HLPN with 104 places and 66 transitions 198 arcs in 4 ms.
[2023-03-10 11:35:05] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Computed a total of 104 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 104 transition count 66
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 2 formulas.
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Remains 15 properties that can be checked using skeleton over-approximation.
Reduce places removed 5 places and 0 transitions.
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 99 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 99 transition count 66
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Incomplete random walk after 10018 steps, including 7 resets, run finished after 116 ms. (steps per millisecond=86 ) properties (out of 69) seen :21
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=142 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 48) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 48) seen :0
Running SMT prover for 48 properties.
// Phase 1: matrix 66 rows 99 cols
[2023-03-10 11:35:05] [INFO ] Computed 33 place invariants in 9 ms
[2023-03-10 11:35:06] [INFO ] [Real]Absence check using 4 positive place invariants in 2 ms returned sat
[2023-03-10 11:35:06] [INFO ] [Real]Absence check using 4 positive and 29 generalized place invariants in 6 ms returned sat
[2023-03-10 11:35:06] [INFO ] After 303ms SMT Verify possible using all constraints in real domain returned unsat :8 sat :0 real:40
[2023-03-10 11:35:06] [INFO ] [Nat]Absence check using 4 positive place invariants in 2 ms returned sat
[2023-03-10 11:35:06] [INFO ] [Nat]Absence check using 4 positive and 29 generalized place invariants in 17 ms returned sat
[2023-03-10 11:35:06] [INFO ] After 163ms SMT Verify possible using all constraints in natural domain returned unsat :48 sat :0
Fused 48 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 48 atomic propositions for a total of 13 simplifications.
[2023-03-10 11:35:06] [INFO ] Initial state reduction rules for CTL removed 4 formulas.
[2023-03-10 11:35:06] [INFO ] Flatten gal took : 38 ms
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 11:35:06] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 11:35:06] [INFO ] Flatten gal took : 10 ms
Transition Gate2ANDJoin forces synchronizations/join behavior on parameter l of sort LegalResident
Transition ReceiveLangChoice forces synchronizations/join behavior on parameter m of sort MICSystem
Symmetric sort wr.t. initial and guards and successors and join/free detected :Response
Symmetric sort wr.t. initial detected :Response
Transition SendClearanceToRel : guard parameter $r(Response:2) in guard (EQ $r 0)introduces in Response(2) partition with 2 elements
Symmetric sort wr.t. initial and guards and successors and join/free detected :CINFORMI
Symmetric sort wr.t. initial detected :CINFORMI
Symmetric sort wr.t. initial and guards detected :CINFORMI
Applying symmetric unfolding of full symmetric sort :CINFORMI domain size was 2
Symmetric sort wr.t. initial and guards and successors and join/free detected :GovernmentCommission
Symmetric sort wr.t. initial detected :GovernmentCommission
Symmetric sort wr.t. initial and guards detected :GovernmentCommission
Applying symmetric unfolding of full symmetric sort :GovernmentCommission domain size was 2
Transition Gate1ANDJoin forces synchronizations/join behavior on parameter p of sort PublicAdminOffice
[2023-03-10 11:35:06] [INFO ] Unfolded HLPN to a Petri net with 3095 places and 2438 transitions 6997 arcs in 38 ms.
[2023-03-10 11:35:06] [INFO ] Unfolded 8 HLPN properties in 1 ms.
Deduced a syphon composed of 21 places in 17 ms
Reduce places removed 30 places and 0 transitions.
Support contains 1310 out of 3065 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 3065/3065 places, 2438/2438 transitions.
Reduce places removed 68 places and 0 transitions.
Discarding 294 places :
Implicit places reduction removed 294 places
Iterating post reduction 0 with 362 rules applied. Total rules applied 362 place count 2703 transition count 2438
Discarding 104 places :
Symmetric choice reduction at 1 with 104 rule applications. Total rules 466 place count 2599 transition count 2334
Iterating global reduction 1 with 104 rules applied. Total rules applied 570 place count 2599 transition count 2334
Applied a total of 570 rules in 252 ms. Remains 2599 /3065 variables (removed 466) and now considering 2334/2438 (removed 104) transitions.
// Phase 1: matrix 2334 rows 2599 cols
[2023-03-10 11:35:06] [INFO ] Computed 408 place invariants in 94 ms
[2023-03-10 11:35:07] [INFO ] Implicit Places using invariants in 981 ms returned [252, 253, 254, 255, 256, 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 270, 271, 272, 483, 1368, 1453, 1454, 1455, 1456, 1457, 1458, 1459, 1460, 1461, 1462, 1463, 1464, 1465, 1466, 1467, 1468, 1469, 1470, 1471, 1472, 1473, 1773, 1774, 1775, 1776, 1777, 1778, 1779, 1780, 1781, 1782, 1783, 1784, 1785, 1786, 1787, 1788, 1789, 1790, 1791, 1792, 1793, 1963, 1964, 1965, 1966, 1967, 1968, 1969, 1970, 1971, 1972, 1973, 1974, 1975, 1976, 1977, 1978, 1979, 1980, 1981, 1982, 1983, 2366, 2367, 2368, 2369, 2370, 2371, 2372, 2373, 2374, 2375, 2376, 2377, 2378, 2379, 2380, 2381, 2382, 2383, 2384, 2385, 2386]
Discarding 107 places :
Implicit Place search using SMT only with invariants took 989 ms to find 107 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 2492/3065 places, 2334/2438 transitions.
Applied a total of 0 rules in 38 ms. Remains 2492 /2492 variables (removed 0) and now considering 2334/2334 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 1281 ms. Remains : 2492/3065 places, 2334/2438 transitions.
Support contains 1310 out of 2492 places after structural reductions.
[2023-03-10 11:35:07] [INFO ] Flatten gal took : 142 ms
[2023-03-10 11:35:08] [INFO ] Flatten gal took : 94 ms
[2023-03-10 11:35:08] [INFO ] Input system was already deterministic with 2334 transitions.
Incomplete random walk after 10000 steps, including 8 resets, run finished after 481 ms. (steps per millisecond=20 ) properties (out of 40) seen :10
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 30) seen :0
Running SMT prover for 30 properties.
// Phase 1: matrix 2334 rows 2492 cols
[2023-03-10 11:35:08] [INFO ] Computed 301 place invariants in 41 ms
[2023-03-10 11:35:10] [INFO ] [Real]Absence check using 4 positive place invariants in 24 ms returned sat
[2023-03-10 11:35:10] [INFO ] [Real]Absence check using 4 positive and 297 generalized place invariants in 90 ms returned sat
[2023-03-10 11:35:10] [INFO ] After 1590ms SMT Verify possible using all constraints in real domain returned unsat :7 sat :0 real:23
[2023-03-10 11:35:11] [INFO ] [Nat]Absence check using 4 positive place invariants in 30 ms returned sat
[2023-03-10 11:35:11] [INFO ] [Nat]Absence check using 4 positive and 297 generalized place invariants in 65 ms returned sat
[2023-03-10 11:35:14] [INFO ] After 2625ms SMT Verify possible using state equation in natural domain returned unsat :26 sat :4
[2023-03-10 11:35:15] [INFO ] After 3540ms SMT Verify possible using trap constraints in natural domain returned unsat :26 sat :4
Attempting to minimize the solution found.
Minimization took 579 ms.
[2023-03-10 11:35:16] [INFO ] After 5478ms SMT Verify possible using all constraints in natural domain returned unsat :26 sat :4
Fused 30 Parikh solutions to 4 different solutions.
Finished Parikh walk after 797 steps, including 0 resets, run visited all 1 properties in 6 ms. (steps per millisecond=132 )
Parikh walk visited 4 properties in 86 ms.
Successfully simplified 26 atomic propositions for a total of 8 simplifications.
[2023-03-10 11:35:16] [INFO ] Flatten gal took : 71 ms
[2023-03-10 11:35:16] [INFO ] Flatten gal took : 67 ms
[2023-03-10 11:35:16] [INFO ] Input system was already deterministic with 2334 transitions.
Support contains 484 out of 2492 places (down from 506) after GAL structural reductions.
Computed a total of 2492 stabilizing places and 2334 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 2492 transition count 2334
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 2 formulas.
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 2492/2492 places, 2334/2334 transitions.
Reduce places removed 5 places and 0 transitions.
Discarding 168 places :
Implicit places reduction removed 168 places
Iterating post reduction 0 with 173 rules applied. Total rules applied 173 place count 2319 transition count 2334
Discarding 86 places :
Symmetric choice reduction at 1 with 86 rule applications. Total rules 259 place count 2233 transition count 2228
Iterating global reduction 1 with 86 rules applied. Total rules applied 345 place count 2233 transition count 2228
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 407 place count 2171 transition count 2166
Iterating global reduction 1 with 62 rules applied. Total rules applied 469 place count 2171 transition count 2166
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 489 place count 2151 transition count 2126
Iterating global reduction 1 with 20 rules applied. Total rules applied 509 place count 2151 transition count 2126
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 529 place count 2131 transition count 2106
Iterating global reduction 1 with 20 rules applied. Total rules applied 549 place count 2131 transition count 2106
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 569 place count 2111 transition count 2086
Iterating global reduction 1 with 20 rules applied. Total rules applied 589 place count 2111 transition count 2086
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 609 place count 2091 transition count 2066
Iterating global reduction 1 with 20 rules applied. Total rules applied 629 place count 2091 transition count 2066
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 649 place count 2071 transition count 2046
Iterating global reduction 1 with 20 rules applied. Total rules applied 669 place count 2071 transition count 2046
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 689 place count 2051 transition count 2026
Iterating global reduction 1 with 20 rules applied. Total rules applied 709 place count 2051 transition count 2026
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 729 place count 2031 transition count 2006
Iterating global reduction 1 with 20 rules applied. Total rules applied 749 place count 2031 transition count 2006
Applied a total of 749 rules in 1683 ms. Remains 2031 /2492 variables (removed 461) and now considering 2006/2334 (removed 328) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1684 ms. Remains : 2031/2492 places, 2006/2334 transitions.
[2023-03-10 11:35:18] [INFO ] Flatten gal took : 44 ms
[2023-03-10 11:35:18] [INFO ] Flatten gal took : 44 ms
[2023-03-10 11:35:18] [INFO ] Input system was already deterministic with 2006 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2492/2492 places, 2334/2334 transitions.
Reduce places removed 5 places and 0 transitions.
Discarding 168 places :
Implicit places reduction removed 168 places
Iterating post reduction 0 with 173 rules applied. Total rules applied 173 place count 2319 transition count 2334
Discarding 128 places :
Symmetric choice reduction at 1 with 128 rule applications. Total rules 301 place count 2191 transition count 2186
Iterating global reduction 1 with 128 rules applied. Total rules applied 429 place count 2191 transition count 2186
Discarding 104 places :
Symmetric choice reduction at 1 with 104 rule applications. Total rules 533 place count 2087 transition count 2082
Iterating global reduction 1 with 104 rules applied. Total rules applied 637 place count 2087 transition count 2082
Discarding 43 places :
Symmetric choice reduction at 1 with 43 rule applications. Total rules 680 place count 2044 transition count 1979
Iterating global reduction 1 with 43 rules applied. Total rules applied 723 place count 2044 transition count 1979
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 785 place count 1982 transition count 1917
Iterating global reduction 1 with 62 rules applied. Total rules applied 847 place count 1982 transition count 1917
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 909 place count 1920 transition count 1855
Iterating global reduction 1 with 62 rules applied. Total rules applied 971 place count 1920 transition count 1855
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1033 place count 1858 transition count 1793
Iterating global reduction 1 with 62 rules applied. Total rules applied 1095 place count 1858 transition count 1793
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1157 place count 1796 transition count 1731
Iterating global reduction 1 with 62 rules applied. Total rules applied 1219 place count 1796 transition count 1731
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1281 place count 1734 transition count 1669
Iterating global reduction 1 with 62 rules applied. Total rules applied 1343 place count 1734 transition count 1669
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1405 place count 1672 transition count 1607
Iterating global reduction 1 with 62 rules applied. Total rules applied 1467 place count 1672 transition count 1607
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1509 place count 1630 transition count 1565
Iterating global reduction 1 with 42 rules applied. Total rules applied 1551 place count 1630 transition count 1565
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1593 place count 1588 transition count 1523
Iterating global reduction 1 with 42 rules applied. Total rules applied 1635 place count 1588 transition count 1523
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1677 place count 1546 transition count 1481
Iterating global reduction 1 with 42 rules applied. Total rules applied 1719 place count 1546 transition count 1481
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1761 place count 1504 transition count 1439
Iterating global reduction 1 with 42 rules applied. Total rules applied 1803 place count 1504 transition count 1439
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1845 place count 1462 transition count 1397
Iterating global reduction 1 with 42 rules applied. Total rules applied 1887 place count 1462 transition count 1397
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1929 place count 1420 transition count 1355
Iterating global reduction 1 with 42 rules applied. Total rules applied 1971 place count 1420 transition count 1355
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 2013 place count 1378 transition count 1313
Iterating global reduction 1 with 42 rules applied. Total rules applied 2055 place count 1378 transition count 1313
Ensure Unique test removed 42 transitions
Reduce isomorphic transitions removed 42 transitions.
Iterating post reduction 1 with 42 rules applied. Total rules applied 2097 place count 1378 transition count 1271
Applied a total of 2097 rules in 1574 ms. Remains 1378 /2492 variables (removed 1114) and now considering 1271/2334 (removed 1063) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1574 ms. Remains : 1378/2492 places, 1271/2334 transitions.
[2023-03-10 11:35:20] [INFO ] Flatten gal took : 26 ms
[2023-03-10 11:35:20] [INFO ] Flatten gal took : 27 ms
[2023-03-10 11:35:20] [INFO ] Input system was already deterministic with 1271 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2492/2492 places, 2334/2334 transitions.
Reduce places removed 5 places and 0 transitions.
Discarding 168 places :
Implicit places reduction removed 168 places
Iterating post reduction 0 with 173 rules applied. Total rules applied 173 place count 2319 transition count 2334
Discarding 128 places :
Symmetric choice reduction at 1 with 128 rule applications. Total rules 301 place count 2191 transition count 2186
Iterating global reduction 1 with 128 rules applied. Total rules applied 429 place count 2191 transition count 2186
Discarding 104 places :
Symmetric choice reduction at 1 with 104 rule applications. Total rules 533 place count 2087 transition count 2082
Iterating global reduction 1 with 104 rules applied. Total rules applied 637 place count 2087 transition count 2082
Discarding 43 places :
Symmetric choice reduction at 1 with 43 rule applications. Total rules 680 place count 2044 transition count 1979
Iterating global reduction 1 with 43 rules applied. Total rules applied 723 place count 2044 transition count 1979
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 785 place count 1982 transition count 1917
Iterating global reduction 1 with 62 rules applied. Total rules applied 847 place count 1982 transition count 1917
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 909 place count 1920 transition count 1855
Iterating global reduction 1 with 62 rules applied. Total rules applied 971 place count 1920 transition count 1855
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1033 place count 1858 transition count 1793
Iterating global reduction 1 with 62 rules applied. Total rules applied 1095 place count 1858 transition count 1793
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1157 place count 1796 transition count 1731
Iterating global reduction 1 with 62 rules applied. Total rules applied 1219 place count 1796 transition count 1731
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1281 place count 1734 transition count 1669
Iterating global reduction 1 with 62 rules applied. Total rules applied 1343 place count 1734 transition count 1669
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1405 place count 1672 transition count 1607
Iterating global reduction 1 with 62 rules applied. Total rules applied 1467 place count 1672 transition count 1607
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1509 place count 1630 transition count 1565
Iterating global reduction 1 with 42 rules applied. Total rules applied 1551 place count 1630 transition count 1565
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1593 place count 1588 transition count 1523
Iterating global reduction 1 with 42 rules applied. Total rules applied 1635 place count 1588 transition count 1523
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1677 place count 1546 transition count 1481
Iterating global reduction 1 with 42 rules applied. Total rules applied 1719 place count 1546 transition count 1481
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1761 place count 1504 transition count 1439
Iterating global reduction 1 with 42 rules applied. Total rules applied 1803 place count 1504 transition count 1439
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1845 place count 1462 transition count 1397
Iterating global reduction 1 with 42 rules applied. Total rules applied 1887 place count 1462 transition count 1397
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1929 place count 1420 transition count 1355
Iterating global reduction 1 with 42 rules applied. Total rules applied 1971 place count 1420 transition count 1355
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 2013 place count 1378 transition count 1313
Iterating global reduction 1 with 42 rules applied. Total rules applied 2055 place count 1378 transition count 1313
Ensure Unique test removed 42 transitions
Reduce isomorphic transitions removed 42 transitions.
Iterating post reduction 1 with 42 rules applied. Total rules applied 2097 place count 1378 transition count 1271
Applied a total of 2097 rules in 1612 ms. Remains 1378 /2492 variables (removed 1114) and now considering 1271/2334 (removed 1063) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1613 ms. Remains : 1378/2492 places, 1271/2334 transitions.
[2023-03-10 11:35:21] [INFO ] Flatten gal took : 27 ms
[2023-03-10 11:35:21] [INFO ] Flatten gal took : 28 ms
[2023-03-10 11:35:21] [INFO ] Input system was already deterministic with 1271 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2492/2492 places, 2334/2334 transitions.
Reduce places removed 5 places and 0 transitions.
Discarding 168 places :
Implicit places reduction removed 168 places
Iterating post reduction 0 with 173 rules applied. Total rules applied 173 place count 2319 transition count 2334
Discarding 128 places :
Symmetric choice reduction at 1 with 128 rule applications. Total rules 301 place count 2191 transition count 2186
Iterating global reduction 1 with 128 rules applied. Total rules applied 429 place count 2191 transition count 2186
Discarding 104 places :
Symmetric choice reduction at 1 with 104 rule applications. Total rules 533 place count 2087 transition count 2082
Iterating global reduction 1 with 104 rules applied. Total rules applied 637 place count 2087 transition count 2082
Discarding 43 places :
Symmetric choice reduction at 1 with 43 rule applications. Total rules 680 place count 2044 transition count 1979
Iterating global reduction 1 with 43 rules applied. Total rules applied 723 place count 2044 transition count 1979
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 785 place count 1982 transition count 1917
Iterating global reduction 1 with 62 rules applied. Total rules applied 847 place count 1982 transition count 1917
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 909 place count 1920 transition count 1855
Iterating global reduction 1 with 62 rules applied. Total rules applied 971 place count 1920 transition count 1855
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1033 place count 1858 transition count 1793
Iterating global reduction 1 with 62 rules applied. Total rules applied 1095 place count 1858 transition count 1793
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1157 place count 1796 transition count 1731
Iterating global reduction 1 with 62 rules applied. Total rules applied 1219 place count 1796 transition count 1731
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1281 place count 1734 transition count 1669
Iterating global reduction 1 with 62 rules applied. Total rules applied 1343 place count 1734 transition count 1669
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1405 place count 1672 transition count 1607
Iterating global reduction 1 with 62 rules applied. Total rules applied 1467 place count 1672 transition count 1607
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1509 place count 1630 transition count 1565
Iterating global reduction 1 with 42 rules applied. Total rules applied 1551 place count 1630 transition count 1565
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1593 place count 1588 transition count 1523
Iterating global reduction 1 with 42 rules applied. Total rules applied 1635 place count 1588 transition count 1523
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1677 place count 1546 transition count 1481
Iterating global reduction 1 with 42 rules applied. Total rules applied 1719 place count 1546 transition count 1481
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1761 place count 1504 transition count 1439
Iterating global reduction 1 with 42 rules applied. Total rules applied 1803 place count 1504 transition count 1439
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1845 place count 1462 transition count 1397
Iterating global reduction 1 with 42 rules applied. Total rules applied 1887 place count 1462 transition count 1397
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1929 place count 1420 transition count 1355
Iterating global reduction 1 with 42 rules applied. Total rules applied 1971 place count 1420 transition count 1355
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 2013 place count 1378 transition count 1313
Iterating global reduction 1 with 42 rules applied. Total rules applied 2055 place count 1378 transition count 1313
Ensure Unique test removed 42 transitions
Reduce isomorphic transitions removed 42 transitions.
Iterating post reduction 1 with 42 rules applied. Total rules applied 2097 place count 1378 transition count 1271
Applied a total of 2097 rules in 1599 ms. Remains 1378 /2492 variables (removed 1114) and now considering 1271/2334 (removed 1063) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1600 ms. Remains : 1378/2492 places, 1271/2334 transitions.
[2023-03-10 11:35:23] [INFO ] Flatten gal took : 40 ms
[2023-03-10 11:35:23] [INFO ] Flatten gal took : 43 ms
[2023-03-10 11:35:23] [INFO ] Input system was already deterministic with 1271 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2492/2492 places, 2334/2334 transitions.
Reduce places removed 5 places and 0 transitions.
Discarding 168 places :
Implicit places reduction removed 168 places
Iterating post reduction 0 with 173 rules applied. Total rules applied 173 place count 2319 transition count 2334
Discarding 128 places :
Symmetric choice reduction at 1 with 128 rule applications. Total rules 301 place count 2191 transition count 2186
Iterating global reduction 1 with 128 rules applied. Total rules applied 429 place count 2191 transition count 2186
Discarding 63 places :
Symmetric choice reduction at 1 with 63 rule applications. Total rules 492 place count 2128 transition count 2123
Iterating global reduction 1 with 63 rules applied. Total rules applied 555 place count 2128 transition count 2123
Discarding 23 places :
Symmetric choice reduction at 1 with 23 rule applications. Total rules 578 place count 2105 transition count 2060
Iterating global reduction 1 with 23 rules applied. Total rules applied 601 place count 2105 transition count 2060
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 643 place count 2063 transition count 2018
Iterating global reduction 1 with 42 rules applied. Total rules applied 685 place count 2063 transition count 2018
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 727 place count 2021 transition count 1976
Iterating global reduction 1 with 42 rules applied. Total rules applied 769 place count 2021 transition count 1976
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 811 place count 1979 transition count 1934
Iterating global reduction 1 with 42 rules applied. Total rules applied 853 place count 1979 transition count 1934
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 895 place count 1937 transition count 1892
Iterating global reduction 1 with 42 rules applied. Total rules applied 937 place count 1937 transition count 1892
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 979 place count 1895 transition count 1850
Iterating global reduction 1 with 42 rules applied. Total rules applied 1021 place count 1895 transition count 1850
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1063 place count 1853 transition count 1808
Iterating global reduction 1 with 42 rules applied. Total rules applied 1105 place count 1853 transition count 1808
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1147 place count 1811 transition count 1766
Iterating global reduction 1 with 42 rules applied. Total rules applied 1189 place count 1811 transition count 1766
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1231 place count 1769 transition count 1724
Iterating global reduction 1 with 42 rules applied. Total rules applied 1273 place count 1769 transition count 1724
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1315 place count 1727 transition count 1682
Iterating global reduction 1 with 42 rules applied. Total rules applied 1357 place count 1727 transition count 1682
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1399 place count 1685 transition count 1640
Iterating global reduction 1 with 42 rules applied. Total rules applied 1441 place count 1685 transition count 1640
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1483 place count 1643 transition count 1598
Iterating global reduction 1 with 42 rules applied. Total rules applied 1525 place count 1643 transition count 1598
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1567 place count 1601 transition count 1556
Iterating global reduction 1 with 42 rules applied. Total rules applied 1609 place count 1601 transition count 1556
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 1651 place count 1559 transition count 1514
Iterating global reduction 1 with 42 rules applied. Total rules applied 1693 place count 1559 transition count 1514
Ensure Unique test removed 42 transitions
Reduce isomorphic transitions removed 42 transitions.
Iterating post reduction 1 with 42 rules applied. Total rules applied 1735 place count 1559 transition count 1472
Applied a total of 1735 rules in 1647 ms. Remains 1559 /2492 variables (removed 933) and now considering 1472/2334 (removed 862) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1648 ms. Remains : 1559/2492 places, 1472/2334 transitions.
[2023-03-10 11:35:25] [INFO ] Flatten gal took : 27 ms
[2023-03-10 11:35:25] [INFO ] Flatten gal took : 26 ms
[2023-03-10 11:35:25] [INFO ] Input system was already deterministic with 1472 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2492/2492 places, 2334/2334 transitions.
Reduce places removed 4 places and 0 transitions.
Discarding 168 places :
Implicit places reduction removed 168 places
Iterating post reduction 0 with 172 rules applied. Total rules applied 172 place count 2320 transition count 2334
Discarding 86 places :
Symmetric choice reduction at 1 with 86 rule applications. Total rules 258 place count 2234 transition count 2228
Iterating global reduction 1 with 86 rules applied. Total rules applied 344 place count 2234 transition count 2228
Discarding 104 places :
Symmetric choice reduction at 1 with 104 rule applications. Total rules 448 place count 2130 transition count 2124
Iterating global reduction 1 with 104 rules applied. Total rules applied 552 place count 2130 transition count 2124
Discarding 43 places :
Symmetric choice reduction at 1 with 43 rule applications. Total rules 595 place count 2087 transition count 2021
Iterating global reduction 1 with 43 rules applied. Total rules applied 638 place count 2087 transition count 2021
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 658 place count 2067 transition count 2001
Iterating global reduction 1 with 20 rules applied. Total rules applied 678 place count 2067 transition count 2001
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 698 place count 2047 transition count 1981
Iterating global reduction 1 with 20 rules applied. Total rules applied 718 place count 2047 transition count 1981
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 738 place count 2027 transition count 1961
Iterating global reduction 1 with 20 rules applied. Total rules applied 758 place count 2027 transition count 1961
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 778 place count 2007 transition count 1941
Iterating global reduction 1 with 20 rules applied. Total rules applied 798 place count 2007 transition count 1941
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 818 place count 1987 transition count 1921
Iterating global reduction 1 with 20 rules applied. Total rules applied 838 place count 1987 transition count 1921
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 858 place count 1967 transition count 1901
Iterating global reduction 1 with 20 rules applied. Total rules applied 878 place count 1967 transition count 1901
Applied a total of 878 rules in 1125 ms. Remains 1967 /2492 variables (removed 525) and now considering 1901/2334 (removed 433) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1125 ms. Remains : 1967/2492 places, 1901/2334 transitions.
[2023-03-10 11:35:26] [INFO ] Flatten gal took : 36 ms
[2023-03-10 11:35:26] [INFO ] Flatten gal took : 33 ms
[2023-03-10 11:35:26] [INFO ] Input system was already deterministic with 1901 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2492/2492 places, 2334/2334 transitions.
Reduce places removed 5 places and 0 transitions.
Discarding 168 places :
Implicit places reduction removed 168 places
Iterating post reduction 0 with 173 rules applied. Total rules applied 173 place count 2319 transition count 2334
Discarding 128 places :
Symmetric choice reduction at 1 with 128 rule applications. Total rules 301 place count 2191 transition count 2186
Iterating global reduction 1 with 128 rules applied. Total rules applied 429 place count 2191 transition count 2186
Discarding 104 places :
Symmetric choice reduction at 1 with 104 rule applications. Total rules 533 place count 2087 transition count 2082
Iterating global reduction 1 with 104 rules applied. Total rules applied 637 place count 2087 transition count 2082
Discarding 43 places :
Symmetric choice reduction at 1 with 43 rule applications. Total rules 680 place count 2044 transition count 1979
Iterating global reduction 1 with 43 rules applied. Total rules applied 723 place count 2044 transition count 1979
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 785 place count 1982 transition count 1917
Iterating global reduction 1 with 62 rules applied. Total rules applied 847 place count 1982 transition count 1917
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 909 place count 1920 transition count 1855
Iterating global reduction 1 with 62 rules applied. Total rules applied 971 place count 1920 transition count 1855
Discarding 62 places :
Symmetric choice reduction at 1 with 62 rule applications. Total rules 1033 place count 1858 transition count 1793
Iterating global reduction 1 with 62 rules applied. Total rules applied 1095 place count 1858 transition count 1793
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 1115 place count 1838 transition count 1773
Iterating global reduction 1 with 20 rules applied. Total rules applied 1135 place count 1838 transition count 1773
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 1155 place count 1818 transition count 1753
Iterating global reduction 1 with 20 rules applied. Total rules applied 1175 place count 1818 transition count 1753
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 1195 place count 1798 transition count 1733
Iterating global reduction 1 with 20 rules applied. Total rules applied 1215 place count 1798 transition count 1733
Applied a total of 1215 rules in 1075 ms. Remains 1798 /2492 variables (removed 694) and now considering 1733/2334 (removed 601) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1075 ms. Remains : 1798/2492 places, 1733/2334 transitions.
[2023-03-10 11:35:27] [INFO ] Flatten gal took : 29 ms
[2023-03-10 11:35:27] [INFO ] Flatten gal took : 29 ms
[2023-03-10 11:35:27] [INFO ] Input system was already deterministic with 1733 transitions.
[2023-03-10 11:35:27] [INFO ] Flatten gal took : 43 ms
[2023-03-10 11:35:28] [INFO ] Flatten gal took : 41 ms
[2023-03-10 11:35:28] [INFO ] Export to MCC of 7 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 2 ms.
[2023-03-10 11:35:28] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 2492 places, 2334 transitions and 5631 arcs took 12 ms.
Total runtime 23678 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT FamilyReunion-COL-L00020M0002C001P001G001
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/365

FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 15469280 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16100264 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/365/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/365/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/365/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:203
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 26 (type SKEL/FNDP) for 15 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 27 (type SKEL/EQUN) for 15 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 28 (type SKEL/SRCH) for 15 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 29 (type SKEL/SRCH) for 15 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 26 (type SKEL/FNDP) for FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12
lola: result : true
lola: fired transitions : 759
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 27 (type EQUN) for FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12 (obsolete)
lola: CANCELED task # 28 (type SRCH) for FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12 (obsolete)
lola: CANCELED task # 29 (type SRCH) for FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/365/CTLCardinality-27.sara.
sara: place or transition ordering is non-deterministic

lola: LAUNCH INITIAL
lola: LAUNCH task # 10 (type CNST) for 9 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 30 (type EXCL) for 12 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type CNST) for FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 27 (type SKEL/EQUN) for FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 31 (type FNDP) for 15 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 32 (type EQUN) for 15 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 34 (type SRCH) for 15 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/365/CTLCardinality-32.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 32 (type EQUN) for FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12
lola: result : true
lola: CANCELED task # 31 (type FNDP) for FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12 (obsolete)
lola: CANCELED task # 34 (type SRCH) for FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12 (obsolete)
lola: FINISHED task # 34 (type SRCH) for FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 31 (type FNDP) for FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12
lola: result : true
lola: fired transitions : 59
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:793
lola: rewrite Frontend/Parser/formula_rewrite.k:793
lola: rewrite Frontend/Parser/formula_rewrite.k:794
lola: rewrite Frontend/Parser/formula_rewrite.k:797
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 EG EXCL 5/719 3/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07 504755 m, 100951 m/sec, 1985485 t fired, .

Time elapsed: 6 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 EG EXCL 10/719 5/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07 988393 m, 96727 m/sec, 4063407 t fired, .

Time elapsed: 11 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 EG EXCL 15/719 7/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07 1455644 m, 93450 m/sec, 6084747 t fired, .

Time elapsed: 16 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 EG EXCL 20/719 9/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07 1953550 m, 99581 m/sec, 8130698 t fired, .

Time elapsed: 21 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 EG EXCL 25/719 12/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07 2438485 m, 96987 m/sec, 10154626 t fired, .

Time elapsed: 26 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 EG EXCL 30/719 14/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07 2966228 m, 105548 m/sec, 12285255 t fired, .

Time elapsed: 31 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 EG EXCL 35/719 16/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07 3466987 m, 100151 m/sec, 14328722 t fired, .

Time elapsed: 36 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 EG EXCL 40/719 18/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07 3992434 m, 105089 m/sec, 16411680 t fired, .

Time elapsed: 41 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 EG EXCL 45/719 20/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07 4433903 m, 88293 m/sec, 18389538 t fired, .

Time elapsed: 46 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 EG EXCL 50/719 22/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07 4892063 m, 91632 m/sec, 20385206 t fired, .

Time elapsed: 51 secs. Pages in use: 22
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 EG EXCL 55/719 24/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07 5283875 m, 78362 m/sec, 22384440 t fired, .

Time elapsed: 56 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 EG EXCL 60/719 26/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07 5701093 m, 83443 m/sec, 24395786 t fired, .

Time elapsed: 61 secs. Pages in use: 26
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 EG EXCL 65/719 28/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07 6167887 m, 93358 m/sec, 26481617 t fired, .

Time elapsed: 66 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 EG EXCL 70/719 30/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07 6607752 m, 87973 m/sec, 28529836 t fired, .

Time elapsed: 71 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 EG EXCL 75/719 32/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07 7069856 m, 92420 m/sec, 30593853 t fired, .

Time elapsed: 76 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
lola: CANCELED task # 30 (type EXCL) for FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 81 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
lola: LAUNCH task # 23 (type EXCL) for 22 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14
lola: time limit : 879 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 5/879 2/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14 77379 m, 15475 m/sec, 365068 t fired, .

Time elapsed: 86 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 10/879 4/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14 148346 m, 14193 m/sec, 728836 t fired, .

Time elapsed: 91 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 15/879 6/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14 217083 m, 13747 m/sec, 1096342 t fired, .

Time elapsed: 96 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 20/879 8/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14 292171 m, 15017 m/sec, 1467711 t fired, .

Time elapsed: 101 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 25/879 10/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14 354923 m, 12550 m/sec, 1850008 t fired, .

Time elapsed: 106 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 30/879 12/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14 441842 m, 17383 m/sec, 2225060 t fired, .

Time elapsed: 111 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 35/879 15/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14 527010 m, 17033 m/sec, 2599841 t fired, .

Time elapsed: 116 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 40/879 17/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14 603876 m, 15373 m/sec, 2984631 t fired, .

Time elapsed: 121 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 45/879 19/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14 675771 m, 14379 m/sec, 3365998 t fired, .

Time elapsed: 126 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 50/879 21/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14 736409 m, 12127 m/sec, 3757785 t fired, .

Time elapsed: 131 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 55/879 23/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14 816133 m, 15944 m/sec, 4143896 t fired, .

Time elapsed: 136 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 60/879 25/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14 894335 m, 15640 m/sec, 4533626 t fired, .

Time elapsed: 141 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 65/879 28/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14 973937 m, 15920 m/sec, 4942870 t fired, .

Time elapsed: 146 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 70/879 30/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14 1060285 m, 17269 m/sec, 5343700 t fired, .

Time elapsed: 151 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 75/879 32/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14 1149528 m, 17848 m/sec, 5724566 t fired, .

Time elapsed: 156 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
lola: CANCELED task # 23 (type EXCL) for FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 161 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
lola: LAUNCH task # 7 (type EXCL) for 6 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04
lola: time limit : 1146 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02
lola: time limit : 1719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00
lola: time limit : 3439 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 5/3439 3/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 88644 m, 17728 m/sec, 374803 t fired, .

Time elapsed: 166 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 10/3439 5/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 162899 m, 14851 m/sec, 752418 t fired, .

Time elapsed: 171 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 15/3439 6/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 227542 m, 12928 m/sec, 1131651 t fired, .

Time elapsed: 176 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 20/3439 9/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 311709 m, 16833 m/sec, 1508212 t fired, .

Time elapsed: 181 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 25/3439 10/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 386394 m, 14937 m/sec, 1884446 t fired, .

Time elapsed: 186 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 30/3439 11/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 451588 m, 13038 m/sec, 2262279 t fired, .

Time elapsed: 191 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 35/3439 11/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 510050 m, 11692 m/sec, 2641862 t fired, .

Time elapsed: 196 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 40/3439 12/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 567856 m, 11561 m/sec, 3023310 t fired, .

Time elapsed: 201 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 45/3439 13/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 638730 m, 14174 m/sec, 3401980 t fired, .

Time elapsed: 206 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 50/3439 15/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 709342 m, 14122 m/sec, 3774081 t fired, .

Time elapsed: 211 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 55/3439 16/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 774381 m, 13007 m/sec, 4150304 t fired, .

Time elapsed: 216 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 60/3439 17/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 832841 m, 11692 m/sec, 4531313 t fired, .

Time elapsed: 221 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 65/3439 18/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 891819 m, 11795 m/sec, 4913639 t fired, .

Time elapsed: 226 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 70/3439 20/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 963791 m, 14394 m/sec, 5294114 t fired, .

Time elapsed: 231 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 75/3439 21/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 1035197 m, 14281 m/sec, 5673714 t fired, .

Time elapsed: 236 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 80/3439 23/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 1099372 m, 12835 m/sec, 6052885 t fired, .

Time elapsed: 241 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 85/3439 25/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 1156897 m, 11505 m/sec, 6433421 t fired, .

Time elapsed: 246 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 90/3439 26/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 1217279 m, 12076 m/sec, 6814830 t fired, .

Time elapsed: 251 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 95/3439 28/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 1290392 m, 14622 m/sec, 7193758 t fired, .

Time elapsed: 256 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 100/3439 29/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 1359688 m, 13859 m/sec, 7571456 t fired, .

Time elapsed: 261 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 105/3439 30/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 1422452 m, 12552 m/sec, 7948650 t fired, .

Time elapsed: 266 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 110/3439 31/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 1479474 m, 11404 m/sec, 8327459 t fired, .

Time elapsed: 271 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 1 0 1 0 0 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 115/3439 32/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 1541818 m, 12468 m/sec, 8706577 t fired, .

Time elapsed: 276 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
lola: CANCELED task # 1 (type EXCL) for FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 281 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 286 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 291 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 296 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 301 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 306 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 311 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 316 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 321 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 326 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 331 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 336 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 341 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 346 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 351 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 356 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 361 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 366 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 371 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 376 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 381 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 386 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 391 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 396 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 401 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 406 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 411 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 416 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 421 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 426 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 431 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 436 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 441 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 446 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 451 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 456 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 461 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 466 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 471 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 476 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 481 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 486 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 491 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 496 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 501 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 506 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 511 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 516 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 521 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 526 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 531 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 536 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 541 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 546 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 551 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 556 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 561 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 566 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 571 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 576 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 581 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 586 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 591 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 596 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 601 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 606 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 611 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 616 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 621 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 626 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 631 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 636 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 641 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 646 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 651 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 656 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 661 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 666 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 671 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 676 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 681 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 686 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 691 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 696 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 701 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 706 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 711 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 716 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 721 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 726 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 731 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 736 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 741 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 746 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 751 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 756 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 761 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 766 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 771 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 776 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 781 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 786 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 791 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 796 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 801 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 806 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 811 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 816 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 821 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 826 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 831 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 836 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 841 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 846 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 851 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 856 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 861 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 866 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 871 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 876 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 881 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 886 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 891 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 896 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 901 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 906 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 911 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 916 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 921 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 926 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 931 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 936 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 941 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 946 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 951 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 956 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 961 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 966 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 971 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 976 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 981 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 986 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 991 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 996 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1001 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1006 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1011 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1016 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1021 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1026 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1031 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1036 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1041 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1046 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1051 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1056 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1061 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1066 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1071 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1076 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1081 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1086 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1091 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1096 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1101 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1106 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1111 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1116 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1121 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1126 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1131 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1136 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1141 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1146 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1151 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1156 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1161 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1166 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1171 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1176 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1181 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1186 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1191 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1196 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1201 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1206 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1211 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1216 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1221 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1226 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1231 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1236 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1241 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1246 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1251 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1256 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1261 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1266 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1271 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1276 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1281 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1286 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1291 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1296 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1301 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1306 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1311 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1316 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1321 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1326 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1331 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1336 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1341 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1346 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1351 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1356 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1361 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1366 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1371 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1376 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1381 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1386 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1391 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1396 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1401 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1406 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1411 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1416 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1421 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1426 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1431 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1436 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1441 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1446 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1451 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1456 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1461 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1466 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1471 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1476 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1481 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1486 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1491 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1496 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1501 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1506 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1511 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1516 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1521 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1526 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1531 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1536 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1541 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1546 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1551 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1556 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1561 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1566 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1571 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1576 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1581 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1586 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1591 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1596 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1601 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1606 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1611 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1616 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1621 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1626 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1631 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1636 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1641 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1646 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1651 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1657 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1662 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1667 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1672 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1677 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1682 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1687 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1692 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1697 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1702 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1707 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1712 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1717 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1722 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1727 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1732 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1737 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1742 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1747 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1752 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1757 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1762 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1767 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1772 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1777 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1782 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1787 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1792 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1797 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1802 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1807 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1812 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1817 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1822 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1827 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1832 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1837 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1842 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1847 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1852 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1857 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1862 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1867 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1872 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1877 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1882 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1887 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1892 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1897 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1902 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1907 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1912 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1917 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1922 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1927 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1932 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1937 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1942 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1947 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1952 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1957 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1962 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1967 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1972 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1977 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1982 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1987 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1992 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1997 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2002 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2007 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2012 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2017 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2022 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2027 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2032 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2037 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2042 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2047 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2052 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2057 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2062 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2067 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2072 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2077 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2082 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2087 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2092 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2097 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2102 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2107 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2112 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2117 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2122 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2127 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2132 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2137 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2142 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2147 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2152 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2157 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2162 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2167 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2172 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2177 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2182 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2187 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2192 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2197 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2202 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2207 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2212 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2217 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2222 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2227 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2232 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2237 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2242 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2247 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2252 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2257 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2262 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2267 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2272 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2277 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2282 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2287 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2292 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2297 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2302 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2307 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2312 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2317 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2322 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2327 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2332 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2337 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2342 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2347 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2352 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2357 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2362 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2367 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2372 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2377 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2382 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2387 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2392 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2397 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2402 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2407 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2412 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2417 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2422 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2427 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2432 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2437 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2442 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2447 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2452 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2457 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2462 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2467 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2472 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2477 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2482 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2487 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2492 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2497 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2502 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2507 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2512 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2517 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2522 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2527 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2532 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2537 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2542 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2547 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2552 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2557 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2562 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2567 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2572 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2577 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2582 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2587 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2592 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2597 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2602 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2607 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2612 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2617 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2622 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2627 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2632 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2637 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2642 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2647 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2652 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2657 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2662 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2667 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2672 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2677 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2682 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2687 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2692 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2697 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2702 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2707 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2712 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2717 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2722 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2727 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2732 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2737 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2742 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2747 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2752 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2757 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2762 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2767 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2772 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2777 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2782 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2787 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2792 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2797 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2802 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2807 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2812 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2817 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2822 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2827 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2832 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2837 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2842 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2847 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2852 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2857 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2862 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2867 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2872 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2877 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2882 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2887 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2892 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2897 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2902 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2907 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2912 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2917 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2922 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2927 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2932 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2937 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2942 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2947 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2952 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2957 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2962 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2967 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2972 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2977 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2982 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2987 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2992 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 2997 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3002 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3007 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3012 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3017 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3022 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3027 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3032 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3037 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3042 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3047 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3052 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3057 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3062 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3067 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3072 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3077 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3082 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3087 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3092 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3097 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3102 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3107 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3112 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3117 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3122 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3127 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3132 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3137 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3142 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3147 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3152 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3157 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3162 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3167 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3172 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3177 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3182 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3187 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3192 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3197 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3202 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3207 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3212 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3217 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3222 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3227 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3232 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3237 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3242 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3247 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3252 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3257 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3262 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3267 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3272 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3277 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3282 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3287 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3292 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3297 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3302 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3307 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3312 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3317 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3322 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3327 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3332 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3337 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3342 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3347 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3352 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3357 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3362 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3367 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3372 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3377 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3382 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3387 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3392 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3397 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3402 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3407 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3412 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3417 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3422 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3427 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3432 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3437 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3442 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3447 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3452 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3457 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3462 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3467 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3472 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3477 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3482 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3487 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3492 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3497 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3502 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3507 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3512 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3517 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3522 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3527 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3532 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3537 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3542 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3547 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3552 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3557 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3562 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3567 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F 0 0 0 0 1 0 1 0
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 3572 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 7
lola: caught signal Terminated - aborting LoLA

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-00: EG unknown AGGR
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-02: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-04: LTL/CTL true CTL model checker
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-06: INITIAL false preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-07: F unknown AGGR
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-12: DISJ true state equation
FamilyReunion-COL-L00020M0002C001P001G001-CTLCardinality-14: CTL unknown AGGR


Time elapsed: 3574 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L00020M0002C001P001G001"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is FamilyReunion-COL-L00020M0002C001P001G001, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r167-tall-167838852900305"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L00020M0002C001P001G001.tgz
mv FamilyReunion-COL-L00020M0002C001P001G001 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;