fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r167-tall-167838852900302
Last Updated
May 14, 2023

About the Execution of LoLa+red for FamilyReunion-COL-L00010M0001C001P001G001

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1872.384 31711.00 100152.00 428.30 FFFFFFTFTFFFFFTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r167-tall-167838852900302.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is FamilyReunion-COL-L00010M0001C001P001G001, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838852900302
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 596K
-rw-r--r-- 1 mcc users 6.9K Feb 26 12:01 CTLCardinality.txt
-rw-r--r-- 1 mcc users 69K Feb 26 12:01 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.1K Feb 26 11:59 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 26 11:59 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:05 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 16:05 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Feb 25 16:05 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:05 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 12:06 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 134K Feb 26 12:06 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.9K Feb 26 12:04 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 62K Feb 26 12:04 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 16:05 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:05 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 24 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 134K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-02
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-03
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-04
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-12
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-13
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-14
FORMULA_NAME FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678448044131

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FamilyReunion-COL-L00010M0001C001P001G001
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 11:34:05] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-10 11:34:05] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 11:34:05] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-10 11:34:06] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-10 11:34:06] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 717 ms
[2023-03-10 11:34:06] [INFO ] Detected 5 constant HL places corresponding to 10 PT places.
[2023-03-10 11:34:06] [INFO ] Imported 104 HL places and 66 HL transitions for a total of 1486 PT places and 1245.0 transition bindings in 22 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 26 ms.
Working with output stream class java.io.PrintStream
[2023-03-10 11:34:06] [INFO ] Built PT skeleton of HLPN with 104 places and 66 transitions 198 arcs in 5 ms.
[2023-03-10 11:34:06] [INFO ] Skeletonized 16 HLPN properties in 1 ms.
Remains 16 properties that can be checked using skeleton over-approximation.
Reduce places removed 5 places and 0 transitions.
Computed a total of 99 stabilizing places and 66 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 99 transition count 66
[2023-03-10 11:34:06] [INFO ] Flatten gal took : 35 ms
[2023-03-10 11:34:06] [INFO ] Flatten gal took : 8 ms
Transition Gate2ANDJoin forces synchronizations/join behavior on parameter l of sort LegalResident
Symmetric sort wr.t. initial and guards and successors and join/free detected :Response
Symmetric sort wr.t. initial detected :Response
Transition SendClearanceToRel : guard parameter $r(Response:2) in guard (EQ $r 0)introduces in Response(2) partition with 2 elements
Symmetric sort wr.t. initial and guards and successors and join/free detected :CINFORMI
Symmetric sort wr.t. initial detected :CINFORMI
Symmetric sort wr.t. initial and guards detected :CINFORMI
Applying symmetric unfolding of full symmetric sort :CINFORMI domain size was 2
Symmetric sort wr.t. initial and guards and successors and join/free detected :GovernmentCommission
Symmetric sort wr.t. initial detected :GovernmentCommission
Symmetric sort wr.t. initial and guards detected :GovernmentCommission
Applying symmetric unfolding of full symmetric sort :GovernmentCommission domain size was 2
Transition Gate1ANDJoin forces synchronizations/join behavior on parameter p of sort PublicAdminOffice
Transition ReceiveLangChoice forces synchronizations/join behavior on parameter m of sort MICSystem
[2023-03-10 11:34:06] [INFO ] Unfolded HLPN to a Petri net with 1379 places and 1069 transitions 3062 arcs in 28 ms.
[2023-03-10 11:34:06] [INFO ] Unfolded 16 HLPN properties in 1 ms.
Deduced a syphon composed of 11 places in 11 ms
Reduce places removed 19 places and 0 transitions.
Incomplete random walk after 10000 steps, including 15 resets, run finished after 659 ms. (steps per millisecond=15 ) properties (out of 16) seen :5
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 11) seen :1
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 176 ms. (steps per millisecond=56 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 152 ms. (steps per millisecond=65 ) properties (out of 10) seen :1
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 60 ms. (steps per millisecond=166 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 58 ms. (steps per millisecond=172 ) properties (out of 9) seen :0
Running SMT prover for 9 properties.
// Phase 1: matrix 1069 rows 1360 cols
[2023-03-10 11:34:08] [INFO ] Computed 331 place invariants in 54 ms
[2023-03-10 11:34:09] [INFO ] [Real]Absence check using 31 positive place invariants in 71 ms returned sat
[2023-03-10 11:34:09] [INFO ] [Real]Absence check using 31 positive and 300 generalized place invariants in 88 ms returned sat
[2023-03-10 11:34:09] [INFO ] After 734ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:7
[2023-03-10 11:34:09] [INFO ] [Nat]Absence check using 31 positive place invariants in 22 ms returned sat
[2023-03-10 11:34:09] [INFO ] [Nat]Absence check using 31 positive and 300 generalized place invariants in 88 ms returned sat
[2023-03-10 11:34:09] [INFO ] After 509ms SMT Verify possible using all constraints in natural domain returned unsat :9 sat :0
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-14 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-13 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-04 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-02 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 9 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 4253 ms.
starting LoLA
BK_INPUT FamilyReunion-COL-L00010M0001C001P001G001
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678448075842

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: TR BINDINGS
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 88 (type SKEL/FNDP) for 21 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SKEL/EQUN) for 21 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 91 (type SKEL/SRCH) for 21 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 92 (type SKEL/SRCH) for 21 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: TR BINDINGS DONE
lola: Places: 1486, Transitions: 1234
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: @ trans RegisterRelativePubHealth
lola: @ trans Gate1XORSplit
lola: @ trans ObtainMissingDocs
lola: @ trans DisplayReqDocs
lola: @ trans Gate2ANDJoin
lola: @ trans SummonApplicant
lola: @ trans GotIt
lola: @ trans Gate3XORSplit
lola: @ trans HousingSuitCertifObtained
lola: @ trans CheckRequiredDoc
lola: @ trans ReceiveRegsitration
lola: @ trans ProvidePersonalnfo
lola: @ trans AppReqReceived
lola: @ trans ReserveAppoint
lola: @ trans SendClearanceToRel
lola: @ trans SendLangChoice
lola: @ trans ObtainRelativeFinStatement
lola: @ trans TransmitReq
lola: @ trans TickDocsObtained
lola: @ trans ReceiveAccessReq
lola: @ trans ReceiveLangChoice
lola: @ trans ReqHousingSuitCertif
lola: @ trans BringReqtoCINFORMI
lola: @ trans ExplainHowToObtainMissingDocs
lola: @ trans SendSuitabilityCertif
lola: @ trans EvaluateReq
lola: @ trans CheckHousingSuitReq
lola: @ trans ReceiveAppoint
lola: @ trans DisplayLangChoice
lola: @ trans Gate1ANDJoin
lola: @ trans Gate2XORSplit
lola: @ trans RegisterRelative
lola: @ trans Summoned
lola: @ trans PrepIncomeCertif
lola: @ trans Gate1ANDSplit
lola: @ trans ReceiveQuestion
lola: @ trans RespReceived
lola: @ trans PrepFamReuClearReq
lola: @ trans ReqAppointCINFORMI
lola: @ trans GoToAppoint
lola: @ trans GotoOSSAndProdDoc
lola: @ trans ArchiveReq
lola: @ trans Gate2ANDSplit
lola: @ trans ReceiveDocsObtained
lola: @ trans AppointReceived
lola: @ trans CheckSanityReq
lola: @ trans ReceiveInstructions
lola: @ trans AccessMicTerminal
lola: @ trans SetUpAppoint
lola: @ trans ReceiveReqDocsReq
lola: @ trans ReceiveLangReq
lola: @ trans CommunicateResp
lola: @ trans ObtainRelHealtCondStatement
lola: @ trans GiveAppoint
lola: @ trans ReserveAppCINFORMI
lola: @ trans ChoseFamilyReunion
lola: @ trans Gate1XORJoin
lola: @ trans ClearanceReqReceived
lola: @ trans ReceiveNeedReq
lola: @ trans ExplainProcedure
lola: @ trans ReceiveHousingSuitCertifReq
lola: @ trans ObtainFamRelCertif
lola: @ trans ReceiveAppointReq
lola: @ trans ReceiveNeedChoice
lola: @ trans DisplayNeedChoice
lola: @ trans AskCINFORMI
lola: FINISHED task # 91 (type SKEL/SRCH) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07
lola: result : false
lola: markings : 107817
lola: fired transitions : 195405
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 88 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 89 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 92 (type SRCH) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 148 (type SKEL/FNDP) for 18 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 149 (type SKEL/EQUN) for 18 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 151 (type SKEL/SRCH) for 18 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 152 (type SKEL/SRCH) for 18 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 88 (type SKEL/FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 443136
lola: tried executions : 1142
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 151 (type SKEL/SRCH) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06
lola: result : true
lola: markings : 20
lola: fired transitions : 19
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 148 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 149 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 152 (type SRCH) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 81 (type SKEL/FNDP) for 24 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type SKEL/EQUN) for 24 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 84 (type SKEL/SRCH) for 24 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type SKEL/SRCH) for 24 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 148 (type SKEL/FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06
lola: result : true
lola: fired transitions : 18
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-149.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 149 (type SKEL/EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00: AG 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01: AG 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-03: EF 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-04: EF 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06: EF 0 0 0 0 3 0 0 2
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08: AG 0 1 4 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09: AG 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-12: EF 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-14: AG 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15: EF 0 5 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
81 EF FNDP 5/196 0/5 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 5885057 t fired, 21821 attempts, .
82 EF STEQ 5/196 0/5 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 sara not yet started (preprocessing).
84 EF SRCH 5/208 1/5 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 1642700 m, 328540 m/sec, 3380775 t fired, .
85 EF SRCH 5/208 1/5 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 712694 m, 142538 m/sec, 911301 t fired, .

Time elapsed: 6 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-82.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00: AG 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01: AG 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-03: EF 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-04: EF 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06: EF 0 0 0 0 3 0 0 2
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08: AG 0 1 4 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09: AG 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-12: EF 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-14: AG 0 5 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15: EF 0 5 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
81 EF FNDP 10/194 0/5 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 9506210 t fired, 35247 attempts, .
82 EF STEQ 10/194 0/5 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 sara is running.
84 EF SRCH 10/206 1/5 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 3193174 m, 310094 m/sec, 6379505 t fired, .
85 EF SRCH 10/206 1/5 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 868784 m, 31218 m/sec, 1129736 t fired, .

Time elapsed: 11 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
lola: Rule S: 0 transitions removed,11 places removed
lola: planning for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00: AG 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01: AG 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-02: EF 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-03: EF 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-04: EF 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05: AG 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06: EF 0 5 0 0 3 0 0 2
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08: AG 0 6 4 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09: AG 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10: EF 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11: AG 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-12: EF 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-13: EF 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-14: AG 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15: EF 0 10 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
81 EF FNDP 15/94 0/5 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 15143827 t fired, 56151 attempts, .
82 EF STEQ 15/94 0/5 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 sara is running.
84 EF SRCH 15/97 1/5 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 4620340 m, 285433 m/sec, 8792505 t fired, .
85 EF SRCH 15/97 1/5 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 1512709 m, 128785 m/sec, 1988569 t fired, .

Time elapsed: 16 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00: AG 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01: AG 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-02: EF 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-03: EF 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-04: EF 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05: AG 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06: EF 0 5 0 0 3 0 0 2
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08: AG 0 6 4 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09: AG 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10: EF 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11: AG 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-12: EF 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-13: EF 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-14: AG 0 10 0 0 0 0 0 0
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15: EF 0 10 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
81 EF FNDP 20/94 0/5 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 23148159 t fired, 85827 attempts, .
82 EF STEQ 20/94 0/5 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 sara is running.
84 EF SRCH 20/97 1/5 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 6841428 m, 444217 m/sec, 12502459 t fired, .
85 EF SRCH 20/97 1/5 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 3024811 m, 302420 m/sec, 4064341 t fired, .

Time elapsed: 21 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16

lola: FINISHED task # 82 (type SKEL/EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08
lola: result : false
lola: CANCELED task # 81 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 84 (type SRCH) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 85 (type SRCH) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 221 (type EXCL) for 6 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-02
lola: time limit : 255 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 180 (type FNDP) for 9 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 181 (type EQUN) for 9 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 183 (type SRCH) for 9 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 81 (type SKEL/FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08
lola: result : unknown
lola: fired transitions : 27418873
lola: tried executions : 101663
lola: time used : 23.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-181.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 181 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-03
lola: result : false
lola: CANCELED task # 180 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 183 (type SRCH) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 146 (type SKEL/FNDP) for 3 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 147 (type SKEL/FNDP) for 30 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 154 (type SKEL/EQUN) for 3 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 180 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 200475
lola: tried executions : 16708
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 146 (type SKEL/FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01
lola: result : true
lola: fired transitions : 7
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 154 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 50 (type SKEL/FNDP) for 15 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/EQUN) for 15 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-154.sara.

lola: FINISHED task # 154 (type SKEL/EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01
lola: result : true
lola: FINISHED task # 50 (type SKEL/FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 4
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 51 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 109 (type SKEL/FNDP) for 12 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 110 (type SKEL/EQUN) for 12 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-110.sara.
sara: place or transition ordering is non-deterministic


lola: FINISHED task # 51 (type SKEL/EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05
lola: result : true
lola: FINISHED task # 110 (type SKEL/EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-04
lola: result : false
lola: CANCELED task # 109 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 142 (type SKEL/FNDP) for 27 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 144 (type SKEL/EQUN) for 27 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 109 (type SKEL/FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 987241
lola: tried executions : 82272
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 142 (type SKEL/FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 144 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 73 (type SKEL/FNDP) for 33 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type SKEL/EQUN) for 33 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 73 (type SKEL/FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 44
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 74 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 95 (type SKEL/FNDP) for 45 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type SKEL/EQUN) for 45 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 95 (type SKEL/FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15
lola: result : true
lola: fired transitions : 95
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 96 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 102 (type SKEL/FNDP) for 36 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type SKEL/EQUN) for 36 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-96.sara.
sara: place or transition ordering is non-deterministic

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-144.sara.

lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 144 (type SKEL/EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09
sara: lola: try reading problem file /home/mcc/execution/ReachabilityCardinality-74.sara.
result : true
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 96 (type SKEL/EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-103.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 103 (type SKEL/EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-12
lola: result : false
lola: CANCELED task # 102 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 124 (type SKEL/FNDP) for 42 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 125 (type SKEL/EQUN) for 42 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 102 (type SKEL/FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 22415
lola: tried executions : 92
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-125.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 125 (type SKEL/EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-14
lola: result : false
lola: CANCELED task # 124 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 65 (type SKEL/FNDP) for 0 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SKEL/EQUN) for 0 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 124 (type SKEL/FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 21279
lola: tried executions : 115
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 65 (type SKEL/FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 24
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 66 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 131 (type SKEL/FNDP) for 39 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 135 (type SKEL/EQUN) for 39 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 66 (type SKEL/EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00
lola: result : unknown

lola: FINISHED task # 74 (type SKEL/EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-135.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 135 (type SKEL/EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-13
lola: result : false
lola: CANCELED task # 131 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 251 (type FNDP) for 18 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 252 (type EQUN) for 18 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 131 (type SKEL/FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 100387
lola: tried executions : 882
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 251 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06
lola: result : true
lola: fired transitions : 22
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 252 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 245 (type FNDP) for 15 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 246 (type EQUN) for 15 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 245 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 14
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 246 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 238 (type FNDP) for 33 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 239 (type EQUN) for 33 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-246.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-252.sara.
lola: FINISHED task # 238 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 1119
lola: tried executions : 5
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 239 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 211 (type FNDP) for 45 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 212 (type EQUN) for 45 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 211 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15
lola: result : true
lola: fired transitions : 114
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 212 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-239.sara.
lola: LAUNCH task # 224 (type FNDP) for 0 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 225 (type EQUN) for 0 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 224 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 35
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 225 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 168 (type FNDP) for 3 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 169 (type EQUN) for 3 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-212.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-225.sara.
lola: FINISHED task # 168 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01
lola: result : true
lola: fired transitions : 63
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 169 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 193 (type FNDP) for 27 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 194 (type EQUN) for 27 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 169 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01
lola: result : unknown
lola: FINISHED task # 193 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09
lola: result : true
lola: fired transitions : 17
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 194 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 116 (type SKEL/FNDP) for 6 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 117 (type SKEL/EQUN) for 6 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-117.sara.

sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-194.sara.
lola: FINISHED task # 117 (type SKEL/EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-02
lola: result : false
lola: CANCELED task # 116 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 221 (type EXCL) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 209 (type EXCL) for 30 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10
lola: time limit : 3575 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 156 (type SKEL/EQUN) for 30 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 162 (type SKEL/SRCH) for 30 FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711

lola: FINISHED task # 116 (type SKEL/FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 440181
lola: tried executions : 36683
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 162 (type SKEL/SRCH) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10
lola: result : false
lola: markings : 12
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 147 (type FNDP) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 156 (type EQUN) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 209 (type EXCL) for FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-00: AG false findpath
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-01: AG false findpath
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-02: EF false skeleton: state equation
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-03: EF false state equation
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-04: EF false skeleton: state equation
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-05: AG false findpath
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-06: EF true findpath
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-08: AG true skeleton: state equation
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-09: AG false findpath
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-11: AG false findpath
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-12: EF false skeleton: state equation
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-13: EF false skeleton: state equation
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-14: AG true skeleton: state equation
FamilyReunion-COL-L00010M0001C001P001G001-ReachabilityCardinality-15: EF true findpath


Time elapsed: 25 secs. Pages in use: 2
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-156.sara.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L00010M0001C001P001G001"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is FamilyReunion-COL-L00010M0001C001P001G001, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r167-tall-167838852900302"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L00010M0001C001P001G001.tgz
mv FamilyReunion-COL-L00010M0001C001P001G001 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;