Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r167-tall-167838852700226.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is FMS-PT-00100, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838852700226
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 464K
-rw-r--r-- 1 mcc users 6.6K Feb 25 20:02 CTLCardinality.txt
-rw-r--r-- 1 mcc users 73K Feb 25 20:02 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 20:00 CTLFireability.txt
-rw-r--r-- 1 mcc users 40K Feb 25 20:00 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 16:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 16:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 20:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 139K Feb 25 20:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.8K Feb 25 20:02 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 67K Feb 25 20:02 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Feb 25 16:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 16K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FMS-PT-00100-CTLFireability-00
FORMULA_NAME FMS-PT-00100-CTLFireability-01
FORMULA_NAME FMS-PT-00100-CTLFireability-02
FORMULA_NAME FMS-PT-00100-CTLFireability-03
FORMULA_NAME FMS-PT-00100-CTLFireability-04
FORMULA_NAME FMS-PT-00100-CTLFireability-05
FORMULA_NAME FMS-PT-00100-CTLFireability-06
FORMULA_NAME FMS-PT-00100-CTLFireability-07
FORMULA_NAME FMS-PT-00100-CTLFireability-08
FORMULA_NAME FMS-PT-00100-CTLFireability-09
FORMULA_NAME FMS-PT-00100-CTLFireability-10
FORMULA_NAME FMS-PT-00100-CTLFireability-11
FORMULA_NAME FMS-PT-00100-CTLFireability-12
FORMULA_NAME FMS-PT-00100-CTLFireability-13
FORMULA_NAME FMS-PT-00100-CTLFireability-14
FORMULA_NAME FMS-PT-00100-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678446622978

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=FMS-PT-00100
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 11:10:24] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 11:10:24] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 11:10:24] [INFO ] Load time of PNML (sax parser for PT used): 21 ms
[2023-03-10 11:10:24] [INFO ] Transformed 22 places.
[2023-03-10 11:10:24] [INFO ] Transformed 20 transitions.
[2023-03-10 11:10:24] [INFO ] Parsed PT model containing 22 places and 20 transitions and 50 arcs in 76 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Support contains 21 out of 22 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 8 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
// Phase 1: matrix 20 rows 22 cols
[2023-03-10 11:10:24] [INFO ] Computed 6 place invariants in 8 ms
[2023-03-10 11:10:24] [INFO ] Implicit Places using invariants in 144 ms returned []
[2023-03-10 11:10:24] [INFO ] Invariant cache hit.
[2023-03-10 11:10:24] [INFO ] Implicit Places using invariants and state equation in 41 ms returned []
Implicit Place search using SMT with State Equation took 207 ms to find 0 implicit places.
[2023-03-10 11:10:24] [INFO ] Invariant cache hit.
[2023-03-10 11:10:24] [INFO ] Dead Transitions using invariants and state equation in 46 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 263 ms. Remains : 22/22 places, 20/20 transitions.
Support contains 21 out of 22 places after structural reductions.
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 26 ms
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 4 ms
[2023-03-10 11:10:25] [INFO ] Input system was already deterministic with 20 transitions.
Finished random walk after 1031 steps, including 0 resets, run visited all 29 properties in 16 ms. (steps per millisecond=64 )
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 3 ms
[2023-03-10 11:10:25] [INFO ] Input system was already deterministic with 20 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:10:25] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 7 ms
[2023-03-10 11:10:25] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:10:25] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 22 transition count 17
Reduce places removed 4 places and 0 transitions.
Graph (trivial) has 7 edges and 18 vertex of which 3 / 18 are part of one of the 1 SCC in 2 ms
Free SCC test removed 2 places
Iterating post reduction 1 with 5 rules applied. Total rules applied 8 place count 16 transition count 17
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 10 place count 16 transition count 15
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 12 place count 15 transition count 14
Applied a total of 12 rules in 10 ms. Remains 15 /22 variables (removed 7) and now considering 14/20 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 15/22 places, 14/20 transitions.
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 2 ms
[2023-03-10 11:10:25] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 5 ms
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 20/20 transitions.
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 1 ms
[2023-03-10 11:10:25] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 22 transition count 16
Reduce places removed 6 places and 0 transitions.
Graph (trivial) has 11 edges and 16 vertex of which 9 / 16 are part of one of the 3 SCC in 0 ms
Free SCC test removed 6 places
Iterating post reduction 1 with 7 rules applied. Total rules applied 11 place count 10 transition count 16
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 18 place count 9 transition count 10
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 18 place count 9 transition count 9
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 20 place count 8 transition count 9
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 22 place count 7 transition count 8
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 3 with 2 rules applied. Total rules applied 24 place count 7 transition count 6
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 24 place count 7 transition count 4
Deduced a syphon composed of 2 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 5 rules applied. Total rules applied 29 place count 4 transition count 4
Applied a total of 29 rules in 4 ms. Remains 4 /22 variables (removed 18) and now considering 4/20 (removed 16) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 4/22 places, 4/20 transitions.
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:10:25] [INFO ] Input system was already deterministic with 4 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 22 transition count 15
Reduce places removed 7 places and 0 transitions.
Graph (trivial) has 10 edges and 15 vertex of which 6 / 15 are part of one of the 2 SCC in 0 ms
Free SCC test removed 4 places
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 1 with 10 rules applied. Total rules applied 15 place count 11 transition count 13
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 22 place count 8 transition count 9
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 23 place count 8 transition count 8
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 23 place count 8 transition count 7
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 3 rules applied. Total rules applied 26 place count 6 transition count 7
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 3 with 1 rules applied. Total rules applied 27 place count 6 transition count 6
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 2 rules applied. Total rules applied 29 place count 5 transition count 5
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 31 place count 4 transition count 4
Applied a total of 31 rules in 4 ms. Remains 4 /22 variables (removed 18) and now considering 4/20 (removed 16) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 4/22 places, 4/20 transitions.
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:10:25] [INFO ] Flatten gal took : 0 ms
[2023-03-10 11:10:25] [INFO ] Input system was already deterministic with 4 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 20/20 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 22 transition count 15
Reduce places removed 7 places and 0 transitions.
Graph (trivial) has 11 edges and 15 vertex of which 9 / 15 are part of one of the 3 SCC in 0 ms
Free SCC test removed 6 places
Iterating post reduction 1 with 8 rules applied. Total rules applied 13 place count 9 transition count 15
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 20 place count 8 transition count 9
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 20 place count 8 transition count 8
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 22 place count 7 transition count 8
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 24 place count 6 transition count 7
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 3 with 2 rules applied. Total rules applied 26 place count 6 transition count 5
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 26 place count 6 transition count 3
Deduced a syphon composed of 2 places in 0 ms
Application raised an uncaught exception Index 100 out of bounds for length 4
java.lang.IndexOutOfBoundsException: Index 100 out of bounds for length 4
at java.base/jdk.internal.util.Preconditions.outOfBounds(Preconditions.java:64)
at java.base/jdk.internal.util.Preconditions.outOfBoundsCheckIndex(Preconditions.java:70)
at java.base/jdk.internal.util.Preconditions.checkIndex(Preconditions.java:266)
at java.base/java.util.Objects.checkIndex(Objects.java:359)
at java.base/java.util.ArrayList.get(ArrayList.java:427)
at fr.lip6.move.gal.structural.StructuralReduction.ensureUnique(StructuralReduction.java:916)
at fr.lip6.move.gal.structural.StructuralReduction.ruleReducePlaces(StructuralReduction.java:1056)
at fr.lip6.move.gal.structural.StructuralReduction.reduce(StructuralReduction.java:240)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:452)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:649)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
Total runtime 1101 ms.
starting LoLA
BK_INPUT FMS-PT-00100
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA FMS-PT-00100-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00100-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00100-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00100-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00100-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00100-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00100-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00100-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-00100-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678446771542

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 7 (type EXCL) for 6 FMS-PT-00100-CTLFireability-02
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 56 (type FNDP) for 37 FMS-PT-00100-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type EQUN) for 37 FMS-PT-00100-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SRCH) for 37 FMS-PT-00100-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 59 (type SRCH) for FMS-PT-00100-CTLFireability-11
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 56 (type FNDP) for FMS-PT-00100-CTLFireability-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 57 (type EQUN) for FMS-PT-00100-CTLFireability-11 (obsolete)
lola: FINISHED task # 57 (type EQUN) for FMS-PT-00100-CTLFireability-11
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 62 (type FNDP) for 50 FMS-PT-00100-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type EQUN) for 50 FMS-PT-00100-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type SRCH) for 50 FMS-PT-00100-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 65 (type SRCH) for FMS-PT-00100-CTLFireability-14
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 62 (type FNDP) for FMS-PT-00100-CTLFireability-14 (obsolete)
lola: CANCELED task # 63 (type EQUN) for FMS-PT-00100-CTLFireability-14 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: FINISHED task # 62 (type FNDP) for FMS-PT-00100-CTLFireability-14
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/CTLFireability-63.sara.

lola: FINISHED task # 63 (type EQUN) for FMS-PT-00100-CTLFireability-14
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00100-CTLFireability-14: AG false search / frozen tokens

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00100-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FMS-PT-00100-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
FMS-PT-00100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-11: CONJ 0 1 0 0 5 0 0 1
FMS-PT-00100-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-13: AGAF 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/225 9/32 FMS-PT-00100-CTLFireability-02 2199989 m, 439997 m/sec, 5877313 t fired, .

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FMS-PT-00100-CTLFireability-14: AG false search / frozen tokens

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00100-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FMS-PT-00100-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
FMS-PT-00100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-11: CONJ 0 1 0 0 5 0 0 1
FMS-PT-00100-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-13: AGAF 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/225 17/32 FMS-PT-00100-CTLFireability-02 4158734 m, 391749 m/sec, 11267127 t fired, .

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FMS-PT-00100-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FMS-PT-00100-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
FMS-PT-00100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-11: CONJ 0 1 0 0 5 0 0 1
FMS-PT-00100-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-13: AGAF 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 15/225 24/32 FMS-PT-00100-CTLFireability-02 5914657 m, 351184 m/sec, 16119553 t fired, .

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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-00100-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FMS-PT-00100-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
FMS-PT-00100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-11: CONJ 0 1 0 0 5 0 0 1
FMS-PT-00100-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-13: AGAF 0 1 0 0 1 0 0 0
FMS-PT-00100-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 20/225 31/32 FMS-PT-00100-CTLFireability-02 7563913 m, 329851 m/sec, 20743105 t fired, .

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FMS-PT-00100-CTLFireability-14: AG false search / frozen tokens

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10 CTL EXCL 5/585 15/32 FMS-PT-00100-CTLFireability-03 3463304 m, 692660 m/sec, 8534710 t fired, .

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10 CTL EXCL 10/585 30/32 FMS-PT-00100-CTLFireability-03 7125454 m, 732430 m/sec, 15356868 t fired, .

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4 CTL EXCL 15/699 31/32 FMS-PT-00100-CTLFireability-01 7378588 m, 549325 m/sec, 25652026 t fired, .

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1 CTL EXCL 10/868 18/32 FMS-PT-00100-CTLFireability-00 4258924 m, 409036 m/sec, 12256484 t fired, .

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1 CTL EXCL 15/868 26/32 FMS-PT-00100-CTLFireability-00 6279191 m, 404053 m/sec, 18106800 t fired, .

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-00100-CTLFireability-00: CTL unknown AGGR
FMS-PT-00100-CTLFireability-01: CTL unknown AGGR
FMS-PT-00100-CTLFireability-02: CTL unknown AGGR
FMS-PT-00100-CTLFireability-03: CTL unknown AGGR
FMS-PT-00100-CTLFireability-04: CTL true CTL model checker
FMS-PT-00100-CTLFireability-05: CTL unknown AGGR
FMS-PT-00100-CTLFireability-06: CTL true CTL model checker
FMS-PT-00100-CTLFireability-07: CONJ false CTL model checker
FMS-PT-00100-CTLFireability-08: CTL unknown AGGR
FMS-PT-00100-CTLFireability-09: CTL false CTL model checker
FMS-PT-00100-CTLFireability-10: CTL false CTL model checker
FMS-PT-00100-CTLFireability-11: CONJ true CONJ
FMS-PT-00100-CTLFireability-12: CTL unknown AGGR
FMS-PT-00100-CTLFireability-13: AGAF false state space /EFEG
FMS-PT-00100-CTLFireability-14: AG false search / frozen tokens
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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FMS-PT-00100"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is FMS-PT-00100, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r167-tall-167838852700226"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FMS-PT-00100.tgz
mv FMS-PT-00100 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;