Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r167-tall-167838852600154.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Eratosthenes-PT-050, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838852600154
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 496K
-rw-r--r-- 1 mcc users 5.6K Feb 25 11:53 CTLCardinality.txt
-rw-r--r-- 1 mcc users 57K Feb 25 11:53 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 11:52 CTLFireability.txt
-rw-r--r-- 1 mcc users 36K Feb 25 11:52 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 11:55 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 152K Feb 25 11:55 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Feb 25 11:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 63K Feb 25 11:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 50K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Eratosthenes-PT-050-CTLFireability-00
FORMULA_NAME Eratosthenes-PT-050-CTLFireability-01
FORMULA_NAME Eratosthenes-PT-050-CTLFireability-02
FORMULA_NAME Eratosthenes-PT-050-CTLFireability-03
FORMULA_NAME Eratosthenes-PT-050-CTLFireability-04
FORMULA_NAME Eratosthenes-PT-050-CTLFireability-05
FORMULA_NAME Eratosthenes-PT-050-CTLFireability-06
FORMULA_NAME Eratosthenes-PT-050-CTLFireability-07
FORMULA_NAME Eratosthenes-PT-050-CTLFireability-08
FORMULA_NAME Eratosthenes-PT-050-CTLFireability-09
FORMULA_NAME Eratosthenes-PT-050-CTLFireability-10
FORMULA_NAME Eratosthenes-PT-050-CTLFireability-11
FORMULA_NAME Eratosthenes-PT-050-CTLFireability-12
FORMULA_NAME Eratosthenes-PT-050-CTLFireability-13
FORMULA_NAME Eratosthenes-PT-050-CTLFireability-14
FORMULA_NAME Eratosthenes-PT-050-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678445701050

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Eratosthenes-PT-050
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 10:55:02] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 10:55:02] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 10:55:02] [INFO ] Load time of PNML (sax parser for PT used): 39 ms
[2023-03-10 10:55:02] [INFO ] Transformed 49 places.
[2023-03-10 10:55:02] [INFO ] Transformed 108 transitions.
[2023-03-10 10:55:02] [INFO ] Parsed PT model containing 49 places and 108 transitions and 324 arcs in 93 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 8 ms.
Reduce places removed 15 places and 0 transitions.
Ensure Unique test removed 28 transitions
Reduce redundant transitions removed 28 transitions.
Support contains 31 out of 34 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 34/34 places, 80/80 transitions.
Drop transitions removed 46 transitions
Redundant transition composition rules discarded 46 transitions
Iterating global reduction 0 with 46 rules applied. Total rules applied 46 place count 34 transition count 34
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 48 place count 32 transition count 32
Iterating global reduction 0 with 2 rules applied. Total rules applied 50 place count 32 transition count 32
Applied a total of 50 rules in 11 ms. Remains 32 /34 variables (removed 2) and now considering 32/80 (removed 48) transitions.
// Phase 1: matrix 32 rows 32 cols
[2023-03-10 10:55:02] [INFO ] Computed 0 place invariants in 4 ms
[2023-03-10 10:55:02] [INFO ] Implicit Places using invariants in 102 ms returned []
[2023-03-10 10:55:02] [INFO ] Invariant cache hit.
[2023-03-10 10:55:02] [INFO ] Implicit Places using invariants and state equation in 57 ms returned []
Implicit Place search using SMT with State Equation took 182 ms to find 0 implicit places.
[2023-03-10 10:55:02] [INFO ] Invariant cache hit.
[2023-03-10 10:55:02] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 32/34 places, 32/80 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 229 ms. Remains : 32/34 places, 32/80 transitions.
Support contains 31 out of 32 places after structural reductions.
[2023-03-10 10:55:02] [INFO ] Flatten gal took : 14 ms
[2023-03-10 10:55:02] [INFO ] Flatten gal took : 4 ms
[2023-03-10 10:55:02] [INFO ] Input system was already deterministic with 32 transitions.
Finished random walk after 35 steps, including 0 resets, run visited all 52 properties in 16 ms. (steps per millisecond=2 )
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 2 ms
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 3 ms
[2023-03-10 10:55:03] [INFO ] Input system was already deterministic with 32 transitions.
Computed a total of 32 stabilizing places and 32 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 32 transition count 32
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 2 formulas.
FORMULA Eratosthenes-PT-050-CTLFireability-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Eratosthenes-PT-050-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 32/32 transitions.
Discarding 25 places :
Symmetric choice reduction at 0 with 25 rule applications. Total rules 25 place count 7 transition count 7
Iterating global reduction 0 with 25 rules applied. Total rules applied 50 place count 7 transition count 7
Applied a total of 50 rules in 1 ms. Remains 7 /32 variables (removed 25) and now considering 7/32 (removed 25) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 7/32 places, 7/32 transitions.
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 32/32 transitions.
Discarding 21 places :
Symmetric choice reduction at 0 with 21 rule applications. Total rules 21 place count 11 transition count 11
Iterating global reduction 0 with 21 rules applied. Total rules applied 42 place count 11 transition count 11
Applied a total of 42 rules in 0 ms. Remains 11 /32 variables (removed 21) and now considering 11/32 (removed 21) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 11/32 places, 11/32 transitions.
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 1 ms
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 1 ms
[2023-03-10 10:55:03] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 32/32 transitions.
Graph (complete) has 0 edges and 32 vertex of which 14 are kept as prefixes of interest. Removing 18 places using SCC suffix rule.1 ms
Discarding 18 places :
Also discarding 18 output transitions
Drop transitions removed 18 transitions
Applied a total of 1 rules in 2 ms. Remains 14 /32 variables (removed 18) and now considering 14/32 (removed 18) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 14/32 places, 14/32 transitions.
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 1 ms
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 1 ms
[2023-03-10 10:55:03] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 32/32 transitions.
Graph (complete) has 0 edges and 32 vertex of which 2 are kept as prefixes of interest. Removing 30 places using SCC suffix rule.0 ms
Discarding 30 places :
Also discarding 30 output transitions
Drop transitions removed 30 transitions
Applied a total of 1 rules in 1 ms. Remains 2 /32 variables (removed 30) and now considering 2/32 (removed 30) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 2/32 places, 2/32 transitions.
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 32/32 transitions.
Graph (complete) has 0 edges and 32 vertex of which 5 are kept as prefixes of interest. Removing 27 places using SCC suffix rule.0 ms
Discarding 27 places :
Also discarding 27 output transitions
Drop transitions removed 27 transitions
Applied a total of 1 rules in 1 ms. Remains 5 /32 variables (removed 27) and now considering 5/32 (removed 27) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 5/32 places, 5/32 transitions.
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 1 ms
[2023-03-10 10:55:03] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 32/32 transitions.
Graph (complete) has 0 edges and 32 vertex of which 1 are kept as prefixes of interest. Removing 31 places using SCC suffix rule.0 ms
Discarding 31 places :
Also discarding 31 output transitions
Drop transitions removed 31 transitions
Applied a total of 1 rules in 1 ms. Remains 1 /32 variables (removed 31) and now considering 1/32 (removed 31) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 1/32 places, 1/32 transitions.
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Input system was already deterministic with 1 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 32/32 transitions.
Graph (complete) has 0 edges and 32 vertex of which 1 are kept as prefixes of interest. Removing 31 places using SCC suffix rule.0 ms
Discarding 31 places :
Also discarding 31 output transitions
Drop transitions removed 31 transitions
Applied a total of 1 rules in 1 ms. Remains 1 /32 variables (removed 31) and now considering 1/32 (removed 31) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 1/32 places, 1/32 transitions.
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Input system was already deterministic with 1 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 32/32 transitions.
Discarding 25 places :
Symmetric choice reduction at 0 with 25 rule applications. Total rules 25 place count 7 transition count 7
Iterating global reduction 0 with 25 rules applied. Total rules applied 50 place count 7 transition count 7
Applied a total of 50 rules in 1 ms. Remains 7 /32 variables (removed 25) and now considering 7/32 (removed 25) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 7/32 places, 7/32 transitions.
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 32/32 transitions.
Graph (complete) has 0 edges and 32 vertex of which 8 are kept as prefixes of interest. Removing 24 places using SCC suffix rule.0 ms
Discarding 24 places :
Also discarding 24 output transitions
Drop transitions removed 24 transitions
Applied a total of 1 rules in 0 ms. Remains 8 /32 variables (removed 24) and now considering 8/32 (removed 24) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 0 ms. Remains : 8/32 places, 8/32 transitions.
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 1 ms
[2023-03-10 10:55:03] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 32/32 transitions.
Discarding 21 places :
Symmetric choice reduction at 0 with 21 rule applications. Total rules 21 place count 11 transition count 11
Iterating global reduction 0 with 21 rules applied. Total rules applied 42 place count 11 transition count 11
Applied a total of 42 rules in 0 ms. Remains 11 /32 variables (removed 21) and now considering 11/32 (removed 21) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 11/32 places, 11/32 transitions.
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 32/32 transitions.
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 16 place count 16 transition count 16
Iterating global reduction 0 with 16 rules applied. Total rules applied 32 place count 16 transition count 16
Applied a total of 32 rules in 1 ms. Remains 16 /32 variables (removed 16) and now considering 16/32 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 16/32 places, 16/32 transitions.
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 1 ms
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 1 ms
[2023-03-10 10:55:03] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 32/32 transitions.
Discarding 26 places :
Symmetric choice reduction at 0 with 26 rule applications. Total rules 26 place count 6 transition count 6
Iterating global reduction 0 with 26 rules applied. Total rules applied 52 place count 6 transition count 6
Applied a total of 52 rules in 1 ms. Remains 6 /32 variables (removed 26) and now considering 6/32 (removed 26) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 6/32 places, 6/32 transitions.
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 32/32 transitions.
Graph (complete) has 0 edges and 32 vertex of which 2 are kept as prefixes of interest. Removing 30 places using SCC suffix rule.1 ms
Discarding 30 places :
Also discarding 30 output transitions
Drop transitions removed 30 transitions
Applied a total of 1 rules in 1 ms. Remains 2 /32 variables (removed 30) and now considering 2/32 (removed 30) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 2/32 places, 2/32 transitions.
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 1 ms
[2023-03-10 10:55:03] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 32/32 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 8 transition count 8
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 8 transition count 8
Applied a total of 48 rules in 0 ms. Remains 8 /32 variables (removed 24) and now considering 8/32 (removed 24) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/32 places, 8/32 transitions.
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 1 ms
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 0 ms
[2023-03-10 10:55:03] [INFO ] Input system was already deterministic with 8 transitions.
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 2 ms
[2023-03-10 10:55:03] [INFO ] Flatten gal took : 2 ms
[2023-03-10 10:55:03] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-10 10:55:03] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 32 places, 32 transitions and 32 arcs took 1 ms.
Total runtime 709 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Eratosthenes-PT-050
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
CTLFireability

FORMULA Eratosthenes-PT-050-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Eratosthenes-PT-050-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Eratosthenes-PT-050-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Eratosthenes-PT-050-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Eratosthenes-PT-050-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Eratosthenes-PT-050-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Eratosthenes-PT-050-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Eratosthenes-PT-050-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Eratosthenes-PT-050-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Eratosthenes-PT-050-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Eratosthenes-PT-050-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678445874547

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
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lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 43 (type SKEL/SRCH) for 15 Eratosthenes-PT-050-CTLFireability-05
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lola: result : false
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lola: fired transitions : 33
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lola: rewrite Frontend/Parser/formula_rewrite.k:787
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lola: FINISHED task # 45 (type SKEL/SRCH) for Eratosthenes-PT-050-CTLFireability-14
lola: result : false
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lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: rewrite Frontend/Parser/formula_rewrite.k:813
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lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
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lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: planning for Eratosthenes-PT-050-CTLFireability-14 stopped (result already fixed).
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lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
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lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 28 (type EXCL) for Eratosthenes-PT-050-CTLFireability-11
lola: result : true
lola: markings : 355588
lola: fired transitions : 2817918
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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40 CTL EXCL 4/399 4/32 Eratosthenes-PT-050-CTLFireability-15 779383 m, 155876 m/sec, 7322565 t fired, .

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40 CTL EXCL 9/399 7/32 Eratosthenes-PT-050-CTLFireability-15 1716551 m, 187433 m/sec, 17062633 t fired, .

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Eratosthenes-PT-050-CTLFireability-06: F true skeleton: state space / EG
Eratosthenes-PT-050-CTLFireability-08: CTL true CTL model checker
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Eratosthenes-PT-050-CTLFireability-14: F true skeleton: state space / EG

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/577 6/32 Eratosthenes-PT-050-CTLFireability-01 1479053 m, 295810 m/sec, 9474263 t fired, .

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Eratosthenes-PT-050-CTLFireability-08: CTL true CTL model checker
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4 CTL EXCL 10/577 12/32 Eratosthenes-PT-050-CTLFireability-01 2808010 m, 265791 m/sec, 18615641 t fired, .

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4 CTL EXCL 15/577 17/32 Eratosthenes-PT-050-CTLFireability-01 4023676 m, 243133 m/sec, 27459484 t fired, .

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4 CTL EXCL 20/577 22/32 Eratosthenes-PT-050-CTLFireability-01 5297512 m, 254767 m/sec, 36391327 t fired, .

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Eratosthenes-PT-050-CTLFireability-06: F true skeleton: state space / EG
Eratosthenes-PT-050-CTLFireability-08: CTL true CTL model checker
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4 CTL EXCL 25/577 27/32 Eratosthenes-PT-050-CTLFireability-01 6499529 m, 240403 m/sec, 45182546 t fired, .

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Eratosthenes-PT-050-CTLFireability-08: CTL true CTL model checker
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4 CTL EXCL 30/577 31/32 Eratosthenes-PT-050-CTLFireability-01 7669184 m, 233931 m/sec, 53945346 t fired, .

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Eratosthenes-PT-050-CTLFireability-06: F true skeleton: state space / EG
Eratosthenes-PT-050-CTLFireability-08: CTL true CTL model checker
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Eratosthenes-PT-050-CTLFireability-00: CTL true CTL model checker
Eratosthenes-PT-050-CTLFireability-01: CTL unknown AGGR
Eratosthenes-PT-050-CTLFireability-02: CTL false CTL model checker
Eratosthenes-PT-050-CTLFireability-03: CTL false CTL model checker
Eratosthenes-PT-050-CTLFireability-04: CTL false CTL model checker
Eratosthenes-PT-050-CTLFireability-05: F true skeleton: state space / EG
Eratosthenes-PT-050-CTLFireability-06: F true skeleton: state space / EG
Eratosthenes-PT-050-CTLFireability-08: CTL true CTL model checker
Eratosthenes-PT-050-CTLFireability-09: CTL true CTL model checker
Eratosthenes-PT-050-CTLFireability-11: CTL true CTL model checker
Eratosthenes-PT-050-CTLFireability-12: CTL true CTL model checker
Eratosthenes-PT-050-CTLFireability-13: CTL unknown AGGR
Eratosthenes-PT-050-CTLFireability-14: F true skeleton: state space / EG
Eratosthenes-PT-050-CTLFireability-15: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Eratosthenes-PT-050"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Eratosthenes-PT-050, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r167-tall-167838852600154"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Eratosthenes-PT-050.tgz
mv Eratosthenes-PT-050 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;