Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r167-tall-167838852500066.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Echo-PT-d02r15, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r167-tall-167838852500066
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 9.5K Feb 25 14:09 CTLCardinality.txt
-rw-r--r-- 1 mcc users 112K Feb 25 14:09 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.7K Feb 25 14:08 CTLFireability.txt
-rw-r--r-- 1 mcc users 39K Feb 25 14:08 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:03 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:03 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:03 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:03 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.6K Feb 25 14:12 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 101K Feb 25 14:12 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Feb 25 14:11 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 40K Feb 25 14:11 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:03 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:03 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 917K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Echo-PT-d02r15-CTLFireability-00
FORMULA_NAME Echo-PT-d02r15-CTLFireability-01
FORMULA_NAME Echo-PT-d02r15-CTLFireability-02
FORMULA_NAME Echo-PT-d02r15-CTLFireability-03
FORMULA_NAME Echo-PT-d02r15-CTLFireability-04
FORMULA_NAME Echo-PT-d02r15-CTLFireability-05
FORMULA_NAME Echo-PT-d02r15-CTLFireability-06
FORMULA_NAME Echo-PT-d02r15-CTLFireability-07
FORMULA_NAME Echo-PT-d02r15-CTLFireability-08
FORMULA_NAME Echo-PT-d02r15-CTLFireability-09
FORMULA_NAME Echo-PT-d02r15-CTLFireability-10
FORMULA_NAME Echo-PT-d02r15-CTLFireability-11
FORMULA_NAME Echo-PT-d02r15-CTLFireability-12
FORMULA_NAME Echo-PT-d02r15-CTLFireability-13
FORMULA_NAME Echo-PT-d02r15-CTLFireability-14
FORMULA_NAME Echo-PT-d02r15-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678435956955

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Echo-PT-d02r15
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 08:12:38] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 08:12:38] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 08:12:38] [INFO ] Load time of PNML (sax parser for PT used): 146 ms
[2023-03-10 08:12:38] [INFO ] Transformed 2127 places.
[2023-03-10 08:12:38] [INFO ] Transformed 1674 transitions.
[2023-03-10 08:12:38] [INFO ] Found NUPN structural information;
[2023-03-10 08:12:38] [INFO ] Parsed PT model containing 2127 places and 1674 transitions and 9700 arcs in 224 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 8 ms.
Support contains 239 out of 2127 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2127/2127 places, 1674/1674 transitions.
Reduce places removed 225 places and 0 transitions.
Iterating post reduction 0 with 225 rules applied. Total rules applied 225 place count 1902 transition count 1674
Applied a total of 225 rules in 193 ms. Remains 1902 /2127 variables (removed 225) and now considering 1674/1674 (removed 0) transitions.
// Phase 1: matrix 1674 rows 1902 cols
[2023-03-10 08:12:41] [INFO ] Computed 840 place invariants in 2092 ms
[2023-03-10 08:12:41] [INFO ] SMT solver returned unknown. Retrying;
[2023-03-10 08:12:42] [INFO ] Implicit Places using invariants in 3497 ms returned []
[2023-03-10 08:12:42] [INFO ] Invariant cache hit.
[2023-03-10 08:12:48] [INFO ] Implicit Places using invariants and state equation in 5889 ms returned []
Implicit Place search using SMT with State Equation took 9410 ms to find 0 implicit places.
[2023-03-10 08:12:48] [INFO ] Invariant cache hit.
[2023-03-10 08:12:52] [INFO ] Dead Transitions using invariants and state equation in 4510 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 1902/2127 places, 1674/1674 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14115 ms. Remains : 1902/2127 places, 1674/1674 transitions.
Support contains 239 out of 1902 places after structural reductions.
[2023-03-10 08:12:53] [INFO ] Flatten gal took : 192 ms
[2023-03-10 08:12:53] [INFO ] Flatten gal took : 117 ms
[2023-03-10 08:12:53] [INFO ] Input system was already deterministic with 1674 transitions.
Support contains 233 out of 1902 places (down from 239) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 22 resets, run finished after 546 ms. (steps per millisecond=18 ) properties (out of 69) seen :62
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 72 ms. (steps per millisecond=138 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 65 ms. (steps per millisecond=153 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 63 ms. (steps per millisecond=158 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 76 ms. (steps per millisecond=131 ) properties (out of 7) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 61 ms. (steps per millisecond=163 ) properties (out of 6) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 63 ms. (steps per millisecond=158 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 73 ms. (steps per millisecond=137 ) properties (out of 5) seen :1
Running SMT prover for 4 properties.
[2023-03-10 08:12:54] [INFO ] Invariant cache hit.
[2023-03-10 08:12:57] [INFO ] [Real]Absence check using 0 positive and 840 generalized place invariants in 2725 ms returned sat
[2023-03-10 08:12:58] [INFO ] After 3653ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-10 08:13:01] [INFO ] [Nat]Absence check using 0 positive and 840 generalized place invariants in 2895 ms returned sat
[2023-03-10 08:13:03] [INFO ] After 1698ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-10 08:13:04] [INFO ] After 2518ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 623 ms.
[2023-03-10 08:13:05] [INFO ] After 7063ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 60 ms.
Support contains 31 out of 1902 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Graph (complete) has 5685 edges and 1902 vertex of which 1893 are kept as prefixes of interest. Removing 9 places using SCC suffix rule.7 ms
Discarding 9 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 5 place count 1893 transition count 1669
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 1 with 1 rules applied. Total rules applied 6 place count 1892 transition count 1668
Applied a total of 6 rules in 169 ms. Remains 1892 /1902 variables (removed 10) and now considering 1668/1674 (removed 6) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 170 ms. Remains : 1892/1902 places, 1668/1674 transitions.
Incomplete random walk after 10000 steps, including 22 resets, run finished after 296 ms. (steps per millisecond=33 ) properties (out of 4) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 58 ms. (steps per millisecond=172 ) properties (out of 3) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 68 ms. (steps per millisecond=147 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 59 ms. (steps per millisecond=169 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
// Phase 1: matrix 1668 rows 1892 cols
[2023-03-10 08:13:07] [INFO ] Computed 832 place invariants in 1801 ms
[2023-03-10 08:13:10] [INFO ] [Real]Absence check using 0 positive and 832 generalized place invariants in 1822 ms returned sat
[2023-03-10 08:13:11] [INFO ] After 1093ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1 real:1
[2023-03-10 08:13:11] [INFO ] After 1296ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-10 08:13:11] [INFO ] After 3682ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-10 08:13:14] [INFO ] [Nat]Absence check using 0 positive and 832 generalized place invariants in 2135 ms returned sat
[2023-03-10 08:13:15] [INFO ] After 1497ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-10 08:13:16] [INFO ] After 1853ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 259 ms.
[2023-03-10 08:13:16] [INFO ] After 4754ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :2
Parikh walk visited 0 properties in 16 ms.
Support contains 17 out of 1892 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1892/1892 places, 1668/1668 transitions.
Applied a total of 0 rules in 78 ms. Remains 1892 /1892 variables (removed 0) and now considering 1668/1668 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 78 ms. Remains : 1892/1892 places, 1668/1668 transitions.
Incomplete random walk after 10000 steps, including 22 resets, run finished after 156 ms. (steps per millisecond=64 ) properties (out of 2) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 60 ms. (steps per millisecond=166 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-10 08:13:16] [INFO ] Invariant cache hit.
[2023-03-10 08:13:18] [INFO ] [Real]Absence check using 0 positive and 832 generalized place invariants in 1772 ms returned sat
[2023-03-10 08:13:19] [INFO ] After 987ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-10 08:13:20] [INFO ] After 1184ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 147 ms.
[2023-03-10 08:13:20] [INFO ] After 3505ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-10 08:13:22] [INFO ] [Nat]Absence check using 0 positive and 832 generalized place invariants in 1686 ms returned sat
[2023-03-10 08:13:23] [INFO ] After 1050ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-10 08:13:23] [INFO ] After 1228ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 125 ms.
[2023-03-10 08:13:23] [INFO ] After 3444ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 5 ms.
Support contains 7 out of 1892 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1892/1892 places, 1668/1668 transitions.
Applied a total of 0 rules in 64 ms. Remains 1892 /1892 variables (removed 0) and now considering 1668/1668 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 64 ms. Remains : 1892/1892 places, 1668/1668 transitions.
Finished random walk after 2060 steps, including 4 resets, run visited all 1 properties in 29 ms. (steps per millisecond=71 )
[2023-03-10 08:13:23] [INFO ] Flatten gal took : 75 ms
[2023-03-10 08:13:23] [INFO ] Flatten gal took : 79 ms
[2023-03-10 08:13:24] [INFO ] Input system was already deterministic with 1674 transitions.
Computed a total of 1902 stabilizing places and 1674 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1902 transition count 1674
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 119 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 119 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2023-03-10 08:13:24] [INFO ] Flatten gal took : 65 ms
[2023-03-10 08:13:24] [INFO ] Flatten gal took : 76 ms
[2023-03-10 08:13:24] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 41 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2023-03-10 08:13:24] [INFO ] Flatten gal took : 64 ms
[2023-03-10 08:13:24] [INFO ] Flatten gal took : 68 ms
[2023-03-10 08:13:24] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 47 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 48 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2023-03-10 08:13:24] [INFO ] Flatten gal took : 62 ms
[2023-03-10 08:13:25] [INFO ] Flatten gal took : 63 ms
[2023-03-10 08:13:25] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Graph (complete) has 5685 edges and 1902 vertex of which 1897 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.10 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 84 ms. Remains 1896 /1902 variables (removed 6) and now considering 1672/1674 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 84 ms. Remains : 1896/1902 places, 1672/1674 transitions.
[2023-03-10 08:13:25] [INFO ] Flatten gal took : 60 ms
[2023-03-10 08:13:25] [INFO ] Flatten gal took : 67 ms
[2023-03-10 08:13:25] [INFO ] Input system was already deterministic with 1672 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 45 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 47 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2023-03-10 08:13:25] [INFO ] Flatten gal took : 60 ms
[2023-03-10 08:13:25] [INFO ] Flatten gal took : 66 ms
[2023-03-10 08:13:25] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 46 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 46 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2023-03-10 08:13:25] [INFO ] Flatten gal took : 58 ms
[2023-03-10 08:13:25] [INFO ] Flatten gal took : 64 ms
[2023-03-10 08:13:26] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Graph (complete) has 5685 edges and 1902 vertex of which 1897 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.5 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 73 ms. Remains 1896 /1902 variables (removed 6) and now considering 1672/1674 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 74 ms. Remains : 1896/1902 places, 1672/1674 transitions.
[2023-03-10 08:13:26] [INFO ] Flatten gal took : 57 ms
[2023-03-10 08:13:26] [INFO ] Flatten gal took : 63 ms
[2023-03-10 08:13:26] [INFO ] Input system was already deterministic with 1672 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 47 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 47 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2023-03-10 08:13:26] [INFO ] Flatten gal took : 58 ms
[2023-03-10 08:13:26] [INFO ] Flatten gal took : 65 ms
[2023-03-10 08:13:26] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Graph (complete) has 5685 edges and 1902 vertex of which 1897 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.5 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 73 ms. Remains 1896 /1902 variables (removed 6) and now considering 1672/1674 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 73 ms. Remains : 1896/1902 places, 1672/1674 transitions.
[2023-03-10 08:13:26] [INFO ] Flatten gal took : 58 ms
[2023-03-10 08:13:26] [INFO ] Flatten gal took : 64 ms
[2023-03-10 08:13:27] [INFO ] Input system was already deterministic with 1672 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 45 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 46 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2023-03-10 08:13:27] [INFO ] Flatten gal took : 55 ms
[2023-03-10 08:13:27] [INFO ] Flatten gal took : 60 ms
[2023-03-10 08:13:27] [INFO ] Input system was already deterministic with 1674 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Graph (complete) has 5685 edges and 1902 vertex of which 1897 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.4 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 66 ms. Remains 1896 /1902 variables (removed 6) and now considering 1672/1674 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 67 ms. Remains : 1896/1902 places, 1672/1674 transitions.
[2023-03-10 08:13:27] [INFO ] Flatten gal took : 57 ms
[2023-03-10 08:13:27] [INFO ] Flatten gal took : 60 ms
[2023-03-10 08:13:27] [INFO ] Input system was already deterministic with 1672 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Graph (complete) has 5685 edges and 1902 vertex of which 1897 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.2 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 63 ms. Remains 1896 /1902 variables (removed 6) and now considering 1672/1674 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 64 ms. Remains : 1896/1902 places, 1672/1674 transitions.
[2023-03-10 08:13:27] [INFO ] Flatten gal took : 56 ms
[2023-03-10 08:13:27] [INFO ] Flatten gal took : 60 ms
[2023-03-10 08:13:27] [INFO ] Input system was already deterministic with 1672 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Graph (complete) has 5685 edges and 1902 vertex of which 1897 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.3 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 61 ms. Remains 1896 /1902 variables (removed 6) and now considering 1672/1674 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 61 ms. Remains : 1896/1902 places, 1672/1674 transitions.
[2023-03-10 08:13:28] [INFO ] Flatten gal took : 56 ms
[2023-03-10 08:13:28] [INFO ] Flatten gal took : 59 ms
[2023-03-10 08:13:28] [INFO ] Input system was already deterministic with 1672 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Graph (complete) has 5685 edges and 1902 vertex of which 1897 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.3 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 60 ms. Remains 1896 /1902 variables (removed 6) and now considering 1672/1674 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 61 ms. Remains : 1896/1902 places, 1672/1674 transitions.
[2023-03-10 08:13:28] [INFO ] Flatten gal took : 56 ms
[2023-03-10 08:13:28] [INFO ] Flatten gal took : 59 ms
[2023-03-10 08:13:28] [INFO ] Input system was already deterministic with 1672 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Graph (complete) has 5685 edges and 1902 vertex of which 1897 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.3 ms
Discarding 5 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 74 ms. Remains 1896 /1902 variables (removed 6) and now considering 1672/1674 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 74 ms. Remains : 1896/1902 places, 1672/1674 transitions.
[2023-03-10 08:13:28] [INFO ] Flatten gal took : 59 ms
[2023-03-10 08:13:28] [INFO ] Flatten gal took : 64 ms
[2023-03-10 08:13:28] [INFO ] Input system was already deterministic with 1672 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1902/1902 places, 1674/1674 transitions.
Applied a total of 0 rules in 46 ms. Remains 1902 /1902 variables (removed 0) and now considering 1674/1674 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 46 ms. Remains : 1902/1902 places, 1674/1674 transitions.
[2023-03-10 08:13:28] [INFO ] Flatten gal took : 55 ms
[2023-03-10 08:13:29] [INFO ] Flatten gal took : 58 ms
[2023-03-10 08:13:29] [INFO ] Input system was already deterministic with 1674 transitions.
[2023-03-10 08:13:29] [INFO ] Flatten gal took : 59 ms
[2023-03-10 08:13:29] [INFO ] Flatten gal took : 60 ms
[2023-03-10 08:13:29] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-10 08:13:29] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 1902 places, 1674 transitions and 8863 arcs took 11 ms.
Total runtime 50990 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Echo-PT-d02r15
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA Echo-PT-d02r15-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r15-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r15-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r15-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r15-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r15-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r15-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r15-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Echo-PT-d02r15-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 9471684 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16096860 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 1 (type CNST) for 0 Echo-PT-d02r15-CTLFireability-00
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 1 (type CNST) for Echo-PT-d02r15-CTLFireability-00
lola: result : true
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 28 (type EXCL) for 21 Echo-PT-d02r15-CTLFireability-03
lola: time limit : 132 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 28 (type EXCL) for Echo-PT-d02r15-CTLFireability-03
lola: result : false
lola: markings : 450
lola: fired transitions : 915
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 58 (type EXCL) for 57 Echo-PT-d02r15-CTLFireability-07
lola: time limit : 138 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:736
lola: rewrite Frontend/Parser/formula_rewrite.k:696
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:662
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 105 (type FNDP) for 32 Echo-PT-d02r15-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 106 (type EQUN) for 32 Echo-PT-d02r15-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 110 (type SRCH) for 32 Echo-PT-d02r15-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 110 (type SRCH) for Echo-PT-d02r15-CTLFireability-04
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 123 (type FNDP) for 60 Echo-PT-d02r15-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 105 (type FNDP) for Echo-PT-d02r15-CTLFireability-04
lola: result : true
lola: fired transitions : 12
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 106 (type EQUN) for Echo-PT-d02r15-CTLFireability-04 (obsolete)
lola: LAUNCH task # 100 (type FNDP) for 32 Echo-PT-d02r15-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 101 (type EQUN) for 32 Echo-PT-d02r15-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 123 (type FNDP) for Echo-PT-d02r15-CTLFireability-08
lola: result : true
lola: fired transitions : 10
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 127 (type FNDP) for 21 Echo-PT-d02r15-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 100 (type FNDP) for Echo-PT-d02r15-CTLFireability-04
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 101 (type EQUN) for Echo-PT-d02r15-CTLFireability-04 (obsolete)
lola: LAUNCH task # 128 (type EQUN) for 21 Echo-PT-d02r15-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 130 (type SRCH) for 21 Echo-PT-d02r15-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 127 (type FNDP) for Echo-PT-d02r15-CTLFireability-03
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 128 (type EQUN) for Echo-PT-d02r15-CTLFireability-03 (obsolete)
lola: CANCELED task # 130 (type SRCH) for Echo-PT-d02r15-CTLFireability-03 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/375/CTLFireability-106.sara.
sara: try reading problem file /home/mcc/execution/375/CTLFireability-101.sara.
sara: try reading problem file /home/mcc/execution/375/CTLFireability-128.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 101 (type EQUN) for Echo-PT-d02r15-CTLFireability-04
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Echo-PT-d02r15-CTLFireability-00: INITIAL true preprocessing
Echo-PT-d02r15-CTLFireability-08: CONJ false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Echo-PT-d02r15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-02: DISJ 0 4 0 0 4 0 0 0
Echo-PT-d02r15-CTLFireability-03: DISJ 0 1 0 0 5 0 0 3
Echo-PT-d02r15-CTLFireability-04: DISJ 0 1 0 0 9 0 0 9
Echo-PT-d02r15-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-09: CONJ 0 3 0 0 3 0 0 0
Echo-PT-d02r15-CTLFireability-10: EFAG 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-11: ER 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-14: AFAG 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 3/188 2/32 Echo-PT-d02r15-CTLFireability-07 56599 m, 11319 m/sec, 344353 t fired, .

Time elapsed: 14 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Echo-PT-d02r15-CTLFireability-00: INITIAL true preprocessing
Echo-PT-d02r15-CTLFireability-08: CONJ false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Echo-PT-d02r15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-02: DISJ 0 4 0 0 4 0 0 0
Echo-PT-d02r15-CTLFireability-03: DISJ 0 1 0 0 5 0 0 3
Echo-PT-d02r15-CTLFireability-04: DISJ 0 1 0 0 9 0 0 9
Echo-PT-d02r15-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-09: CONJ 0 3 0 0 3 0 0 0
Echo-PT-d02r15-CTLFireability-10: EFAG 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-11: ER 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-14: AFAG 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 8/188 4/32 Echo-PT-d02r15-CTLFireability-07 177293 m, 24138 m/sec, 1151861 t fired, .

Time elapsed: 19 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Echo-PT-d02r15-CTLFireability-00: INITIAL true preprocessing
Echo-PT-d02r15-CTLFireability-08: CONJ false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Echo-PT-d02r15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-02: DISJ 0 4 0 0 4 0 0 0
Echo-PT-d02r15-CTLFireability-03: DISJ 0 1 0 0 5 0 0 3
Echo-PT-d02r15-CTLFireability-04: DISJ 0 1 0 0 9 0 0 9
Echo-PT-d02r15-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-09: CONJ 0 3 0 0 3 0 0 0
Echo-PT-d02r15-CTLFireability-10: EFAG 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-11: ER 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-14: AFAG 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 13/188 6/32 Echo-PT-d02r15-CTLFireability-07 299004 m, 24342 m/sec, 1963250 t fired, .

Time elapsed: 24 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Echo-PT-d02r15-CTLFireability-00: INITIAL true preprocessing
Echo-PT-d02r15-CTLFireability-08: CONJ false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Echo-PT-d02r15-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-02: DISJ 0 4 0 0 4 0 0 0
Echo-PT-d02r15-CTLFireability-03: DISJ 0 1 0 0 5 0 0 3
Echo-PT-d02r15-CTLFireability-04: DISJ 0 1 0 0 9 0 0 9
Echo-PT-d02r15-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-09: CONJ 0 3 0 0 3 0 0 0
Echo-PT-d02r15-CTLFireability-10: EFAG 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-11: ER 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-14: AFAG 0 1 0 0 1 0 0 0
Echo-PT-d02r15-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0

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52 CTL EXCL 10/206 5/32 Echo-PT-d02r15-CTLFireability-05 211941 m, 20741 m/sec, 1592520 t fired, .

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52 CTL EXCL 15/206 7/32 Echo-PT-d02r15-CTLFireability-05 316347 m, 20881 m/sec, 2393889 t fired, .

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52 CTL EXCL 20/206 9/32 Echo-PT-d02r15-CTLFireability-05 413744 m, 19479 m/sec, 3201388 t fired, .

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52 CTL EXCL 25/206 10/32 Echo-PT-d02r15-CTLFireability-05 512767 m, 19804 m/sec, 4003234 t fired, .

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52 CTL EXCL 30/206 12/32 Echo-PT-d02r15-CTLFireability-05 604380 m, 18322 m/sec, 4808567 t fired, .

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52 CTL EXCL 40/206 16/32 Echo-PT-d02r15-CTLFireability-05 785915 m, 19064 m/sec, 6425067 t fired, .

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30 CTL EXCL 10/1070 5/32 Echo-PT-d02r15-CTLFireability-03 216121 m, 21245 m/sec, 1625079 t fired, .

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Echo-PT-d02r15-CTLFireability-10: EFAG true tscc_search
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Echo-PT-d02r15-CTLFireability-10: EFAG true tscc_search
Echo-PT-d02r15-CTLFireability-11: ER true state space /ER
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