MCC'2023- Execution of r166-tall-167838851200066

About the Execution of LoLA for Echo-PT-d02r15

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
2312.147	591222.00	598574.00	1165.40	?FT????FFTTT?F?T	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input
Waiting for the VM to be
.................................
===========
Generated by BenchKit 2-5348
Executing tool lola
Input is Echo-PT-d02r15,
Time confinement is
Memory confinement is
Number of cores is 4
Run identifier is r166-tall-1
=================================

--------------------
preparation of the directory
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 9.5K
-rw-r--r-- 1 mcc users 112K
-rw-r--r-- 1 mcc users 4.7K
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 4.2K
-rw-r--r-- 1 mcc users 5.9K
-rw-r--r-- 1 mcc users 3.7K
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 2.2K
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 9.6K
-rw-r--r-- 1 mcc users 101K
-rw-r--r-- 1 mcc users 5.4K
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 1.6K
-rw-r--r-- 1 mcc users 3.6K
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 917K Mar

--------------------
content from stdout:

=== Data for post analysis

The expected result is a
BOOL_VECTOR

here is the order used to
FORMULA_NAME Echo-PT-d02r15-CTLFi
FORMULA_NAME Echo-PT-d02r15-CTLFi
FORMULA_NAME Echo-PT-d02r15-CTLFi
FORMULA_NAME Echo-PT-d02r15-CTLFi
FORMULA_NAME Echo-PT-d02r15-CTLFi
FORMULA_NAME Echo-PT-d02r15-CTLFi
FORMULA_NAME Echo-PT-d02r15-CTLFi
FORMULA_NAME Echo-PT-d02r15-CTLFi
FORMULA_NAME Echo-PT-d02r15-CTLFi
FORMULA_NAME Echo-PT-d02r15-CTLFi
FORMULA_NAME Echo-PT-d02r15-CTLFi
FORMULA_NAME Echo-PT-d02r15-CTLFi
FORMULA_NAME Echo-PT-d02r15-CTLFi
FORMULA_NAME Echo-PT-d02r15-CTLFi
FORMULA_NAME Echo-PT-d02r15-CTLFi
FORMULA_NAME Echo-PT-d02r15-CTLFi

=== Now, execution of the

BK_START 1678411070021

bash -c /home/mcc/BenchKit/BenchKit_head.sh
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bi
BK_TIME_CONFINEMENT=3600
BK_INPUT=Echo-PT-d02r15
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT Echo-PT-d02r15
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit
current directory: /home/mcc/exec
CTLFireability

FORMULA Echo-PT-d02r15-CTLFireability-08

FORMULA Echo-PT-d02r15-CTLFireability-07

FORMULA Echo-PT-d02r15-CTLFireability-02

FORMULA Echo-PT-d02r15-CTLFireability-01

FORMULA Echo-PT-d02r15-CTLFireability-09

FORMULA Echo-PT-d02r15-CTLFireability-15

FORMULA Echo-PT-d02r15-CTLFireability-10

FORMULA Echo-PT-d02r15-CTLFireability-11

FORMULA Echo-PT-d02r15-CTLFireability-13

BK_STOP 1678411661243

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file
lola: reading net from
lola: reading pnml
lola: PNML file contains
lola: finished parsing
lola: closed net file
lola: Reading formula.
lola: Using XML format
lola: reading XML formula
lola: reading formula
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Rule S: 0 transitions
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: rewrite Frontend/Parser/f
lola: LAUNCH task # 17
lola: time limit : 102 sec
lola: memory limit: 32 pages
lola: FINISHED task #
lola: result
lola: time used :
lola: memory pages used :
lola: Created skeleton
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: LAUNCH task # 5
lola: time limit : 108 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: Created skeleton
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: LAUNCH task # 99
lola: time limit :
lola: memory limit: 5 pages
lola: LAUNCH task # 100
lola: time limit :
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: LAUNCH task # 102
lola: time limit :
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: FINISHED task #
lola: result
lola: time used :
lola: memory pages used :
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
sara: try reading problem
lola: FINISHED task #
lola: result
lola: tried executions :
lola: time used :
lola: memory pages used :
lola: CANCELED task #
lola: Created skeleton
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
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lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: LAUNCH task # 108
lola: time limit :
lola: memory limit: 5 pages
lola: LAUNCH task # 110
lola: time limit :
lola: memory limit: 5 pages
lola: LAUNCH task # 113
lola: time limit :
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: FINISHED task #
lola: result
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 109
lola: time limit :
lola: memory limit: 5 pages
lola: FINISHED task #
lola: result
lola: tried executions :
lola: time used :
lola: memory pages used :
lola: CANCELED task #
lola: LAUNCH task # 106
lola: time limit :
lola: memory limit: 5 pages
lola: LAUNCH task # 112
lola: time limit :
lola: memory limit: 5 pages
lola: Created skeleton
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
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lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: FINISHED task #
lola: result
lola: fired transitions :
lola: tried executions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 118
lola: time limit :
lola: memory limit: 5 pages
lola: FINISHED task #
lola: result
lola: fired transitions :
lola: tried executions :
lola: time used :
lola: memory pages used :
lola: CANCELED task #
lola: CANCELED task #
sara: try reading problem
lola: FINISHED task #
lola: result
lola: time used :
lola: memory pages used :
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: rewrite Frontend/Parser/f
lola: Created skeleton
sara: try reading problem
lola: Created skeleton
lola: Created skeleton
sara: place or transition
sara: place or transition
sara: place or transition
FINISHED FORMULA: CATEGORY
Echo-PT-d02r15-CTLFireability-08:

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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-09:
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Echo-PT-d02r15-CTLFireability-11:
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-04:
Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
Echo-PT-d02r15-CTLFireability-09:
Echo-PT-d02r15-CTLFireability-10:
Echo-PT-d02r15-CTLFireability-11:
Echo-PT-d02r15-CTLFireability-12:
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Echo-PT-d02r15-CTLFireability-04:
Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
Echo-PT-d02r15-CTLFireability-09:
Echo-PT-d02r15-CTLFireability-10:
Echo-PT-d02r15-CTLFireability-11:
Echo-PT-d02r15-CTLFireability-12:
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Echo-PT-d02r15-CTLFireability-04:
Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
Echo-PT-d02r15-CTLFireability-09:
Echo-PT-d02r15-CTLFireability-10:
Echo-PT-d02r15-CTLFireability-11:
Echo-PT-d02r15-CTLFireability-12:
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Echo-PT-d02r15-CTLFireability-04:
Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
Echo-PT-d02r15-CTLFireability-09:
Echo-PT-d02r15-CTLFireability-10:
Echo-PT-d02r15-CTLFireability-11:
Echo-PT-d02r15-CTLFireability-12:
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Echo-PT-d02r15-CTLFireability-04:
Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
Echo-PT-d02r15-CTLFireability-09:
Echo-PT-d02r15-CTLFireability-10:
Echo-PT-d02r15-CTLFireability-11:
Echo-PT-d02r15-CTLFireability-12:
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Echo-PT-d02r15-CTLFireability-04:
Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
Echo-PT-d02r15-CTLFireability-09:
Echo-PT-d02r15-CTLFireability-10:
Echo-PT-d02r15-CTLFireability-11:
Echo-PT-d02r15-CTLFireability-12:
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Echo-PT-d02r15-CTLFireability-04:
Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
Echo-PT-d02r15-CTLFireability-09:
Echo-PT-d02r15-CTLFireability-10:
Echo-PT-d02r15-CTLFireability-11:
Echo-PT-d02r15-CTLFireability-12:
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Echo-PT-d02r15-CTLFireability-04:
Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
Echo-PT-d02r15-CTLFireability-09:
Echo-PT-d02r15-CTLFireability-10:
Echo-PT-d02r15-CTLFireability-11:
Echo-PT-d02r15-CTLFireability-12:
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Echo-PT-d02r15-CTLFireability-04:
Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
Echo-PT-d02r15-CTLFireability-09:
Echo-PT-d02r15-CTLFireability-10:
Echo-PT-d02r15-CTLFireability-11:
Echo-PT-d02r15-CTLFireability-12:
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Echo-PT-d02r15-CTLFireability-04:
Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-10:
Echo-PT-d02r15-CTLFireability-11:
Echo-PT-d02r15-CTLFireability-12:
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Echo-PT-d02r15-CTLFireability-01:
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Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
Echo-PT-d02r15-CTLFireability-10:
Echo-PT-d02r15-CTLFireability-11:
Echo-PT-d02r15-CTLFireability-12:
Echo-PT-d02r15-CTLFireability-13:
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Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
Echo-PT-d02r15-CTLFireability-10:
Echo-PT-d02r15-CTLFireability-11:
Echo-PT-d02r15-CTLFireability-12:
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Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
Echo-PT-d02r15-CTLFireability-10:
Echo-PT-d02r15-CTLFireability-11:
Echo-PT-d02r15-CTLFireability-12:
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Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
Echo-PT-d02r15-CTLFireability-10:
Echo-PT-d02r15-CTLFireability-11:
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Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
Echo-PT-d02r15-CTLFireability-10:
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Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-06: SP ECTL
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Echo-PT-d02r15-CTLFireability-13:
Echo-PT-d02r15-CTLFireability-14:

TASK CATEGORY TYPE TIME/TLIMIT
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PENDING FORMULAS: CATEGORY
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Echo-PT-d02r15-CTLFireability-04:
Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
Echo-PT-d02r15-CTLFireability-12:
Echo-PT-d02r15-CTLFireability-13:
Echo-PT-d02r15-CTLFireability-14:

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PENDING FORMULAS: CATEGORY
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Echo-PT-d02r15-CTLFireability-04:
Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06: SP ECTL
Echo-PT-d02r15-CTLFireability-12:
Echo-PT-d02r15-CTLFireability-13:
Echo-PT-d02r15-CTLFireability-14:

TASK CATEGORY TYPE TIME/TLIMIT

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lola: result
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FINAL RESULTS
FINISHED FORMULA: CATEGORY
Echo-PT-d02r15-CTLFireability-00:
Echo-PT-d02r15-CTLFireability-01:
Echo-PT-d02r15-CTLFireability-02:
Echo-PT-d02r15-CTLFireability-03:
Echo-PT-d02r15-CTLFireability-04:
Echo-PT-d02r15-CTLFireability-05:
Echo-PT-d02r15-CTLFireability-06:
Echo-PT-d02r15-CTLFireability-07:
Echo-PT-d02r15-CTLFireability-08:
Echo-PT-d02r15-CTLFireability-09:
Echo-PT-d02r15-CTLFireability-10:
Echo-PT-d02r15-CTLFireability-11:
Echo-PT-d02r15-CTLFireability-12:
Echo-PT-d02r15-CTLFireability-13:
Echo-PT-d02r15-CTLFireability-14:
Echo-PT-d02r15-CTLFireability-15:

Time elapsed: 591 secs.
.r166-tall-167838851200066.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16 ready (probing ssh) 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========================================================== examination is CTLFireability 3600 seconds 16384 MBytes 67838851200066 ==================================== to be used: Feb 25 14:09 CTLCardinality.txt Feb 25 14:09 CTLCardinality.xml Feb 25 14:08 CTLFireability.txt 39K Feb 25 14:08 CTLFireability.xml Jan 29 11:40 GenericPropertiesDefinition.xml Jan 29 11:40 GenericPropertiesVerdict.xml Feb 25 16:03 LTLCardinality.txt 26K Feb 25 16:03 LTLCardinality.xml Feb 25 16:03 LTLFireability.txt 17K Feb 25 16:03 LTLFireability.xml Feb 25 14:12 ReachabilityCardinality.txt Feb 25 14:12 ReachabilityCardinality.xml Feb 25 14:11 ReachabilityFireability.txt 40K Feb 25 14:11 ReachabilityFireability.xml Feb 25 16:03 UpperBounds.txt Feb 25 16:03 UpperBounds.xml 6 Mar 5 18:22 equiv_col 7 Mar 5 18:22 instance 6 Mar 5 18:22 iscolored 5 18:22 model.pnml generated by BenchKit (invocation template) vector of booleans build the result vector(from text file) reability-00 reability-01 reability-02 reability-03 reability-04 reability-05 reability-06 reability-07 reability-08 reability-09 reability-10 reability-11 reability-12 reability-13 reability-14 reability-15 tool begins 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N n/ /bin//../lola/bin/ ution FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT (--pnmlnet) /home/mcc/execution/model.pnml place/transition net /home/mcc/execution/model.pnml (--xmlformula) from /home/mcc/execution/CTLFireability.xml ormula_rewrite.k:439 ormula_rewrite.k:250 ormula_rewrite.k:439 ormula_rewrite.k:553 ormula_rewrite.k:391 ormula_rewrite.k:460 ormula_rewrite.k:550 ormula_rewrite.k:550 ormula_rewrite.k:317 ormula_rewrite.k:322 ormula_rewrite.k:328 ormula_rewrite.k:296 ormula_rewrite.k:296 ormula_rewrite.k:325 ormula_rewrite.k:328 ormula_rewrite.k:314 ormula_rewrite.k:325 ormula_rewrite.k:331 ormula_rewrite.k:299 ormula_rewrite.k:299 ormula_rewrite.k:322 ormula_rewrite.k:334 ormula_rewrite.k:296 ormula_rewrite.k:457 ormula_rewrite.k:544 ormula_rewrite.k:397 ormula_rewrite.k:445 ormula_rewrite.k:469 ormula_rewrite.k:250 ormula_rewrite.k:550 ormula_rewrite.k:454 ormula_rewrite.k:317 ormula_rewrite.k:296 ormula_rewrite.k:325 ormula_rewrite.k:331 ormula_rewrite.k:296 ormula_rewrite.k:544 ormula_rewrite.k:388 ormula_rewrite.k:391 ormula_rewrite.k:317 ormula_rewrite.k:322 ormula_rewrite.k:331 ormula_rewrite.k:296 ormula_rewrite.k:296 ormula_rewrite.k:322 ormula_rewrite.k:331 ormula_rewrite.k:296 ormula_rewrite.k:322 ormula_rewrite.k:328 ormula_rewrite.k:325 ormula_rewrite.k:331 ormula_rewrite.k:296 ormula_rewrite.k:322 ormula_rewrite.k:337 ormula_rewrite.k:296 ormula_rewrite.k:296 ormula_rewrite.k:325 ormula_rewrite.k:331 ormula_rewrite.k:296 ormula_rewrite.k:250 ormula_rewrite.k:322 ormula_rewrite.k:331 ormula_rewrite.k:322 ormula_rewrite.k:328 ormula_rewrite.k:296 ormula_rewrite.k:325 ormula_rewrite.k:331 ormula_rewrite.k:325 ormula_rewrite.k:328 ormula_rewrite.k:325 ormula_rewrite.k:331 ormula_rewrite.k:299 ormula_rewrite.k:322 ormula_rewrite.k:334 ormula_rewrite.k:296 ormula_rewrite.k:553 ormula_rewrite.k:460 ormula_rewrite.k:253 ormula_rewrite.k:457 ormula_rewrite.k:322 ormula_rewrite.k:328 ormula_rewrite.k:325 ormula_rewrite.k:331 ormula_rewrite.k:296 ormula_rewrite.k:451 in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. removed,0 places removed in 1.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 1.000000 secs. in 0.000000 secs. in 1.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. ormula_rewrite.k:812 (type EXCL) for 10 Echo-PT-d02r15-CTLFireability-02 17 (type EXCL) for Echo-PT-d02r15-CTLFireability-02 : true 0.000000 1 in 0.000000 secs. ormula_rewrite.k:812 ormula_rewrite.k:811 ormula_rewrite.k:807 ormula_rewrite.k:814 ormula_rewrite.k:808 ormula_rewrite.k:806 (type EXCL) for 0 Echo-PT-d02r15-CTLFireability-00 ormula_rewrite.k:807 ormula_rewrite.k:811 ormula_rewrite.k:812 ormula_rewrite.k:808 ormula_rewrite.k:813 ormula_rewrite.k:808 ormula_rewrite.k:806 ormula_rewrite.k:813 ormula_rewrite.k:812 ormula_rewrite.k:808 ormula_rewrite.k:811 ormula_rewrite.k:813 ormula_rewrite.k:811 ormula_rewrite.k:813 ormula_rewrite.k:806 ormula_rewrite.k:811 ormula_rewrite.k:726 ormula_rewrite.k:788 ormula_rewrite.k:726 ormula_rewrite.k:788 in 0.000000 secs. ormula_rewrite.k:721 ormula_rewrite.k:787 ormula_rewrite.k:806 ormula_rewrite.k:814 ormula_rewrite.k:809 ormula_rewrite.k:812 ormula_rewrite.k:807 ormula_rewrite.k:813 ormula_rewrite.k:736 ormula_rewrite.k:696 ormula_rewrite.k:721 ormula_rewrite.k:787 ormula_rewrite.k:721 ormula_rewrite.k:787 ormula_rewrite.k:811 ormula_rewrite.k:812 ormula_rewrite.k:811 ormula_rewrite.k:807 (type FNDP) for 25 Echo-PT-d02r15-CTLFireability-03 32000000 sec (type EQUN) for 25 Echo-PT-d02r15-CTLFireability-03 32000000 sec ormula_rewrite.k:721 ormula_rewrite.k:787 (type SRCH) for 25 Echo-PT-d02r15-CTLFireability-03 32000000 sec ormula_rewrite.k:659 ormula_rewrite.k:661 ormula_rewrite.k:666 ormula_rewrite.k:668 ormula_rewrite.k:659 ormula_rewrite.k:661 ormula_rewrite.k:812 ormula_rewrite.k:668 ormula_rewrite.k:679 ormula_rewrite.k:679 102 (type SRCH) for Echo-PT-d02r15-CTLFireability-03 : unknown 0.000000 1 ormula_rewrite.k:814 ormula_rewrite.k:813 ormula_rewrite.k:806 ormula_rewrite.k:812 ormula_rewrite.k:814 ormula_rewrite.k:806 ormula_rewrite.k:811 ormula_rewrite.k:813 ormula_rewrite.k:812 ormula_rewrite.k:812 ormula_rewrite.k:811 ormula_rewrite.k:809 file /home/mcc/execution/CTLFireability-100.sara. 99 (type FNDP) for Echo-PT-d02r15-CTLFireability-03 : true 1 0.000000 0 100 (type EQUN) for Echo-PT-d02r15-CTLFireability-03 (obsolete) in 0.000000 secs. ormula_rewrite.k:813 ormula_rewrite.k:811 ormula_rewrite.k:813 ormula_rewrite.k:721 ormula_rewrite.k:787 ormula_rewrite.k:711 ormula_rewrite.k:721 ormula_rewrite.k:787 ormula_rewrite.k:721 ormula_rewrite.k:788 ormula_rewrite.k:721 ormula_rewrite.k:787 ormula_rewrite.k:813 ormula_rewrite.k:811 ormula_rewrite.k:811 ormula_rewrite.k:811 ormula_rewrite.k:721 ormula_rewrite.k:788 (type FNDP) for 36 Echo-PT-d02r15-CTLFireability-04 32000000 sec (type EQUN) for 36 Echo-PT-d02r15-CTLFireability-04 32000000 sec (type SRCH) for 36 Echo-PT-d02r15-CTLFireability-04 32000000 sec ormula_rewrite.k:721 ormula_rewrite.k:788 ormula_rewrite.k:711 ormula_rewrite.k:721 ormula_rewrite.k:787 ormula_rewrite.k:711 113 (type SRCH) for Echo-PT-d02r15-CTLFireability-04 : unknown 0.000000 1 (type FNDP) for 60 Echo-PT-d02r15-CTLFireability-08 32000000 sec 108 (type FNDP) for Echo-PT-d02r15-CTLFireability-04 : true 1 0.000000 0 110 (type EQUN) for Echo-PT-d02r15-CTLFireability-04 (obsolete) (type FNDP) for 36 Echo-PT-d02r15-CTLFireability-04 32000000 sec (type EQUN) for 36 Echo-PT-d02r15-CTLFireability-04 32000000 sec in 0.000000 secs. ormula_rewrite.k:721 ormula_rewrite.k:788 ormula_rewrite.k:659 ormula_rewrite.k:661 ormula_rewrite.k:806 ormula_rewrite.k:666 ormula_rewrite.k:659 ormula_rewrite.k:662 ormula_rewrite.k:674 ormula_rewrite.k:674 ormula_rewrite.k:812 ormula_rewrite.k:679 ormula_rewrite.k:679 109 (type FNDP) for Echo-PT-d02r15-CTLFireability-08 : true 11 1 0.000000 0 (type SRCH) for 36 Echo-PT-d02r15-CTLFireability-04 32000000 sec 106 (type FNDP) for Echo-PT-d02r15-CTLFireability-04 : true 12 1 0.000000 0 112 (type EQUN) for Echo-PT-d02r15-CTLFireability-04 (obsolete) 118 (type SRCH) for Echo-PT-d02r15-CTLFireability-04 (obsolete) file /home/mcc/execution/CTLFireability-110.sara. 118 (type SRCH) for Echo-PT-d02r15-CTLFireability-04 : unknown 0.000000 1 ormula_rewrite.k:721 ormula_rewrite.k:788 ormula_rewrite.k:711 ormula_rewrite.k:721 ormula_rewrite.k:788 in 0.000000 secs. file /home/mcc/execution/CTLFireability-112.sara. in 0.000000 secs. in 0.000000 secs. ordering is non-deterministic ordering is non-deterministic ordering is non-deterministic VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 5 0 0 2 DISJ 0 1 0 0 8 0 0 5 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 1/32 Echo-PT-d02r15-CTLFireability-00 86122 m, 17224 m/sec, 528257 t fired, . Pages in use: 2 Visible: 16 112 (type EQUN) for Echo-PT-d02r15-CTLFireability-04 : unknown 110 (type EQUN) for Echo-PT-d02r15-CTLFireability-04 : unknown 100 (type EQUN) for Echo-PT-d02r15-CTLFireability-03 : unknown VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 Echo-PT-d02r15-CTLFireability-00 300960 m, 42967 m/sec, 2073968 t fired, . Pages in use: 3 Visible: 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 Echo-PT-d02r15-CTLFireability-00 507551 m, 41318 m/sec, 3662252 t fired, . Pages in use: 5 Visible: 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Echo-PT-d02r15-CTLFireability-00 708264 m, 40142 m/sec, 5213006 t fired, . Pages in use: 7 Visible: 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Echo-PT-d02r15-CTLFireability-00 908790 m, 40105 m/sec, 6770463 t fired, . Pages in use: 10 Visible: 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 Echo-PT-d02r15-CTLFireability-00 1097547 m, 37751 m/sec, 8252213 t fired, . Pages in use: 11 Visible: 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 Echo-PT-d02r15-CTLFireability-00 1271975 m, 34885 m/sec, 9778408 t fired, . Pages in use: 13 Visible: 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Echo-PT-d02r15-CTLFireability-00 1448535 m, 35312 m/sec, 11319855 t fired, . Pages in use: 14 Visible: 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Echo-PT-d02r15-CTLFireability-00 1627286 m, 35750 m/sec, 12852590 t fired, . Pages in use: 15 Visible: 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Echo-PT-d02r15-CTLFireability-00 1807873 m, 36117 m/sec, 14298776 t fired, . Pages in use: 17 Visible: 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Echo-PT-d02r15-CTLFireability-00 1979925 m, 34410 m/sec, 15799365 t fired, . Pages in use: 19 Visible: 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 Echo-PT-d02r15-CTLFireability-00 2155802 m, 35175 m/sec, 17338019 t fired, . Pages in use: 21 Visible: 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Echo-PT-d02r15-CTLFireability-00 2334930 m, 35825 m/sec, 18862284 t fired, . Pages in use: 22 Visible: 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Echo-PT-d02r15-CTLFireability-00 2519968 m, 37007 m/sec, 20356918 t fired, . Pages in use: 24 Visible: 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Echo-PT-d02r15-CTLFireability-00 2694297 m, 34865 m/sec, 21881821 t fired, . Pages in use: 26 Visible: 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 Echo-PT-d02r15-CTLFireability-00 2870242 m, 35189 m/sec, 23421415 t fired, . Pages in use: 28 Visible: 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 Echo-PT-d02r15-CTLFireability-00 3055765 m, 37104 m/sec, 24972807 t fired, . Pages in use: 30 Visible: 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Echo-PT-d02r15-CTLFireability-00 3247437 m, 38334 m/sec, 26552600 t fired, . Pages in use: 32 Visible: 16 5 (type EXCL) for Echo-PT-d02r15-CTLFireability-00 (memory limit exceeded) VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 3 0 0 3 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 Visible: 16 (type EXCL) for 67 Echo-PT-d02r15-CTLFireability-09 70 (type EXCL) for Echo-PT-d02r15-CTLFireability-09 : true 0.000000 1 (type EXCL) for 57 Echo-PT-d02r15-CTLFireability-07 58 (type EXCL) for Echo-PT-d02r15-CTLFireability-07 : false 454 513 0.000000 1 (type EXCL) for 51 Echo-PT-d02r15-CTLFireability-05 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 Echo-PT-d02r15-CTLFireability-05 187773 m, 37554 m/sec, 1603176 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Echo-PT-d02r15-CTLFireability-05 354431 m, 33331 m/sec, 3200678 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 Echo-PT-d02r15-CTLFireability-05 522216 m, 33557 m/sec, 4811743 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Echo-PT-d02r15-CTLFireability-05 692339 m, 34024 m/sec, 6468090 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 Echo-PT-d02r15-CTLFireability-05 863975 m, 34327 m/sec, 8140835 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 Echo-PT-d02r15-CTLFireability-05 1029763 m, 33157 m/sec, 9753828 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Echo-PT-d02r15-CTLFireability-05 1182576 m, 30562 m/sec, 11374480 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 Echo-PT-d02r15-CTLFireability-05 1335999 m, 30684 m/sec, 13012592 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Echo-PT-d02r15-CTLFireability-05 1490961 m, 30992 m/sec, 14660905 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Echo-PT-d02r15-CTLFireability-05 1648397 m, 31487 m/sec, 16302209 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Echo-PT-d02r15-CTLFireability-05 1807939 m, 31908 m/sec, 17915132 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Echo-PT-d02r15-CTLFireability-05 1959525 m, 30317 m/sec, 19537364 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Echo-PT-d02r15-CTLFireability-05 2111632 m, 30421 m/sec, 21169946 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Echo-PT-d02r15-CTLFireability-05 2265699 m, 30813 m/sec, 22818789 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 Echo-PT-d02r15-CTLFireability-05 2429144 m, 32689 m/sec, 24456479 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Echo-PT-d02r15-CTLFireability-05 2582488 m, 30668 m/sec, 26078892 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 Echo-PT-d02r15-CTLFireability-05 2734967 m, 30495 m/sec, 27711624 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 Echo-PT-d02r15-CTLFireability-05 2889728 m, 30952 m/sec, 29357157 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 Echo-PT-d02r15-CTLFireability-05 3047112 m, 31476 m/sec, 30998527 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Echo-PT-d02r15-CTLFireability-05 3203866 m, 31350 m/sec, 32575813 t fired, . Pages in use: 32 Visible: 16 52 (type EXCL) for Echo-PT-d02r15-CTLFireability-05 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 1 0 0 2 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 0 0 5 0 0 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 4 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 Visible: 16 (type EXCL) for 10 Echo-PT-d02r15-CTLFireability-02 23 (type EXCL) for Echo-PT-d02r15-CTLFireability-02 : true 0.000000 1 (type EXCL) for 10 Echo-PT-d02r15-CTLFireability-02 21 (type EXCL) for Echo-PT-d02r15-CTLFireability-02 : true 276 275 0.000000 1 (type EXCL) for 7 Echo-PT-d02r15-CTLFireability-01 8 (type EXCL) for Echo-PT-d02r15-CTLFireability-01 : false 450 449 0.000000 1 (type EXCL) for 0 Echo-PT-d02r15-CTLFireability-00 3 (type EXCL) for Echo-PT-d02r15-CTLFireability-00 : false 0.000000 1 (type EXCL) for 67 Echo-PT-d02r15-CTLFireability-09 124 (type EXCL) for Echo-PT-d02r15-CTLFireability-09 : false 450 450 0.000000 1 (type EXCL) for 54 Echo-PT-d02r15-CTLFireability-06 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 Echo-PT-d02r15-CTLFireability-06 679311 m, 135862 m/sec, 1120114 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Echo-PT-d02r15-CTLFireability-06 1350803 m, 134298 m/sec, 2295121 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Echo-PT-d02r15-CTLFireability-06 2078894 m, 145618 m/sec, 3356081 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Echo-PT-d02r15-CTLFireability-06 2828723 m, 149965 m/sec, 4462977 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Echo-PT-d02r15-CTLFireability-06 3542444 m, 142744 m/sec, 5600736 t fired, . Pages in use: 32 Visible: 16 104 (type EXCL) for Echo-PT-d02r15-CTLFireability-06 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 2 0 0 6 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 EFAG 0 1 0 0 1 0 0 0 ER 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EFAG 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 Visible: 16 (type EXCL) for 93 Echo-PT-d02r15-CTLFireability-15 97 (type EXCL) for Echo-PT-d02r15-CTLFireability-15 : false 101 100 0.000000 1 (type EXCL) for 78 Echo-PT-d02r15-CTLFireability-10 96 (type EXCL) for Echo-PT-d02r15-CTLFireability-10 : false 381 380 0.000000 1 (type EXCL) for 81 Echo-PT-d02r15-CTLFireability-11 82 (type EXCL) for Echo-PT-d02r15-CTLFireability-11 : true 138 137 1.000000 1 (type EXCL) for 25 Echo-PT-d02r15-CTLFireability-03 32 (type EXCL) for Echo-PT-d02r15-CTLFireability-03 : false 450 913 0.000000 1 (type EXCL) for 90 Echo-PT-d02r15-CTLFireability-14 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 Echo-PT-d02r15-CTLFireability-14 243686 m, 48737 m/sec, 1620963 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 Echo-PT-d02r15-CTLFireability-14 452979 m, 41858 m/sec, 3249699 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Echo-PT-d02r15-CTLFireability-14 675709 m, 44546 m/sec, 4954041 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 Echo-PT-d02r15-CTLFireability-14 893536 m, 43565 m/sec, 6647142 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 Echo-PT-d02r15-CTLFireability-14 1104583 m, 42209 m/sec, 8316252 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 Echo-PT-d02r15-CTLFireability-14 1301976 m, 39478 m/sec, 10046875 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Echo-PT-d02r15-CTLFireability-14 1505251 m, 40655 m/sec, 11796192 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Echo-PT-d02r15-CTLFireability-14 1710201 m, 40990 m/sec, 13495213 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Echo-PT-d02r15-CTLFireability-14 1911199 m, 40199 m/sec, 15197403 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Echo-PT-d02r15-CTLFireability-14 2109186 m, 39597 m/sec, 16924416 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Echo-PT-d02r15-CTLFireability-14 2305868 m, 39336 m/sec, 18648137 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Echo-PT-d02r15-CTLFireability-14 2510620 m, 40950 m/sec, 20273980 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Echo-PT-d02r15-CTLFireability-14 2699018 m, 37679 m/sec, 21925171 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 Echo-PT-d02r15-CTLFireability-14 2892828 m, 38762 m/sec, 23602015 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 Echo-PT-d02r15-CTLFireability-14 3094558 m, 40346 m/sec, 25281558 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Echo-PT-d02r15-CTLFireability-14 3291303 m, 39349 m/sec, 26946513 t fired, . Pages in use: 32 Visible: 16 91 (type EXCL) for Echo-PT-d02r15-CTLFireability-14 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 Visible: 16 (type EXCL) for 84 Echo-PT-d02r15-CTLFireability-12 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 Echo-PT-d02r15-CTLFireability-12 252231 m, 50446 m/sec, 1690371 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 Echo-PT-d02r15-CTLFireability-12 470082 m, 43570 m/sec, 3382779 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Echo-PT-d02r15-CTLFireability-12 691250 m, 44233 m/sec, 5075397 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Echo-PT-d02r15-CTLFireability-12 911121 m, 43974 m/sec, 6786468 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 Echo-PT-d02r15-CTLFireability-12 1116181 m, 41012 m/sec, 8416351 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 Echo-PT-d02r15-CTLFireability-12 1307305 m, 38224 m/sec, 10090267 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Echo-PT-d02r15-CTLFireability-12 1505115 m, 39562 m/sec, 11795230 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Echo-PT-d02r15-CTLFireability-12 1713876 m, 41752 m/sec, 13524930 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Echo-PT-d02r15-CTLFireability-12 1915944 m, 40413 m/sec, 15235547 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Echo-PT-d02r15-CTLFireability-12 2113457 m, 39502 m/sec, 16963036 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Echo-PT-d02r15-CTLFireability-12 2313340 m, 39976 m/sec, 18712531 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Echo-PT-d02r15-CTLFireability-12 2527561 m, 42844 m/sec, 20424692 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Echo-PT-d02r15-CTLFireability-12 2729145 m, 40316 m/sec, 22192747 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Echo-PT-d02r15-CTLFireability-12 2931373 m, 40445 m/sec, 23936460 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Echo-PT-d02r15-CTLFireability-12 3145619 m, 42849 m/sec, 25684142 t fired, . Pages in use: 32 Visible: 16 85 (type EXCL) for Echo-PT-d02r15-CTLFireability-12 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 1 0 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 Visible: 16 (type EXCL) for 25 Echo-PT-d02r15-CTLFireability-03 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 1 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 Echo-PT-d02r15-CTLFireability-03 258064 m, 51612 m/sec, 1737767 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 1 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 Echo-PT-d02r15-CTLFireability-03 481939 m, 44775 m/sec, 3479193 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 1 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Echo-PT-d02r15-CTLFireability-03 708749 m, 45362 m/sec, 5216467 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 1 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Echo-PT-d02r15-CTLFireability-03 936573 m, 45564 m/sec, 6963019 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 1 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Echo-PT-d02r15-CTLFireability-03 1142626 m, 41210 m/sec, 8651484 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 1 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 Echo-PT-d02r15-CTLFireability-03 1341069 m, 39688 m/sec, 10380839 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 1 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Echo-PT-d02r15-CTLFireability-03 1542401 m, 40266 m/sec, 12128657 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 1 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Echo-PT-d02r15-CTLFireability-03 1753387 m, 42197 m/sec, 13837437 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 1 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Echo-PT-d02r15-CTLFireability-03 1949995 m, 39321 m/sec, 15533985 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 1 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 Echo-PT-d02r15-CTLFireability-03 2146069 m, 39214 m/sec, 17252135 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 1 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 Echo-PT-d02r15-CTLFireability-03 2353164 m, 41419 m/sec, 18997915 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 1 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Echo-PT-d02r15-CTLFireability-03 2564007 m, 42168 m/sec, 20751643 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 1 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 Echo-PT-d02r15-CTLFireability-03 2766070 m, 40412 m/sec, 22491009 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 1 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Echo-PT-d02r15-CTLFireability-03 2964327 m, 39651 m/sec, 24227699 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 1 0 7 0 0 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Echo-PT-d02r15-CTLFireability-03 3180754 m, 43285 m/sec, 25963698 t fired, . Pages in use: 32 Visible: 16 28 (type EXCL) for Echo-PT-d02r15-CTLFireability-03 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 1 0 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 Visible: 16 (type EXCL) for 36 Echo-PT-d02r15-CTLFireability-04 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 Echo-PT-d02r15-CTLFireability-04 191585 m, 38317 m/sec, 1831190 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Echo-PT-d02r15-CTLFireability-04 363595 m, 34402 m/sec, 3646149 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 Echo-PT-d02r15-CTLFireability-04 533013 m, 33883 m/sec, 5453173 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Echo-PT-d02r15-CTLFireability-04 702222 m, 33841 m/sec, 7271599 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 Echo-PT-d02r15-CTLFireability-04 872767 m, 34109 m/sec, 9102087 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 Echo-PT-d02r15-CTLFireability-04 1037509 m, 32948 m/sec, 10870071 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Echo-PT-d02r15-CTLFireability-04 1189901 m, 30478 m/sec, 12647004 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 Echo-PT-d02r15-CTLFireability-04 1346616 m, 31343 m/sec, 14465708 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Echo-PT-d02r15-CTLFireability-04 1503900 m, 31456 m/sec, 16296591 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Echo-PT-d02r15-CTLFireability-04 1656040 m, 30428 m/sec, 18037018 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Echo-PT-d02r15-CTLFireability-04 1809729 m, 30737 m/sec, 19742320 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Echo-PT-d02r15-CTLFireability-04 1956131 m, 29280 m/sec, 21455349 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Echo-PT-d02r15-CTLFireability-04 2103245 m, 29422 m/sec, 23180154 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Echo-PT-d02r15-CTLFireability-04 2251551 m, 29661 m/sec, 24919313 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 Echo-PT-d02r15-CTLFireability-04 2405837 m, 30857 m/sec, 26631148 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Echo-PT-d02r15-CTLFireability-04 2551829 m, 29198 m/sec, 28295703 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Echo-PT-d02r15-CTLFireability-04 2694481 m, 28530 m/sec, 29966886 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 Echo-PT-d02r15-CTLFireability-04 2838432 m, 28790 m/sec, 31652945 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Echo-PT-d02r15-CTLFireability-04 2983256 m, 28964 m/sec, 33349546 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Echo-PT-d02r15-CTLFireability-04 3139278 m, 31204 m/sec, 35050642 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 1 0 10 0 0 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Echo-PT-d02r15-CTLFireability-04 3291651 m, 30474 m/sec, 36824475 t fired, . Pages in use: 32 Visible: 16 47 (type EXCL) for Echo-PT-d02r15-CTLFireability-04 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER EFAG true tscc_search IDL ACT RUN SUS FIN C/T C/M OBS DISJ 0 0 0 0 3 0 1 0 DISJ 0 0 0 0 7 0 1 1 DISJ 0 0 0 0 10 0 1 3 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 Visible: 16 (type EXCL) for 87 Echo-PT-d02r15-CTLFireability-13 88 (type EXCL) for Echo-PT-d02r15-CTLFireability-13 : false 450 1813 0.000000 1 no open tasks 16 VALUE PRODUCED BY DISJ unknown DISJ CTL false CTL model checker DISJ true DISJ DISJ unknown DISJ DISJ unknown DISJ CTL unknown AGGR SP ECTL unknown AGGR CTL false CTL model checker CONJ false findpath CONJ true CONJ EFAG true tscc_search ER true state space /ER CTL unknown AGGR CTL false CTL model checker CTL unknown AGGR EFAG true tscc_search Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Echo-PT-d02r15"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is Echo-PT-d02r15, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r166-tall-167838851200066"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Echo-PT-d02r15.tgz
mv Echo-PT-d02r15 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;