Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r135-smll-167819415000642.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is EGFr-PT-02010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r135-smll-167819415000642
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 500K
-rw-r--r-- 1 mcc users 8.9K Feb 25 19:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K Feb 25 19:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.0K Feb 25 19:13 CTLFireability.txt
-rw-r--r-- 1 mcc users 37K Feb 25 19:13 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3K Feb 25 16:02 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:02 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.6K Feb 25 16:02 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:02 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 19:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 87K Feb 25 19:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 20K Feb 25 19:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 75K Feb 25 19:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:02 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:02 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 59K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME EGFr-PT-02010-CTLFireability-00
FORMULA_NAME EGFr-PT-02010-CTLFireability-01
FORMULA_NAME EGFr-PT-02010-CTLFireability-02
FORMULA_NAME EGFr-PT-02010-CTLFireability-03
FORMULA_NAME EGFr-PT-02010-CTLFireability-04
FORMULA_NAME EGFr-PT-02010-CTLFireability-05
FORMULA_NAME EGFr-PT-02010-CTLFireability-06
FORMULA_NAME EGFr-PT-02010-CTLFireability-07
FORMULA_NAME EGFr-PT-02010-CTLFireability-08
FORMULA_NAME EGFr-PT-02010-CTLFireability-09
FORMULA_NAME EGFr-PT-02010-CTLFireability-10
FORMULA_NAME EGFr-PT-02010-CTLFireability-11
FORMULA_NAME EGFr-PT-02010-CTLFireability-12
FORMULA_NAME EGFr-PT-02010-CTLFireability-13
FORMULA_NAME EGFr-PT-02010-CTLFireability-14
FORMULA_NAME EGFr-PT-02010-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678438159187

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=EGFr-PT-02010
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 08:49:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 08:49:22] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 08:49:22] [INFO ] Load time of PNML (sax parser for PT used): 58 ms
[2023-03-10 08:49:22] [INFO ] Transformed 40 places.
[2023-03-10 08:49:22] [INFO ] Transformed 68 transitions.
[2023-03-10 08:49:22] [INFO ] Found NUPN structural information;
[2023-03-10 08:49:22] [INFO ] Parsed PT model containing 40 places and 68 transitions and 338 arcs in 261 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
FORMULA EGFr-PT-02010-CTLFireability-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 40 out of 40 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 40/40 places, 68/68 transitions.
Applied a total of 0 rules in 16 ms. Remains 40 /40 variables (removed 0) and now considering 68/68 (removed 0) transitions.
[2023-03-10 08:49:22] [INFO ] Flow matrix only has 39 transitions (discarded 29 similar events)
// Phase 1: matrix 39 rows 40 cols
[2023-03-10 08:49:22] [INFO ] Computed 20 place invariants in 5 ms
[2023-03-10 08:49:22] [INFO ] Implicit Places using invariants in 229 ms returned []
[2023-03-10 08:49:22] [INFO ] Flow matrix only has 39 transitions (discarded 29 similar events)
[2023-03-10 08:49:22] [INFO ] Invariant cache hit.
[2023-03-10 08:49:22] [INFO ] State equation strengthened by 19 read => feed constraints.
[2023-03-10 08:49:22] [INFO ] Implicit Places using invariants and state equation in 104 ms returned []
Implicit Place search using SMT with State Equation took 379 ms to find 0 implicit places.
[2023-03-10 08:49:22] [INFO ] Flow matrix only has 39 transitions (discarded 29 similar events)
[2023-03-10 08:49:22] [INFO ] Invariant cache hit.
[2023-03-10 08:49:22] [INFO ] Dead Transitions using invariants and state equation in 156 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 554 ms. Remains : 40/40 places, 68/68 transitions.
Support contains 40 out of 40 places after structural reductions.
[2023-03-10 08:49:23] [INFO ] Flatten gal took : 39 ms
[2023-03-10 08:49:23] [INFO ] Flatten gal took : 19 ms
[2023-03-10 08:49:23] [INFO ] Input system was already deterministic with 68 transitions.
Incomplete random walk after 10000 steps, including 446 resets, run finished after 900 ms. (steps per millisecond=11 ) properties (out of 39) seen :24
Incomplete Best-First random walk after 1001 steps, including 11 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1000 steps, including 10 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 11 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1000 steps, including 10 resets, run finished after 31 ms. (steps per millisecond=32 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 11 resets, run finished after 33 ms. (steps per millisecond=30 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1000 steps, including 10 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 11 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 9 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1000 steps, including 11 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 12 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 15) seen :0
Running SMT prover for 15 properties.
[2023-03-10 08:49:24] [INFO ] Flow matrix only has 39 transitions (discarded 29 similar events)
[2023-03-10 08:49:24] [INFO ] Invariant cache hit.
[2023-03-10 08:49:24] [INFO ] [Real]Absence check using 20 positive place invariants in 7 ms returned sat
[2023-03-10 08:49:24] [INFO ] After 278ms SMT Verify possible using all constraints in real domain returned unsat :3 sat :0 real:12
[2023-03-10 08:49:25] [INFO ] [Nat]Absence check using 20 positive place invariants in 10 ms returned sat
[2023-03-10 08:49:25] [INFO ] After 107ms SMT Verify possible using state equation in natural domain returned unsat :4 sat :11
[2023-03-10 08:49:25] [INFO ] State equation strengthened by 19 read => feed constraints.
[2023-03-10 08:49:25] [INFO ] After 59ms SMT Verify possible using 19 Read/Feed constraints in natural domain returned unsat :7 sat :8
[2023-03-10 08:49:25] [INFO ] Deduced a trap composed of 2 places in 37 ms of which 9 ms to minimize.
[2023-03-10 08:49:25] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 1 trap constraints in 45 ms
[2023-03-10 08:49:25] [INFO ] After 201ms SMT Verify possible using trap constraints in natural domain returned unsat :8 sat :7
Attempting to minimize the solution found.
Minimization took 55 ms.
[2023-03-10 08:49:25] [INFO ] After 541ms SMT Verify possible using all constraints in natural domain returned unsat :8 sat :7
Fused 15 Parikh solutions to 6 different solutions.
Parikh walk visited 0 properties in 7 ms.
Support contains 20 out of 40 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 40/40 places, 68/68 transitions.
Graph (complete) has 137 edges and 40 vertex of which 36 are kept as prefixes of interest. Removing 4 places using SCC suffix rule.3 ms
Discarding 4 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 5 place count 36 transition count 63
Applied a total of 5 rules in 23 ms. Remains 36 /40 variables (removed 4) and now considering 63/68 (removed 5) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 23 ms. Remains : 36/40 places, 63/68 transitions.
Incomplete random walk after 10000 steps, including 494 resets, run finished after 393 ms. (steps per millisecond=25 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 115 resets, run finished after 75 ms. (steps per millisecond=133 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 127 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 114 resets, run finished after 81 ms. (steps per millisecond=123 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 119 resets, run finished after 78 ms. (steps per millisecond=128 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 105 resets, run finished after 68 ms. (steps per millisecond=147 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 118 resets, run finished after 74 ms. (steps per millisecond=135 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 123 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 7) seen :0
Probably explored full state space saw : 2985 states, properties seen :0
Probabilistic random walk after 17107 steps, saw 2985 distinct states, run finished after 126 ms. (steps per millisecond=135 ) properties seen :0
Explored full state space saw : 2985 states, properties seen :0
Exhaustive walk after 17107 steps, saw 2985 distinct states, run finished after 93 ms. (steps per millisecond=183 ) properties seen :0
Successfully simplified 15 atomic propositions for a total of 15 simplifications.
FORMULA EGFr-PT-02010-CTLFireability-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA EGFr-PT-02010-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA EGFr-PT-02010-CTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA EGFr-PT-02010-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 08:49:26] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 10 ms
[2023-03-10 08:49:26] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-10 08:49:26] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA EGFr-PT-02010-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA EGFr-PT-02010-CTLFireability-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 9 ms
FORMULA EGFr-PT-02010-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 08:49:26] [INFO ] Input system was already deterministic with 68 transitions.
Support contains 25 out of 40 places (down from 30) after GAL structural reductions.
Computed a total of 2 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 40/40 places, 68/68 transitions.
Applied a total of 0 rules in 1 ms. Remains 40 /40 variables (removed 0) and now considering 68/68 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 40/40 places, 68/68 transitions.
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 6 ms
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 6 ms
[2023-03-10 08:49:26] [INFO ] Input system was already deterministic with 68 transitions.
Starting structural reductions in LTL mode, iteration 0 : 40/40 places, 68/68 transitions.
Applied a total of 0 rules in 1 ms. Remains 40 /40 variables (removed 0) and now considering 68/68 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 40/40 places, 68/68 transitions.
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 5 ms
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 6 ms
[2023-03-10 08:49:26] [INFO ] Input system was already deterministic with 68 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 40/40 places, 68/68 transitions.
Applied a total of 0 rules in 5 ms. Remains 40 /40 variables (removed 0) and now considering 68/68 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 40/40 places, 68/68 transitions.
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 5 ms
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 5 ms
[2023-03-10 08:49:26] [INFO ] Input system was already deterministic with 68 transitions.
Starting structural reductions in LTL mode, iteration 0 : 40/40 places, 68/68 transitions.
Applied a total of 0 rules in 1 ms. Remains 40 /40 variables (removed 0) and now considering 68/68 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 40/40 places, 68/68 transitions.
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 5 ms
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 6 ms
[2023-03-10 08:49:26] [INFO ] Input system was already deterministic with 68 transitions.
Starting structural reductions in LTL mode, iteration 0 : 40/40 places, 68/68 transitions.
Applied a total of 0 rules in 1 ms. Remains 40 /40 variables (removed 0) and now considering 68/68 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 40/40 places, 68/68 transitions.
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 5 ms
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 5 ms
[2023-03-10 08:49:26] [INFO ] Input system was already deterministic with 68 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 40/40 places, 68/68 transitions.
Applied a total of 0 rules in 4 ms. Remains 40 /40 variables (removed 0) and now considering 68/68 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 40/40 places, 68/68 transitions.
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 5 ms
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 6 ms
[2023-03-10 08:49:26] [INFO ] Input system was already deterministic with 68 transitions.
Starting structural reductions in LTL mode, iteration 0 : 40/40 places, 68/68 transitions.
Applied a total of 0 rules in 1 ms. Remains 40 /40 variables (removed 0) and now considering 68/68 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 40/40 places, 68/68 transitions.
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 4 ms
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 8 ms
[2023-03-10 08:49:26] [INFO ] Input system was already deterministic with 68 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 40/40 places, 68/68 transitions.
Applied a total of 0 rules in 6 ms. Remains 40 /40 variables (removed 0) and now considering 68/68 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 40/40 places, 68/68 transitions.
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 6 ms
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 8 ms
[2023-03-10 08:49:26] [INFO ] Input system was already deterministic with 68 transitions.
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 9 ms
[2023-03-10 08:49:26] [INFO ] Flatten gal took : 8 ms
[2023-03-10 08:49:26] [INFO ] Export to MCC of 8 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-10 08:49:26] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 40 places, 68 transitions and 338 arcs took 2 ms.
Total runtime 4934 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT EGFr-PT-02010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA EGFr-PT-02010-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EGFr-PT-02010-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EGFr-PT-02010-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EGFr-PT-02010-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EGFr-PT-02010-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EGFr-PT-02010-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EGFr-PT-02010-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA EGFr-PT-02010-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678438168456

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH INITIAL
lola: LAUNCH task # 14 (type CNST) for 13 EGFr-PT-02010-CTLFireability-07
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 14 (type CNST) for EGFr-PT-02010-CTLFireability-07
lola: result : false
lola: LAUNCH task # 3 (type EXCL) for 0 EGFr-PT-02010-CTLFireability-00
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 3 (type EXCL) for EGFr-PT-02010-CTLFireability-00
lola: result : true
lola: markings : 20
lola: fired transitions : 19
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 11 (type EXCL) for 10 EGFr-PT-02010-CTLFireability-05
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:738
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 33 (type FNDP) for 16 EGFr-PT-02010-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 34 (type EQUN) for 16 EGFr-PT-02010-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 36 (type SRCH) for 16 EGFr-PT-02010-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 36 (type SRCH) for EGFr-PT-02010-CTLFireability-09
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 33 (type FNDP) for EGFr-PT-02010-CTLFireability-09
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 34 (type EQUN) for EGFr-PT-02010-CTLFireability-09 (obsolete)
lola: FINISHED task # 11 (type EXCL) for EGFr-PT-02010-CTLFireability-05
lola: result : false
lola: markings : 4200
lola: fired transitions : 30006
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 27 (type EXCL) for 26 EGFr-PT-02010-CTLFireability-11
lola: time limit : 720 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/374/CTLFireability-34.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 34 (type EQUN) for EGFr-PT-02010-CTLFireability-09
lola: result : true
lola: FINISHED task # 27 (type EXCL) for EGFr-PT-02010-CTLFireability-11
lola: result : true
lola: markings : 4199
lola: fired transitions : 59193
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 16 EGFr-PT-02010-CTLFireability-09
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for EGFr-PT-02010-CTLFireability-09
lola: result : true
lola: markings : 4199
lola: fired transitions : 26969
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 8 (type EXCL) for 7 EGFr-PT-02010-CTLFireability-02
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 8 (type EXCL) for EGFr-PT-02010-CTLFireability-02
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 23 EGFr-PT-02010-CTLFireability-10
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 24 (type EXCL) for EGFr-PT-02010-CTLFireability-10
lola: result : false
lola: markings : 22
lola: fired transitions : 44
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 30 (type EXCL) for 29 EGFr-PT-02010-CTLFireability-13
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 30 (type EXCL) for EGFr-PT-02010-CTLFireability-13
lola: result : true
lola: markings : 545
lola: fired transitions : 2897
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
EGFr-PT-02010-CTLFireability-00: DISJ true CTL model checker
EGFr-PT-02010-CTLFireability-02: EU false state space /EU
EGFr-PT-02010-CTLFireability-05: EGEF false CTL model checker
EGFr-PT-02010-CTLFireability-07: INITIAL false preprocessing
EGFr-PT-02010-CTLFireability-09: DISJ true CTL model checker
EGFr-PT-02010-CTLFireability-10: CTL false CTL model checker
EGFr-PT-02010-CTLFireability-11: CTL true CTL model checker
EGFr-PT-02010-CTLFireability-13: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="EGFr-PT-02010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is EGFr-PT-02010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r135-smll-167819415000642"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/EGFr-PT-02010.tgz
mv EGFr-PT-02010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;