About the Execution of LoLa+red for DoubleLock-PT-p3s1
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 4212.312 | 143128.00 | 408968.00 | 973.10 | TF?TFF?T?TF?TFT? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r135-smll-167819414700545.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DoubleLock-PT-p3s1, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r135-smll-167819414700545
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 404K
-rw-r--r-- 1 mcc users 6.7K Feb 25 14:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 76K Feb 25 14:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 14:21 CTLFireability.txt
-rw-r--r-- 1 mcc users 28K Feb 25 14:21 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K Feb 25 16:01 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 25 16:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:01 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 14:23 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 112K Feb 25 14:23 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Feb 25 14:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 41K Feb 25 14:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:01 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:01 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 39K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-00
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-01
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-02
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-03
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-04
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-05
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-06
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-07
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-08
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-09
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-10
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-11
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-12
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-13
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-14
FORMULA_NAME DoubleLock-PT-p3s1-CTLCardinality-15
=== Now, execution of the tool begins
BK_START 1678403877345
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DoubleLock-PT-p3s1
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 23:18:00] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-09 23:18:00] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 23:18:00] [INFO ] Load time of PNML (sax parser for PT used): 63 ms
[2023-03-09 23:18:00] [INFO ] Transformed 46 places.
[2023-03-09 23:18:00] [INFO ] Transformed 80 transitions.
[2023-03-09 23:18:00] [INFO ] Parsed PT model containing 46 places and 80 transitions and 324 arcs in 162 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 18 ms.
Deduced a syphon composed of 6 places in 1 ms
Reduce places removed 6 places and 4 transitions.
FORMULA DoubleLock-PT-p3s1-CTLCardinality-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 36 out of 40 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 40/40 places, 76/76 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 39 transition count 76
Applied a total of 1 rules in 15 ms. Remains 39 /40 variables (removed 1) and now considering 76/76 (removed 0) transitions.
[2023-03-09 23:18:00] [INFO ] Flow matrix only has 61 transitions (discarded 15 similar events)
// Phase 1: matrix 61 rows 39 cols
[2023-03-09 23:18:00] [INFO ] Computed 4 place invariants in 7 ms
[2023-03-09 23:18:00] [INFO ] Implicit Places using invariants in 212 ms returned []
[2023-03-09 23:18:00] [INFO ] Flow matrix only has 61 transitions (discarded 15 similar events)
[2023-03-09 23:18:00] [INFO ] Invariant cache hit.
[2023-03-09 23:18:00] [INFO ] State equation strengthened by 12 read => feed constraints.
[2023-03-09 23:18:00] [INFO ] Implicit Places using invariants and state equation in 112 ms returned []
Implicit Place search using SMT with State Equation took 363 ms to find 0 implicit places.
[2023-03-09 23:18:00] [INFO ] Flow matrix only has 61 transitions (discarded 15 similar events)
[2023-03-09 23:18:00] [INFO ] Invariant cache hit.
[2023-03-09 23:18:00] [INFO ] Dead Transitions using invariants and state equation in 111 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 39/40 places, 76/76 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 492 ms. Remains : 39/40 places, 76/76 transitions.
Support contains 36 out of 39 places after structural reductions.
[2023-03-09 23:18:01] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-09 23:18:01] [INFO ] Flatten gal took : 38 ms
FORMULA DoubleLock-PT-p3s1-CTLCardinality-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 23:18:01] [INFO ] Flatten gal took : 18 ms
[2023-03-09 23:18:01] [INFO ] Input system was already deterministic with 76 transitions.
Incomplete random walk after 10000 steps, including 69 resets, run finished after 577 ms. (steps per millisecond=17 ) properties (out of 63) seen :34
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 29) seen :1
Incomplete Best-First random walk after 1000 steps, including 3 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 28) seen :0
Running SMT prover for 28 properties.
[2023-03-09 23:18:02] [INFO ] Flow matrix only has 61 transitions (discarded 15 similar events)
[2023-03-09 23:18:02] [INFO ] Invariant cache hit.
[2023-03-09 23:18:02] [INFO ] After 127ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:28
[2023-03-09 23:18:02] [INFO ] [Nat]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-09 23:18:02] [INFO ] [Nat]Absence check using 3 positive and 1 generalized place invariants in 24 ms returned sat
[2023-03-09 23:18:02] [INFO ] After 93ms SMT Verify possible using state equation in natural domain returned unsat :20 sat :8
[2023-03-09 23:18:02] [INFO ] State equation strengthened by 12 read => feed constraints.
[2023-03-09 23:18:02] [INFO ] After 43ms SMT Verify possible using 12 Read/Feed constraints in natural domain returned unsat :20 sat :8
[2023-03-09 23:18:02] [INFO ] After 117ms SMT Verify possible using trap constraints in natural domain returned unsat :20 sat :8
Attempting to minimize the solution found.
Minimization took 59 ms.
[2023-03-09 23:18:02] [INFO ] After 451ms SMT Verify possible using all constraints in natural domain returned unsat :20 sat :8
Fused 28 Parikh solutions to 8 different solutions.
Parikh walk visited 0 properties in 96 ms.
Support contains 7 out of 39 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 39/39 places, 76/76 transitions.
Graph (complete) has 150 edges and 39 vertex of which 37 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.1 ms
Discarding 2 places :
Also discarding 0 output transitions
Applied a total of 1 rules in 12 ms. Remains 37 /39 variables (removed 2) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 12 ms. Remains : 37/39 places, 76/76 transitions.
Incomplete random walk after 10000 steps, including 64 resets, run finished after 237 ms. (steps per millisecond=42 ) properties (out of 8) seen :1
Incomplete Best-First random walk after 10001 steps, including 17 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 7) seen :1
Incomplete Best-First random walk after 10000 steps, including 7 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 6) seen :1
Incomplete Best-First random walk after 10001 steps, including 13 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 5) seen :2
Incomplete Best-First random walk after 10001 steps, including 14 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 10 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 3) seen :1
Incomplete Best-First random walk after 10001 steps, including 12 resets, run finished after 13 ms. (steps per millisecond=769 ) properties (out of 2) seen :1
Running SMT prover for 1 properties.
[2023-03-09 23:18:03] [INFO ] Flow matrix only has 61 transitions (discarded 15 similar events)
// Phase 1: matrix 61 rows 37 cols
[2023-03-09 23:18:03] [INFO ] Computed 2 place invariants in 3 ms
[2023-03-09 23:18:03] [INFO ] [Real]Absence check using 1 positive place invariants in 1 ms returned sat
[2023-03-09 23:18:03] [INFO ] [Real]Absence check using 1 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-09 23:18:03] [INFO ] After 68ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-09 23:18:03] [INFO ] [Nat]Absence check using 1 positive place invariants in 0 ms returned sat
[2023-03-09 23:18:03] [INFO ] [Nat]Absence check using 1 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-09 23:18:03] [INFO ] After 30ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-09 23:18:03] [INFO ] State equation strengthened by 12 read => feed constraints.
[2023-03-09 23:18:03] [INFO ] After 10ms SMT Verify possible using 12 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-09 23:18:03] [INFO ] After 21ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 5 ms.
[2023-03-09 23:18:03] [INFO ] After 93ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 1 ms.
Support contains 1 out of 37 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 37/37 places, 76/76 transitions.
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 37 transition count 75
Applied a total of 1 rules in 6 ms. Remains 37 /37 variables (removed 0) and now considering 75/76 (removed 1) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 6 ms. Remains : 37/37 places, 75/76 transitions.
Finished random walk after 5207 steps, including 1 resets, run visited all 1 properties in 9 ms. (steps per millisecond=578 )
Successfully simplified 20 atomic propositions for a total of 14 simplifications.
[2023-03-09 23:18:03] [INFO ] Initial state reduction rules for CTL removed 3 formulas.
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 16 ms
FORMULA DoubleLock-PT-p3s1-CTLCardinality-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DoubleLock-PT-p3s1-CTLCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DoubleLock-PT-p3s1-CTLCardinality-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 10 ms
[2023-03-09 23:18:03] [INFO ] Input system was already deterministic with 76 transitions.
Computed a total of 3 stabilizing places and 8 stable transitions
Graph (complete) has 177 edges and 39 vertex of which 37 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.1 ms
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 76/76 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 37 transition count 76
Applied a total of 2 rules in 3 ms. Remains 37 /39 variables (removed 2) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 37/39 places, 76/76 transitions.
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 7 ms
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 8 ms
[2023-03-09 23:18:03] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 76/76 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 37 transition count 76
Applied a total of 2 rules in 2 ms. Remains 37 /39 variables (removed 2) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 37/39 places, 76/76 transitions.
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 6 ms
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 8 ms
[2023-03-09 23:18:03] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 76/76 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 37 transition count 76
Applied a total of 2 rules in 2 ms. Remains 37 /39 variables (removed 2) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 37/39 places, 76/76 transitions.
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 6 ms
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 8 ms
[2023-03-09 23:18:03] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 76/76 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 37 transition count 76
Applied a total of 2 rules in 2 ms. Remains 37 /39 variables (removed 2) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 37/39 places, 76/76 transitions.
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 6 ms
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 7 ms
[2023-03-09 23:18:03] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 76/76 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 37 transition count 76
Applied a total of 2 rules in 2 ms. Remains 37 /39 variables (removed 2) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 37/39 places, 76/76 transitions.
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 6 ms
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 7 ms
[2023-03-09 23:18:03] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 39/39 places, 76/76 transitions.
Graph (complete) has 177 edges and 39 vertex of which 37 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.1 ms
Discarding 2 places :
Also discarding 0 output transitions
Applied a total of 1 rules in 6 ms. Remains 37 /39 variables (removed 2) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 37/39 places, 76/76 transitions.
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 5 ms
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 6 ms
[2023-03-09 23:18:03] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 39/39 places, 76/76 transitions.
Graph (complete) has 177 edges and 39 vertex of which 38 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.0 ms
Discarding 1 places :
Also discarding 0 output transitions
Applied a total of 1 rules in 5 ms. Remains 38 /39 variables (removed 1) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 38/39 places, 76/76 transitions.
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 5 ms
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 6 ms
[2023-03-09 23:18:03] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 76/76 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 37 transition count 76
Applied a total of 2 rules in 2 ms. Remains 37 /39 variables (removed 2) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 37/39 places, 76/76 transitions.
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 5 ms
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 7 ms
[2023-03-09 23:18:03] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 76/76 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 37 transition count 76
Applied a total of 2 rules in 2 ms. Remains 37 /39 variables (removed 2) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 37/39 places, 76/76 transitions.
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 5 ms
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 7 ms
[2023-03-09 23:18:03] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 39/39 places, 76/76 transitions.
Graph (complete) has 177 edges and 39 vertex of which 37 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.1 ms
Discarding 2 places :
Also discarding 0 output transitions
Applied a total of 1 rules in 5 ms. Remains 37 /39 variables (removed 2) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 37/39 places, 76/76 transitions.
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 6 ms
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 7 ms
[2023-03-09 23:18:03] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 39/39 places, 76/76 transitions.
Graph (complete) has 177 edges and 39 vertex of which 37 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.1 ms
Discarding 2 places :
Also discarding 0 output transitions
Applied a total of 1 rules in 5 ms. Remains 37 /39 variables (removed 2) and now considering 76/76 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 37/39 places, 76/76 transitions.
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 5 ms
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 6 ms
[2023-03-09 23:18:03] [INFO ] Input system was already deterministic with 76 transitions.
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 7 ms
[2023-03-09 23:18:03] [INFO ] Flatten gal took : 6 ms
[2023-03-09 23:18:03] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 3 ms.
[2023-03-09 23:18:03] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 39 places, 76 transitions and 306 arcs took 1 ms.
Total runtime 3886 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DoubleLock-PT-p3s1
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
FORMULA DoubleLock-PT-p3s1-CTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p3s1-CTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p3s1-CTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p3s1-CTLCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p3s1-CTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p3s1-CTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678404020473
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:207
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 4 (type EXCL) for 3 DoubleLock-PT-p3s1-CTLCardinality-02
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 45 (type FNDP) for 9 DoubleLock-PT-p3s1-CTLCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 46 (type EQUN) for 9 DoubleLock-PT-p3s1-CTLCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 48 (type SRCH) for 9 DoubleLock-PT-p3s1-CTLCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 48 (type SRCH) for DoubleLock-PT-p3s1-CTLCardinality-04
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 45 (type FNDP) for DoubleLock-PT-p3s1-CTLCardinality-04 (obsolete)
lola: CANCELED task # 46 (type EQUN) for DoubleLock-PT-p3s1-CTLCardinality-04 (obsolete)
lola: LAUNCH task # 41 (type FNDP) for 0 DoubleLock-PT-p3s1-CTLCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 42 (type EQUN) for 0 DoubleLock-PT-p3s1-CTLCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 44 (type SRCH) for 0 DoubleLock-PT-p3s1-CTLCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 45 (type FNDP) for DoubleLock-PT-p3s1-CTLCardinality-04
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 41 (type FNDP) for DoubleLock-PT-p3s1-CTLCardinality-00
lola: result : true
lola: fired transitions : 38
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 42 (type EQUN) for DoubleLock-PT-p3s1-CTLCardinality-00 (obsolete)
lola: CANCELED task # 44 (type SRCH) for DoubleLock-PT-p3s1-CTLCardinality-00 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
sara: try reading problem file /home/mcc/execution/372/CTLCardinality-42.sara.
sara: try reading problem file /home/mcc/execution/372/CTLCardinality-46.sara.
sara: warning, failure of lp_solve (at job 3)
sara: warning, failure of lp_solve (at job 7)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p3s1-CTLCardinality-02: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ 0 2 0 0 5 0 0 2
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/327 8/32 DoubleLock-PT-p3s1-CTLCardinality-02 1732177 m, 346435 m/sec, 3884271 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p3s1-CTLCardinality-02: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ 0 2 0 0 5 0 0 2
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/327 15/32 DoubleLock-PT-p3s1-CTLCardinality-02 3425255 m, 338615 m/sec, 7680870 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p3s1-CTLCardinality-02: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ 0 2 0 0 5 0 0 2
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 15/327 21/32 DoubleLock-PT-p3s1-CTLCardinality-02 5073370 m, 329623 m/sec, 11376642 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p3s1-CTLCardinality-02: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ 0 2 0 0 5 0 0 2
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 20/327 28/32 DoubleLock-PT-p3s1-CTLCardinality-02 6704087 m, 326143 m/sec, 15033401 t fired, .
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lola: CANCELED task # 4 (type EXCL) for DoubleLock-PT-p3s1-CTLCardinality-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p3s1-CTLCardinality-02: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ 0 2 0 0 5 0 0 2
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 33 (type EXCL) for 32 DoubleLock-PT-p3s1-CTLCardinality-12
lola: time limit : 357 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for DoubleLock-PT-p3s1-CTLCardinality-12
lola: result : true
lola: markings : 24
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 30 (type EXCL) for 29 DoubleLock-PT-p3s1-CTLCardinality-11
lola: time limit : 397 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p3s1-CTLCardinality-02: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ 0 2 0 0 5 0 0 2
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 CTL EXCL 5/397 8/32 DoubleLock-PT-p3s1-CTLCardinality-11 1796140 m, 359228 m/sec, 4027702 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DoubleLock-PT-p3s1-CTLCardinality-04: CONJ 0 2 0 0 5 0 0 2
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
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30 CTL EXCL 10/397 15/32 DoubleLock-PT-p3s1-CTLCardinality-11 3434773 m, 327726 m/sec, 7702212 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
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DoubleLock-PT-p3s1-CTLCardinality-04: CONJ 0 2 0 0 5 0 0 2
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 CTL EXCL 15/397 21/32 DoubleLock-PT-p3s1-CTLCardinality-11 5052318 m, 323509 m/sec, 11329433 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
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DoubleLock-PT-p3s1-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ 0 2 0 0 5 0 0 2
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 CTL EXCL 20/397 28/32 DoubleLock-PT-p3s1-CTLCardinality-11 6646881 m, 318912 m/sec, 14905121 t fired, .
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lola: CANCELED task # 30 (type EXCL) for DoubleLock-PT-p3s1-CTLCardinality-11 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p3s1-CTLCardinality-02: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ 0 2 0 0 5 0 0 2
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 21 (type EXCL) for 20 DoubleLock-PT-p3s1-CTLCardinality-06
lola: time limit : 443 sec
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p3s1-CTLCardinality-02: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ 0 2 0 0 5 0 0 2
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
21 CTL EXCL 5/443 6/32 DoubleLock-PT-p3s1-CTLCardinality-06 1319649 m, 263929 m/sec, 4278855 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
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DoubleLock-PT-p3s1-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ 0 2 0 0 5 0 0 2
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
21 CTL EXCL 10/443 11/32 DoubleLock-PT-p3s1-CTLCardinality-06 2587296 m, 253529 m/sec, 8389104 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
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DoubleLock-PT-p3s1-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ 0 2 0 0 5 0 0 2
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
21 CTL EXCL 15/443 16/32 DoubleLock-PT-p3s1-CTLCardinality-06 3799627 m, 242466 m/sec, 12319997 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
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DoubleLock-PT-p3s1-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ 0 2 0 0 5 0 0 2
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
21 CTL EXCL 20/443 21/32 DoubleLock-PT-p3s1-CTLCardinality-06 5003640 m, 240802 m/sec, 16223919 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-04: CONJ 0 2 0 0 5 0 0 2
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
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DoubleLock-PT-p3s1-CTLCardinality-09: EFEG 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
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21 CTL EXCL 25/443 26/32 DoubleLock-PT-p3s1-CTLCardinality-06 6193176 m, 237907 m/sec, 20080896 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-04: CONJ 0 2 0 0 5 0 0 2
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
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21 CTL EXCL 30/443 31/32 DoubleLock-PT-p3s1-CTLCardinality-06 7365356 m, 234436 m/sec, 23881604 t fired, .
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lola: CANCELED task # 21 (type EXCL) for DoubleLock-PT-p3s1-CTLCardinality-06 (memory limit exceeded)
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
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DoubleLock-PT-p3s1-CTLCardinality-04: CONJ 0 2 0 0 5 0 0 2
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
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lola: FINISHED task # 16 (type EXCL) for DoubleLock-PT-p3s1-CTLCardinality-04
lola: result : true
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lola: FINISHED task # 12 (type EXCL) for DoubleLock-PT-p3s1-CTLCardinality-04
lola: result : false
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lola: LAUNCH task # 7 (type EXCL) for 6 DoubleLock-PT-p3s1-CTLCardinality-03
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lola: FINISHED task # 7 (type EXCL) for DoubleLock-PT-p3s1-CTLCardinality-03
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lola: FINISHED task # 27 (type EXCL) for DoubleLock-PT-p3s1-CTLCardinality-09
lola: result : true
lola: markings : 359
lola: fired transitions : 369
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-03: CTL true CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ false CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG true state space /EFEG
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
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DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
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39 CTL EXCL 5/1171 7/32 DoubleLock-PT-p3s1-CTLCardinality-15 1529453 m, 305890 m/sec, 3522373 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-03: CTL true CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ false CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG true state space /EFEG
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
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DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
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39 CTL EXCL 10/1171 13/32 DoubleLock-PT-p3s1-CTLCardinality-15 3003602 m, 294829 m/sec, 6917382 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
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DoubleLock-PT-p3s1-CTLCardinality-04: CONJ false CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG true state space /EFEG
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
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DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
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39 CTL EXCL 15/1171 19/32 DoubleLock-PT-p3s1-CTLCardinality-15 4442915 m, 287862 m/sec, 10232161 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-03: CTL true CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ false CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG true state space /EFEG
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
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DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
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39 CTL EXCL 20/1171 25/32 DoubleLock-PT-p3s1-CTLCardinality-15 5866656 m, 284748 m/sec, 13511082 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-03: CTL true CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ false CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG true state space /EFEG
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
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DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
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39 CTL EXCL 25/1171 30/32 DoubleLock-PT-p3s1-CTLCardinality-15 7276526 m, 281974 m/sec, 16758053 t fired, .
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lola: CANCELED task # 39 (type EXCL) for DoubleLock-PT-p3s1-CTLCardinality-15 (memory limit exceeded)
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-03: CTL true CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ false CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG true state space /EFEG
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
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DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
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lola: LAUNCH task # 24 (type EXCL) for 23 DoubleLock-PT-p3s1-CTLCardinality-08
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-03: CTL true CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ false CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG true state space /EFEG
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
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DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
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DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 0 0 0 1 0 1 0
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24 CTL EXCL 5/1742 11/32 DoubleLock-PT-p3s1-CTLCardinality-08 2653090 m, 530618 m/sec, 3296259 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-03: CTL true CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ false CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG true state space /EFEG
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
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24 CTL EXCL 10/1742 21/32 DoubleLock-PT-p3s1-CTLCardinality-08 5051544 m, 479690 m/sec, 6276155 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-03: CTL true CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ false CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG true state space /EFEG
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
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24 CTL EXCL 15/1742 31/32 DoubleLock-PT-p3s1-CTLCardinality-08 7430384 m, 475768 m/sec, 9231685 t fired, .
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DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-03: CTL true CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ false CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG true state space /EFEG
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p3s1-CTLCardinality-02: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-08: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s1-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s1-CTLCardinality-15: CTL 0 0 0 0 1 0 1 0
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# running tasks: 1 of 4 Visible: 11
lola: LAUNCH task # 36 (type EXCL) for 35 DoubleLock-PT-p3s1-CTLCardinality-14
lola: time limit : 3465 sec
lola: memory limit: 32 pages
lola: FINISHED task # 36 (type EXCL) for DoubleLock-PT-p3s1-CTLCardinality-14
lola: result : true
lola: markings : 429
lola: fired transitions : 507
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 11
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p3s1-CTLCardinality-00: EF true findpath
DoubleLock-PT-p3s1-CTLCardinality-02: CTL unknown AGGR
DoubleLock-PT-p3s1-CTLCardinality-03: CTL true CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-04: CONJ false CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-06: CTL unknown AGGR
DoubleLock-PT-p3s1-CTLCardinality-08: CTL unknown AGGR
DoubleLock-PT-p3s1-CTLCardinality-09: EFEG true state space /EFEG
DoubleLock-PT-p3s1-CTLCardinality-11: CTL unknown AGGR
DoubleLock-PT-p3s1-CTLCardinality-12: CTL true CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-14: CTL true CTL model checker
DoubleLock-PT-p3s1-CTLCardinality-15: CTL unknown AGGR
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DoubleLock-PT-p3s1"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DoubleLock-PT-p3s1, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r135-smll-167819414700545"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DoubleLock-PT-p3s1.tgz
mv DoubleLock-PT-p3s1 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;