fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r135-smll-167819414600534
Last Updated
May 14, 2023

About the Execution of LoLa+red for DoubleLock-PT-p2s1

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
7633.428 3600000.00 7791681.00 10797.00 TTFFTTFTTFTTFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r135-smll-167819414600534.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DoubleLock-PT-p2s1, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4

Run identifier is r135-smll-167819414600534
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 548K
-rw-r--r-- 1 mcc users 6.1K Feb 25 14:19 CTLCardinality.txt
-rw-r--r-- 1 mcc users 66K Feb 25 14:19 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 25 14:18 CTLFireability.txt
-rw-r--r-- 1 mcc users 60K Feb 25 14:18 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:01 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 16:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:01 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 16:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 14:20 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 134K Feb 25 14:20 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Feb 25 14:20 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K Feb 25 14:20 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:01 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:01 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 97K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-00
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-01
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-02
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-03
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-04
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-05
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-06
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-07
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-08
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-09
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-10
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-11
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-12
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-13
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-14
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678398762911

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DoubleLock-PT-p2s1
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 21:52:46] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-09 21:52:46] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 21:52:47] [INFO ] Load time of PNML (sax parser for PT used): 136 ms
[2023-03-09 21:52:47] [INFO ] Transformed 64 places.
[2023-03-09 21:52:47] [INFO ] Transformed 212 transitions.
[2023-03-09 21:52:47] [INFO ] Parsed PT model containing 64 places and 212 transitions and 860 arcs in 297 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 35 ms.
Working with output stream class java.io.PrintStream
Deduced a syphon composed of 8 places in 4 ms
Reduce places removed 8 places and 8 transitions.
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 49 resets, run finished after 1119 ms. (steps per millisecond=8 ) properties (out of 13) seen :4
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-06 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 8 resets, run finished after 129 ms. (steps per millisecond=77 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 94 ms. (steps per millisecond=106 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 4 resets, run finished after 79 ms. (steps per millisecond=126 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 10 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 5 resets, run finished after 131 ms. (steps per millisecond=76 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 5 resets, run finished after 81 ms. (steps per millisecond=123 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 8 resets, run finished after 50 ms. (steps per millisecond=200 ) properties (out of 9) seen :1
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-12 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 65 ms. (steps per millisecond=153 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 11 resets, run finished after 56 ms. (steps per millisecond=178 ) properties (out of 8) seen :0
Running SMT prover for 8 properties.
[2023-03-09 21:52:49] [INFO ] Flow matrix only has 152 transitions (discarded 52 similar events)
// Phase 1: matrix 152 rows 56 cols
[2023-03-09 21:52:49] [INFO ] Computed 4 place invariants in 14 ms
[2023-03-09 21:52:49] [INFO ] [Real]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-09 21:52:49] [INFO ] [Real]Absence check using 3 positive and 1 generalized place invariants in 2 ms returned sat
[2023-03-09 21:52:49] [INFO ] After 313ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:7
[2023-03-09 21:52:49] [INFO ] [Nat]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-09 21:52:49] [INFO ] [Nat]Absence check using 3 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-09 21:52:49] [INFO ] After 137ms SMT Verify possible using all constraints in natural domain returned unsat :8 sat :0
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-15 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-13 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-10 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-09 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-04 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-01 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 8 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 2950 ms.
starting LoLA
BK_INPUT DoubleLock-PT-p2s1
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 8517824 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16102176 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 8 transitions removed,8 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 10 (type CNST) for 9 DoubleLock-PT-p2s1-ReachabilityCardinality-03
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 10 (type CNST) for DoubleLock-PT-p2s1-ReachabilityCardinality-03
lola: result : false
lola: LAUNCH INITIAL
lola: LAUNCH task # 7 (type CNST) for 6 DoubleLock-PT-p2s1-ReachabilityCardinality-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 7 (type CNST) for DoubleLock-PT-p2s1-ReachabilityCardinality-02
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 69 (type EXCL) for 0 DoubleLock-PT-p2s1-ReachabilityCardinality-00
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 54 (type FNDP) for 18 DoubleLock-PT-p2s1-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type EQUN) for 18 DoubleLock-PT-p2s1-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 57 (type SRCH) for 18 DoubleLock-PT-p2s1-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 54 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-06
lola: result : true
lola: fired transitions : 52
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 57 (type SRCH) for DoubleLock-PT-p2s1-ReachabilityCardinality-06
lola: result : true
lola: markings : 54
lola: fired transitions : 53
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH INITIAL
lola: LAUNCH task # 34 (type CNST) for 33 DoubleLock-PT-p2s1-ReachabilityCardinality-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: CANCELED task # 55 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 49 (type FNDP) for 12 DoubleLock-PT-p2s1-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 12 DoubleLock-PT-p2s1-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 34 (type CNST) for DoubleLock-PT-p2s1-ReachabilityCardinality-11
lola: result : true
lola: LAUNCH task # 71 (type FNDP) for 27 DoubleLock-PT-p2s1-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 55 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-06
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 50 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-04
lola: result : false
lola: CANCELED task # 49 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 122 (type FNDP) for 39 DoubleLock-PT-p2s1-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 124 (type EQUN) for 39 DoubleLock-PT-p2s1-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 49 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 29491
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-124.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 124 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-13
lola: result : false
lola: CANCELED task # 122 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 94 (type FNDP) for 45 DoubleLock-PT-p2s1-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 95 (type EQUN) for 45 DoubleLock-PT-p2s1-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 122 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 23175
lola: tried executions : 91
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-95.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF EXCL 5/359 4/32 DoubleLock-PT-p2s1-ReachabilityCardinality-00 880033 m, 176006 m/sec, 1010403 t fired, .
71 EF FNDP 5/275 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 595823 t fired, 29 attempts, .
94 EF FNDP 4/276 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-15 496477 t fired, 1 attempts, .
95 EF STEQ 4/257 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-15 sara is running.

Time elapsed: 6 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF EXCL 10/359 7/32 DoubleLock-PT-p2s1-ReachabilityCardinality-00 1824036 m, 188800 m/sec, 2094258 t fired, .
71 EF FNDP 10/271 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 1226424 t fired, 310 attempts, .
94 EF FNDP 9/272 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-15 1088183 t fired, 2 attempts, .
95 EF STEQ 9/253 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-15 sara is running.

Time elapsed: 11 secs. Pages in use: 7
# running tasks: 4 of 4 Visible: 16

lola: FINISHED task # 95 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-15
lola: result : false
lola: CANCELED task # 94 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 102 (type FNDP) for 30 DoubleLock-PT-p2s1-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type EQUN) for 30 DoubleLock-PT-p2s1-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 94 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 1312314
lola: tried executions : 3
lola: time used : 11.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-103.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 103 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-10
lola: result : false
lola: CANCELED task # 102 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 105 (type FNDP) for 3 DoubleLock-PT-p2s1-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 108 (type EQUN) for 3 DoubleLock-PT-p2s1-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 102 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-10
lola: result : unknown
lola: fired transitions : 9374
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-108.sara.
sara: place or transition ordering is non-deterministic
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DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

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DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF EXCL 15/449 11/32 DoubleLock-PT-p2s1-ReachabilityCardinality-00 2726544 m, 180501 m/sec, 3130472 t fired, .
71 EF FNDP 15/347 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 1847975 t fired, 924 attempts, .
105 EF FNDP 3/326 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 329189 t fired, 345 attempts, .
108 EF STEQ 3/326 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

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DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF EXCL 20/449 14/32 DoubleLock-PT-p2s1-ReachabilityCardinality-00 3665345 m, 187760 m/sec, 4208353 t fired, .
71 EF FNDP 20/344 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 2453720 t fired, 1734 attempts, .
105 EF FNDP 8/323 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 898072 t fired, 1338 attempts, .
108 EF STEQ 8/323 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

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DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF EXCL 25/449 18/32 DoubleLock-PT-p2s1-ReachabilityCardinality-00 4616703 m, 190271 m/sec, 5300655 t fired, .
71 EF FNDP 25/339 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 3082835 t fired, 2831 attempts, .
105 EF FNDP 13/318 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 1485492 t fired, 2486 attempts, .
108 EF STEQ 13/318 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

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DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF EXCL 30/449 22/32 DoubleLock-PT-p2s1-ReachabilityCardinality-00 5527794 m, 182218 m/sec, 6346722 t fired, .
71 EF FNDP 30/334 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 3716926 t fired, 4125 attempts, .
105 EF FNDP 18/313 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 2052132 t fired, 3790 attempts, .
108 EF STEQ 18/313 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

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DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF EXCL 35/449 25/32 DoubleLock-PT-p2s1-ReachabilityCardinality-00 6440524 m, 182546 m/sec, 7394671 t fired, .
71 EF FNDP 35/329 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 4349841 t fired, 5532 attempts, .
105 EF FNDP 23/308 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 2618323 t fired, 5341 attempts, .
108 EF STEQ 23/308 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF EXCL 40/449 29/32 DoubleLock-PT-p2s1-ReachabilityCardinality-00 7352191 m, 182333 m/sec, 8441399 t fired, .
71 EF FNDP 40/324 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 4948489 t fired, 6916 attempts, .
105 EF FNDP 28/303 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 3212822 t fired, 7129 attempts, .
108 EF STEQ 28/303 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF EXCL 45/449 32/32 DoubleLock-PT-p2s1-ReachabilityCardinality-00 8266323 m, 182826 m/sec, 9490959 t fired, .
71 EF FNDP 45/319 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 5537680 t fired, 8318 attempts, .
105 EF FNDP 33/298 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 3815046 t fired, 9153 attempts, .
108 EF STEQ 33/298 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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lola: CANCELED task # 69 (type EXCL) for DoubleLock-PT-p2s1-ReachabilityCardinality-00 (memory limit exceeded)
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DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 50/314 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 6147232 t fired, 9885 attempts, .
105 EF FNDP 38/293 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 4419677 t fired, 11333 attempts, .
108 EF STEQ 38/293 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 55/309 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 6730413 t fired, 11306 attempts, .
105 EF FNDP 43/288 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 5024127 t fired, 13581 attempts, .
108 EF STEQ 43/288 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
132 EF EXCL 5/507 4/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 932585 m, 186517 m/sec, 1070741 t fired, .

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DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 60/304 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 7315355 t fired, 12844 attempts, .
105 EF FNDP 48/283 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 5627359 t fired, 15938 attempts, .
108 EF STEQ 48/283 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
132 EF EXCL 10/507 8/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 1844052 m, 182293 m/sec, 2117240 t fired, .

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DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

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DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 65/299 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 7897451 t fired, 14282 attempts, .
105 EF FNDP 53/278 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 6230767 t fired, 18360 attempts, .
108 EF STEQ 53/278 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
132 EF EXCL 15/507 11/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 2755575 m, 182304 m/sec, 3163803 t fired, .

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DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
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DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
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DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 70/294 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 8479029 t fired, 15738 attempts, .
105 EF FNDP 58/273 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 6834188 t fired, 20732 attempts, .
108 EF STEQ 58/273 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
132 EF EXCL 20/507 14/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 3666163 m, 182117 m/sec, 4209293 t fired, .

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DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
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DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
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DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 75/289 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 9063117 t fired, 17211 attempts, .
105 EF FNDP 63/268 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 7438758 t fired, 23166 attempts, .
108 EF STEQ 63/268 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
132 EF EXCL 25/507 18/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 4579347 m, 182636 m/sec, 5257764 t fired, .

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DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
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DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 80/284 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 9642604 t fired, 18691 attempts, .
105 EF FNDP 68/263 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 8041944 t fired, 25549 attempts, .
108 EF STEQ 68/263 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
132 EF EXCL 30/507 21/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 5486762 m, 181483 m/sec, 6299610 t fired, .

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DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
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DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 85/279 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 10220718 t fired, 20172 attempts, .
105 EF FNDP 73/258 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 8644527 t fired, 27971 attempts, .
108 EF STEQ 73/258 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
132 EF EXCL 35/507 25/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 6391897 m, 181027 m/sec, 7338840 t fired, .

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DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
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DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

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DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
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DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 90/274 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 10797018 t fired, 21636 attempts, .
105 EF FNDP 78/253 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 9247369 t fired, 30429 attempts, .
108 EF STEQ 78/253 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
132 EF EXCL 40/507 28/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 7297068 m, 181034 m/sec, 8378110 t fired, .

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DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
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DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
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DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 95/269 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 11376391 t fired, 23092 attempts, .
105 EF FNDP 83/248 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 9849363 t fired, 32902 attempts, .
108 EF STEQ 83/248 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
132 EF EXCL 45/507 32/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 8205244 m, 181635 m/sec, 9420831 t fired, .

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DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
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DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

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DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 100/264 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 11960647 t fired, 24514 attempts, .
105 EF FNDP 88/243 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 10449965 t fired, 35342 attempts, .
108 EF STEQ 88/243 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
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DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

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DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 105/259 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 12538944 t fired, 25954 attempts, .
91 EF EXCL 5/583 4/32 DoubleLock-PT-p2s1-ReachabilityCardinality-08 989448 m, 197889 m/sec, 1136028 t fired, .
105 EF FNDP 93/238 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 11046027 t fired, 37743 attempts, .
108 EF STEQ 93/238 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

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DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 110/254 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 13118254 t fired, 27417 attempts, .
91 EF EXCL 10/583 8/32 DoubleLock-PT-p2s1-ReachabilityCardinality-08 1960432 m, 194196 m/sec, 2250861 t fired, .
105 EF FNDP 98/233 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 11646255 t fired, 40161 attempts, .
108 EF STEQ 98/233 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

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DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 115/249 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 13696458 t fired, 28855 attempts, .
91 EF EXCL 15/583 12/32 DoubleLock-PT-p2s1-ReachabilityCardinality-08 2928681 m, 193649 m/sec, 3362555 t fired, .
105 EF FNDP 103/228 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 12246418 t fired, 42524 attempts, .
108 EF STEQ 103/228 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 120/244 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 14272056 t fired, 30335 attempts, .
91 EF EXCL 20/583 15/32 DoubleLock-PT-p2s1-ReachabilityCardinality-08 3896382 m, 193540 m/sec, 4473619 t fired, .
105 EF FNDP 108/223 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 12845131 t fired, 44963 attempts, .
108 EF STEQ 108/223 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
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DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 125/239 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 14849106 t fired, 31753 attempts, .
91 EF EXCL 25/583 19/32 DoubleLock-PT-p2s1-ReachabilityCardinality-08 4861324 m, 192988 m/sec, 5581516 t fired, .
105 EF FNDP 113/218 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 13443773 t fired, 47337 attempts, .
108 EF STEQ 113/218 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
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DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 130/234 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 15426496 t fired, 33237 attempts, .
91 EF EXCL 30/583 23/32 DoubleLock-PT-p2s1-ReachabilityCardinality-08 5823175 m, 192370 m/sec, 6685864 t fired, .
105 EF FNDP 118/213 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 14041939 t fired, 49665 attempts, .
108 EF STEQ 118/213 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 135/229 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 15998999 t fired, 34636 attempts, .
91 EF EXCL 35/583 26/32 DoubleLock-PT-p2s1-ReachabilityCardinality-08 6776814 m, 190727 m/sec, 7780782 t fired, .
105 EF FNDP 123/208 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 14642319 t fired, 52054 attempts, .
108 EF STEQ 123/208 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
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DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 140/224 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 16574522 t fired, 36061 attempts, .
91 EF EXCL 40/583 30/32 DoubleLock-PT-p2s1-ReachabilityCardinality-08 7737971 m, 192231 m/sec, 8884331 t fired, .
105 EF FNDP 128/203 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 15239636 t fired, 54439 attempts, .
108 EF STEQ 128/203 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
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DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
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DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 145/219 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 17148244 t fired, 37500 attempts, .
105 EF FNDP 133/198 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 15836044 t fired, 56802 attempts, .
108 EF STEQ 133/198 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
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DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 1 0 1 0 0 0
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DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
63 EF EXCL 5/690 4/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 944260 m, 188852 m/sec, 1084144 t fired, .
71 EF FNDP 150/214 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 17718257 t fired, 38907 attempts, .
105 EF FNDP 138/193 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 16434593 t fired, 59166 attempts, .
108 EF STEQ 138/193 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
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DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
63 EF EXCL 10/690 8/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 1871062 m, 185360 m/sec, 2148252 t fired, .
71 EF FNDP 155/209 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 18290603 t fired, 40272 attempts, .
105 EF FNDP 143/188 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 17033230 t fired, 61530 attempts, .
108 EF STEQ 143/188 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
63 EF EXCL 15/690 11/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 2795000 m, 184787 m/sec, 3209068 t fired, .
71 EF FNDP 160/204 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 18862096 t fired, 41655 attempts, .
105 EF FNDP 148/183 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 17630319 t fired, 63891 attempts, .
108 EF STEQ 148/183 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
63 EF EXCL 20/690 15/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 3716259 m, 184251 m/sec, 4266811 t fired, .
71 EF FNDP 165/199 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 19434504 t fired, 43030 attempts, .
105 EF FNDP 153/178 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 18227305 t fired, 66295 attempts, .
108 EF STEQ 153/178 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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63 EF EXCL 25/690 18/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 4636662 m, 184080 m/sec, 5323570 t fired, .
71 EF FNDP 170/194 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 20005789 t fired, 44455 attempts, .
105 EF FNDP 158/173 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 18823870 t fired, 68645 attempts, .
108 EF STEQ 158/173 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
63 EF EXCL 30/690 22/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 5553025 m, 183272 m/sec, 6375690 t fired, .
71 EF FNDP 175/189 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 20577213 t fired, 45889 attempts, .
105 EF FNDP 163/168 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 19419941 t fired, 70977 attempts, .
108 EF STEQ 163/168 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.

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DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
63 EF EXCL 35/690 25/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 6469330 m, 183261 m/sec, 7427744 t fired, .
71 EF FNDP 180/184 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 21148363 t fired, 47272 attempts, .

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# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 75 (type FNDP) for 21 DoubleLock-PT-p2s1-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 80 (type EQUN) for 21 DoubleLock-PT-p2s1-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 105 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 20016523
lola: tried executions : 73295
lola: time used : 168.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 108 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-01
lola: result : unknown
lola: FINISHED task # 75 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-07
lola: result : true
lola: fired transitions : 38
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 80 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 116 (type FNDP) for 42 DoubleLock-PT-p2s1-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 117 (type EQUN) for 42 DoubleLock-PT-p2s1-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 116 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-14
lola: result : true
lola: fired transitions : 143
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 117 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-14 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 65 (type FNDP) for 0 DoubleLock-PT-p2s1-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type EQUN) for 0 DoubleLock-PT-p2s1-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-80.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-117.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-66.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 66 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-00
lola: result : false
lola: CANCELED task # 65 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 76 (type FNDP) for 24 DoubleLock-PT-p2s1-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 78 (type EQUN) for 24 DoubleLock-PT-p2s1-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 65 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 9411
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-78.sara.
sara: place or transition ordering is non-deterministic
sara: warning, failure of lp_solve (at job 170)
sara: warning, failure of lp_solve (at job 226)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 0 0 3 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
63 EF EXCL 40/1151 28/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 7078426 m, 121819 m/sec, 8127077 t fired, .
71 EF FNDP 185/419 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 21518538 t fired, 48245 attempts, .
76 EF FNDP 5/569 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 345414 t fired, 1 attempts, .
78 EF STEQ 5/569 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 sara is running.

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 0 0 3 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
63 EF EXCL 45/1151 30/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 7723673 m, 129049 m/sec, 8867917 t fired, .
71 EF FNDP 190/414 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 21919900 t fired, 49277 attempts, .
76 EF FNDP 10/564 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 734580 t fired, 1 attempts, .
78 EF STEQ 10/564 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 sara is running.

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 0 0 3 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
63 EF EXCL 50/1151 32/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 8275952 m, 110455 m/sec, 9502013 t fired, .
71 EF FNDP 195/409 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 22331720 t fired, 50298 attempts, .
76 EF FNDP 15/559 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 1124544 t fired, 2 attempts, .
78 EF STEQ 15/559 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 sara is running.

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lola: CANCELED task # 63 (type EXCL) for DoubleLock-PT-p2s1-ReachabilityCardinality-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 0 0 3 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 200/404 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 22791256 t fired, 51425 attempts, .
76 EF FNDP 20/554 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 1589194 t fired, 2 attempts, .
78 EF STEQ 20/554 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 sara is running.

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lola: LAUNCH task # 111 (type EXCL) for 3 DoubleLock-PT-p2s1-ReachabilityCardinality-01
lola: time limit : 1699 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 1 0 3 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 205/399 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 23198167 t fired, 52399 attempts, .
76 EF FNDP 25/549 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 2003677 t fired, 3 attempts, .
78 EF STEQ 25/549 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 sara is running.
111 EF EXCL 5/1699 2/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 409114 m, 81822 m/sec, 469718 t fired, .

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DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 1 0 3 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 210/394 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 23588078 t fired, 53384 attempts, .
76 EF FNDP 30/544 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 2375514 t fired, 3 attempts, .
78 EF STEQ 30/544 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 sara is running.
111 EF EXCL 10/1699 4/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 790916 m, 76360 m/sec, 908084 t fired, .

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DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 1 0 3 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 215/389 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 23983064 t fired, 54328 attempts, .
76 EF FNDP 35/539 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 2777385 t fired, 3 attempts, .
78 EF STEQ 35/539 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 sara is running.
111 EF EXCL 15/1699 5/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 1142689 m, 70354 m/sec, 1311972 t fired, .

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DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 1 0 3 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 220/384 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 24393712 t fired, 55360 attempts, .
76 EF FNDP 40/534 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 3171567 t fired, 4 attempts, .
78 EF STEQ 40/534 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 sara is running.
111 EF EXCL 20/1699 6/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 1490482 m, 69558 m/sec, 1711290 t fired, .

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DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 1 0 3 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 225/379 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 24781835 t fired, 56305 attempts, .
76 EF FNDP 45/529 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 3523033 t fired, 4 attempts, .
78 EF STEQ 45/529 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 sara is running.
111 EF EXCL 25/1699 8/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 1861459 m, 74195 m/sec, 2137226 t fired, .

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DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 1 0 3 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 0 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 230/374 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 25194559 t fired, 57297 attempts, .
76 EF FNDP 50/524 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 3898489 t fired, 4 attempts, .
78 EF STEQ 50/524 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 sara is running.
111 EF EXCL 30/1699 9/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 2209735 m, 69655 m/sec, 2537100 t fired, .

Time elapsed: 231 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 76 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-08
lola: result : true
lola: fired transitions : 4001118
lola: tried executions : 5
lola: time used : 51.000000
lola: memory pages used : 0
lola: CANCELED task # 78 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 52 (type FNDP) for 15 DoubleLock-PT-p2s1-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type EQUN) for 15 DoubleLock-PT-p2s1-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 78 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-08
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-60.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 60 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-05
lola: result : false
lola: CANCELED task # 52 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 119 (type FNDP) for 36 DoubleLock-PT-p2s1-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 129 (type EQUN) for 36 DoubleLock-PT-p2s1-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 52 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 1790
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-129.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 1 0 3 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 2 2 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 235/968 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 25594931 t fired, 58250 attempts, .
111 EF EXCL 35/1699 10/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 2563038 m, 70660 m/sec, 2942743 t fired, .
119 EF FNDP 4/1122 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-12 276548 t fired, 1 attempts, .
129 EF STEQ 4/842 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-12 sara is running.

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sara: warning, failure of lp_solve (at job 922)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 1 0 3 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 2 2 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 240/964 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 25919063 t fired, 59019 attempts, .
111 EF EXCL 40/1699 12/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 2927608 m, 72914 m/sec, 3361323 t fired, .
119 EF FNDP 9/1118 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-12 667822 t fired, 1 attempts, .
129 EF STEQ 9/838 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-12 sara is running.

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 1 0 3 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 2 2 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 245/959 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 26326720 t fired, 59986 attempts, .
111 EF EXCL 45/1699 13/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 3273769 m, 69232 m/sec, 3758766 t fired, .
119 EF FNDP 14/1113 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-12 1061531 t fired, 2 attempts, .
129 EF STEQ 14/833 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-12 sara is running.

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 1 0 3 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 2 2 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 250/954 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 26696342 t fired, 60875 attempts, .
111 EF EXCL 50/1699 14/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 3639992 m, 73244 m/sec, 4179244 t fired, .
119 EF FNDP 19/1108 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-12 1451838 t fired, 2 attempts, .
129 EF STEQ 19/828 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-12 sara is running.

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 1 0 3 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 2 2 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 255/949 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-09 27101090 t fired, 61855 attempts, .
111 EF EXCL 55/1699 16/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 3981215 m, 68244 m/sec, 4571019 t fired, .
119 EF FNDP 24/1103 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-12 1847622 t fired, 2 attempts, .
129 EF STEQ 24/823 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-12 sara is running.

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lola: FINISHED task # 119 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-12
lola: result : true
lola: fired transitions : 1922509
lola: tried executions : 2
lola: time used : 25.000000
lola: memory pages used : 0
lola: CANCELED task # 129 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 73 (type EQUN) for 27 DoubleLock-PT-p2s1-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type SRCH) for 27 DoubleLock-PT-p2s1-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 129 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-12
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-73.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 73 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 71 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 87 (type SRCH) for DoubleLock-PT-p2s1-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 110 (type SRCH) for 3 DoubleLock-PT-p2s1-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type SRCH) for 3 DoubleLock-PT-p2s1-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 71 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 27311629
lola: tried executions : 62368
lola: time used : 257.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 3 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF SRCH 3/3342 1/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 202635 m, 40527 m/sec, 226864 t fired, .
111 EF EXCL 60/3399 17/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 4369573 m, 77671 m/sec, 5016913 t fired, .
113 EF SRCH 3/3342 1/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 224345 m, 44869 m/sec, 224344 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 3 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF SRCH 8/3342 3/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 626212 m, 84715 m/sec, 701270 t fired, .
111 EF EXCL 65/3399 19/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 4801312 m, 86347 m/sec, 5512612 t fired, .
113 EF SRCH 8/3342 3/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 674397 m, 90010 m/sec, 674396 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 3 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF SRCH 13/3342 4/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 1041485 m, 83054 m/sec, 1166375 t fired, .
111 EF EXCL 70/3399 20/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 5213719 m, 82481 m/sec, 5986116 t fired, .
113 EF SRCH 13/3342 5/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 1141072 m, 93335 m/sec, 1141071 t fired, .

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lola: CANCELED task # 113 (type SRCH) for DoubleLock-PT-p2s1-ReachabilityCardinality-01 (memory limit exceeded)
lola: CANCELED task # 110 (type SRCH) for DoubleLock-PT-p2s1-ReachabilityCardinality-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 1 0 3 0 2 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
111 EF EXCL 75/3399 22/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 5735288 m, 104313 m/sec, 6584957 t fired, .

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DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

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DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation

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DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
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DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
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DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DoubleLock-PT-p2s1"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DoubleLock-PT-p2s1, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r135-smll-167819414600534"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DoubleLock-PT-p2s1.tgz
mv DoubleLock-PT-p2s1 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;