fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r135-smll-167819414300418
Last Updated
May 14, 2023

About the Execution of LoLa+red for DiscoveryGPU-PT-14b

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1410.623 296594.00 307779.00 1430.50 F?FF?TTFTTF?TTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r135-smll-167819414300418.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DiscoveryGPU-PT-14b, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r135-smll-167819414300418
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 444K
-rw-r--r-- 1 mcc users 5.7K Feb 25 13:38 CTLCardinality.txt
-rw-r--r-- 1 mcc users 56K Feb 25 13:38 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.8K Feb 25 13:37 CTLFireability.txt
-rw-r--r-- 1 mcc users 41K Feb 25 13:37 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:00 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:00 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 6.4K Feb 25 13:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 59K Feb 25 13:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.5K Feb 25 13:38 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 64K Feb 25 13:38 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:00 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:00 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 104K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DiscoveryGPU-PT-14b-CTLFireability-00
FORMULA_NAME DiscoveryGPU-PT-14b-CTLFireability-01
FORMULA_NAME DiscoveryGPU-PT-14b-CTLFireability-02
FORMULA_NAME DiscoveryGPU-PT-14b-CTLFireability-03
FORMULA_NAME DiscoveryGPU-PT-14b-CTLFireability-04
FORMULA_NAME DiscoveryGPU-PT-14b-CTLFireability-05
FORMULA_NAME DiscoveryGPU-PT-14b-CTLFireability-06
FORMULA_NAME DiscoveryGPU-PT-14b-CTLFireability-07
FORMULA_NAME DiscoveryGPU-PT-14b-CTLFireability-08
FORMULA_NAME DiscoveryGPU-PT-14b-CTLFireability-09
FORMULA_NAME DiscoveryGPU-PT-14b-CTLFireability-10
FORMULA_NAME DiscoveryGPU-PT-14b-CTLFireability-11
FORMULA_NAME DiscoveryGPU-PT-14b-CTLFireability-12
FORMULA_NAME DiscoveryGPU-PT-14b-CTLFireability-13
FORMULA_NAME DiscoveryGPU-PT-14b-CTLFireability-14
FORMULA_NAME DiscoveryGPU-PT-14b-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678326967948

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DiscoveryGPU-PT-14b
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 01:56:10] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-09 01:56:10] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 01:56:10] [INFO ] Load time of PNML (sax parser for PT used): 138 ms
[2023-03-09 01:56:11] [INFO ] Transformed 408 places.
[2023-03-09 01:56:11] [INFO ] Transformed 434 transitions.
[2023-03-09 01:56:11] [INFO ] Found NUPN structural information;
[2023-03-09 01:56:11] [INFO ] Parsed PT model containing 408 places and 434 transitions and 1135 arcs in 391 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 22 ms.
Support contains 87 out of 408 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 408/408 places, 434/434 transitions.
Reduce places removed 28 places and 0 transitions.
Iterating post reduction 0 with 28 rules applied. Total rules applied 28 place count 380 transition count 434
Discarding 46 places :
Symmetric choice reduction at 1 with 46 rule applications. Total rules 74 place count 334 transition count 388
Iterating global reduction 1 with 46 rules applied. Total rules applied 120 place count 334 transition count 388
Discarding 9 places :
Symmetric choice reduction at 1 with 9 rule applications. Total rules 129 place count 325 transition count 379
Iterating global reduction 1 with 9 rules applied. Total rules applied 138 place count 325 transition count 379
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 144 place count 319 transition count 373
Iterating global reduction 1 with 6 rules applied. Total rules applied 150 place count 319 transition count 373
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 153 place count 316 transition count 370
Iterating global reduction 1 with 3 rules applied. Total rules applied 156 place count 316 transition count 370
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 158 place count 314 transition count 366
Iterating global reduction 1 with 2 rules applied. Total rules applied 160 place count 314 transition count 366
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 162 place count 312 transition count 364
Iterating global reduction 1 with 2 rules applied. Total rules applied 164 place count 312 transition count 364
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 165 place count 311 transition count 363
Iterating global reduction 1 with 1 rules applied. Total rules applied 166 place count 311 transition count 363
Applied a total of 166 rules in 218 ms. Remains 311 /408 variables (removed 97) and now considering 363/434 (removed 71) transitions.
// Phase 1: matrix 363 rows 311 cols
[2023-03-09 01:56:11] [INFO ] Computed 2 place invariants in 25 ms
[2023-03-09 01:56:11] [INFO ] Implicit Places using invariants in 558 ms returned []
[2023-03-09 01:56:11] [INFO ] Invariant cache hit.
[2023-03-09 01:56:12] [INFO ] Implicit Places using invariants and state equation in 507 ms returned []
Implicit Place search using SMT with State Equation took 1137 ms to find 0 implicit places.
[2023-03-09 01:56:12] [INFO ] Invariant cache hit.
[2023-03-09 01:56:12] [INFO ] Dead Transitions using invariants and state equation in 439 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 311/408 places, 363/434 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1812 ms. Remains : 311/408 places, 363/434 transitions.
Support contains 87 out of 311 places after structural reductions.
[2023-03-09 01:56:13] [INFO ] Flatten gal took : 81 ms
[2023-03-09 01:56:13] [INFO ] Flatten gal took : 39 ms
[2023-03-09 01:56:13] [INFO ] Input system was already deterministic with 363 transitions.
Support contains 85 out of 311 places (down from 87) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 22 resets, run finished after 678 ms. (steps per millisecond=14 ) properties (out of 67) seen :62
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 5) seen :1
Incomplete Best-First random walk after 10000 steps, including 3 resets, run finished after 58 ms. (steps per millisecond=172 ) properties (out of 4) seen :1
Incomplete Best-First random walk after 10001 steps, including 4 resets, run finished after 63 ms. (steps per millisecond=158 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-09 01:56:14] [INFO ] Invariant cache hit.
[2023-03-09 01:56:14] [INFO ] [Real]Absence check using 2 positive place invariants in 5 ms returned sat
[2023-03-09 01:56:14] [INFO ] After 276ms SMT Verify possible using state equation in real domain returned unsat :1 sat :1 real:1
[2023-03-09 01:56:14] [INFO ] After 336ms SMT Verify possible using trap constraints in real domain returned unsat :1 sat :1 real:1
Attempting to minimize the solution found.
Minimization took 36 ms.
[2023-03-09 01:56:14] [INFO ] After 548ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :1 real:1
[2023-03-09 01:56:15] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-09 01:56:15] [INFO ] After 199ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :2
[2023-03-09 01:56:15] [INFO ] After 278ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :2
Attempting to minimize the solution found.
Minimization took 37 ms.
[2023-03-09 01:56:15] [INFO ] After 445ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :2
Fused 3 Parikh solutions to 2 different solutions.
Finished Parikh walk after 69 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=34 )
Parikh walk visited 2 properties in 12 ms.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2023-03-09 01:56:15] [INFO ] Flatten gal took : 26 ms
[2023-03-09 01:56:15] [INFO ] Flatten gal took : 28 ms
[2023-03-09 01:56:15] [INFO ] Input system was already deterministic with 363 transitions.
Computed a total of 48 stabilizing places and 48 stable transitions
Graph (complete) has 601 edges and 311 vertex of which 304 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.10 ms
Starting structural reductions in LTL mode, iteration 0 : 311/311 places, 363/363 transitions.
Discarding 29 places :
Symmetric choice reduction at 0 with 29 rule applications. Total rules 29 place count 282 transition count 334
Iterating global reduction 0 with 29 rules applied. Total rules applied 58 place count 282 transition count 334
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 69 place count 271 transition count 322
Iterating global reduction 0 with 11 rules applied. Total rules applied 80 place count 271 transition count 322
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 90 place count 261 transition count 309
Iterating global reduction 0 with 10 rules applied. Total rules applied 100 place count 261 transition count 309
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 110 place count 251 transition count 297
Iterating global reduction 0 with 10 rules applied. Total rules applied 120 place count 251 transition count 297
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 129 place count 242 transition count 284
Iterating global reduction 0 with 9 rules applied. Total rules applied 138 place count 242 transition count 284
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 144 place count 236 transition count 278
Iterating global reduction 0 with 6 rules applied. Total rules applied 150 place count 236 transition count 278
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 154 place count 232 transition count 274
Iterating global reduction 0 with 4 rules applied. Total rules applied 158 place count 232 transition count 274
Applied a total of 158 rules in 61 ms. Remains 232 /311 variables (removed 79) and now considering 274/363 (removed 89) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 62 ms. Remains : 232/311 places, 274/363 transitions.
[2023-03-09 01:56:15] [INFO ] Flatten gal took : 17 ms
[2023-03-09 01:56:15] [INFO ] Flatten gal took : 18 ms
[2023-03-09 01:56:15] [INFO ] Input system was already deterministic with 274 transitions.
Starting structural reductions in LTL mode, iteration 0 : 311/311 places, 363/363 transitions.
Discarding 31 places :
Symmetric choice reduction at 0 with 31 rule applications. Total rules 31 place count 280 transition count 332
Iterating global reduction 0 with 31 rules applied. Total rules applied 62 place count 280 transition count 332
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 74 place count 268 transition count 319
Iterating global reduction 0 with 12 rules applied. Total rules applied 86 place count 268 transition count 319
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 97 place count 257 transition count 304
Iterating global reduction 0 with 11 rules applied. Total rules applied 108 place count 257 transition count 304
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 119 place count 246 transition count 291
Iterating global reduction 0 with 11 rules applied. Total rules applied 130 place count 246 transition count 291
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 140 place count 236 transition count 277
Iterating global reduction 0 with 10 rules applied. Total rules applied 150 place count 236 transition count 277
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 156 place count 230 transition count 271
Iterating global reduction 0 with 6 rules applied. Total rules applied 162 place count 230 transition count 271
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 166 place count 226 transition count 267
Iterating global reduction 0 with 4 rules applied. Total rules applied 170 place count 226 transition count 267
Applied a total of 170 rules in 54 ms. Remains 226 /311 variables (removed 85) and now considering 267/363 (removed 96) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 55 ms. Remains : 226/311 places, 267/363 transitions.
[2023-03-09 01:56:15] [INFO ] Flatten gal took : 14 ms
[2023-03-09 01:56:15] [INFO ] Flatten gal took : 15 ms
[2023-03-09 01:56:15] [INFO ] Input system was already deterministic with 267 transitions.
Starting structural reductions in LTL mode, iteration 0 : 311/311 places, 363/363 transitions.
Discarding 32 places :
Symmetric choice reduction at 0 with 32 rule applications. Total rules 32 place count 279 transition count 331
Iterating global reduction 0 with 32 rules applied. Total rules applied 64 place count 279 transition count 331
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 76 place count 267 transition count 318
Iterating global reduction 0 with 12 rules applied. Total rules applied 88 place count 267 transition count 318
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 99 place count 256 transition count 303
Iterating global reduction 0 with 11 rules applied. Total rules applied 110 place count 256 transition count 303
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 121 place count 245 transition count 290
Iterating global reduction 0 with 11 rules applied. Total rules applied 132 place count 245 transition count 290
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 142 place count 235 transition count 276
Iterating global reduction 0 with 10 rules applied. Total rules applied 152 place count 235 transition count 276
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 158 place count 229 transition count 270
Iterating global reduction 0 with 6 rules applied. Total rules applied 164 place count 229 transition count 270
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 168 place count 225 transition count 266
Iterating global reduction 0 with 4 rules applied. Total rules applied 172 place count 225 transition count 266
Applied a total of 172 rules in 57 ms. Remains 225 /311 variables (removed 86) and now considering 266/363 (removed 97) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 57 ms. Remains : 225/311 places, 266/363 transitions.
[2023-03-09 01:56:15] [INFO ] Flatten gal took : 14 ms
[2023-03-09 01:56:15] [INFO ] Flatten gal took : 15 ms
[2023-03-09 01:56:15] [INFO ] Input system was already deterministic with 266 transitions.
Starting structural reductions in LTL mode, iteration 0 : 311/311 places, 363/363 transitions.
Discarding 32 places :
Symmetric choice reduction at 0 with 32 rule applications. Total rules 32 place count 279 transition count 331
Iterating global reduction 0 with 32 rules applied. Total rules applied 64 place count 279 transition count 331
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 76 place count 267 transition count 318
Iterating global reduction 0 with 12 rules applied. Total rules applied 88 place count 267 transition count 318
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 99 place count 256 transition count 303
Iterating global reduction 0 with 11 rules applied. Total rules applied 110 place count 256 transition count 303
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 121 place count 245 transition count 290
Iterating global reduction 0 with 11 rules applied. Total rules applied 132 place count 245 transition count 290
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 142 place count 235 transition count 276
Iterating global reduction 0 with 10 rules applied. Total rules applied 152 place count 235 transition count 276
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 158 place count 229 transition count 270
Iterating global reduction 0 with 6 rules applied. Total rules applied 164 place count 229 transition count 270
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 168 place count 225 transition count 266
Iterating global reduction 0 with 4 rules applied. Total rules applied 172 place count 225 transition count 266
Applied a total of 172 rules in 57 ms. Remains 225 /311 variables (removed 86) and now considering 266/363 (removed 97) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 58 ms. Remains : 225/311 places, 266/363 transitions.
[2023-03-09 01:56:16] [INFO ] Flatten gal took : 15 ms
[2023-03-09 01:56:16] [INFO ] Flatten gal took : 15 ms
[2023-03-09 01:56:16] [INFO ] Input system was already deterministic with 266 transitions.
Starting structural reductions in LTL mode, iteration 0 : 311/311 places, 363/363 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 283 transition count 335
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 283 transition count 335
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 68 place count 271 transition count 322
Iterating global reduction 0 with 12 rules applied. Total rules applied 80 place count 271 transition count 322
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 90 place count 261 transition count 309
Iterating global reduction 0 with 10 rules applied. Total rules applied 100 place count 261 transition count 309
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 110 place count 251 transition count 297
Iterating global reduction 0 with 10 rules applied. Total rules applied 120 place count 251 transition count 297
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 129 place count 242 transition count 284
Iterating global reduction 0 with 9 rules applied. Total rules applied 138 place count 242 transition count 284
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 144 place count 236 transition count 278
Iterating global reduction 0 with 6 rules applied. Total rules applied 150 place count 236 transition count 278
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 154 place count 232 transition count 274
Iterating global reduction 0 with 4 rules applied. Total rules applied 158 place count 232 transition count 274
Applied a total of 158 rules in 49 ms. Remains 232 /311 variables (removed 79) and now considering 274/363 (removed 89) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 50 ms. Remains : 232/311 places, 274/363 transitions.
[2023-03-09 01:56:16] [INFO ] Flatten gal took : 13 ms
[2023-03-09 01:56:16] [INFO ] Flatten gal took : 20 ms
[2023-03-09 01:56:16] [INFO ] Input system was already deterministic with 274 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 311/311 places, 363/363 transitions.
Graph (complete) has 601 edges and 311 vertex of which 304 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.2 ms
Discarding 7 places :
Also discarding 7 output transitions
Drop transitions removed 7 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 57 transitions
Trivial Post-agglo rules discarded 57 transitions
Performed 57 trivial Post agglomeration. Transition count delta: 57
Iterating post reduction 0 with 57 rules applied. Total rules applied 58 place count 303 transition count 298
Reduce places removed 57 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 58 rules applied. Total rules applied 116 place count 246 transition count 297
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 117 place count 245 transition count 297
Performed 33 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 33 Pre rules applied. Total rules applied 117 place count 245 transition count 264
Deduced a syphon composed of 33 places in 1 ms
Reduce places removed 33 places and 0 transitions.
Iterating global reduction 3 with 66 rules applied. Total rules applied 183 place count 212 transition count 264
Discarding 12 places :
Symmetric choice reduction at 3 with 12 rule applications. Total rules 195 place count 200 transition count 252
Iterating global reduction 3 with 12 rules applied. Total rules applied 207 place count 200 transition count 252
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 207 place count 200 transition count 250
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 211 place count 198 transition count 250
Discarding 9 places :
Symmetric choice reduction at 3 with 9 rule applications. Total rules 220 place count 189 transition count 241
Iterating global reduction 3 with 9 rules applied. Total rules applied 229 place count 189 transition count 241
Discarding 9 places :
Symmetric choice reduction at 3 with 9 rule applications. Total rules 238 place count 180 transition count 227
Iterating global reduction 3 with 9 rules applied. Total rules applied 247 place count 180 transition count 227
Discarding 8 places :
Symmetric choice reduction at 3 with 8 rule applications. Total rules 255 place count 172 transition count 216
Iterating global reduction 3 with 8 rules applied. Total rules applied 263 place count 172 transition count 216
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 266 place count 169 transition count 213
Iterating global reduction 3 with 3 rules applied. Total rules applied 269 place count 169 transition count 213
Performed 27 Post agglomeration using F-continuation condition.Transition count delta: 27
Deduced a syphon composed of 27 places in 1 ms
Reduce places removed 27 places and 0 transitions.
Iterating global reduction 3 with 54 rules applied. Total rules applied 323 place count 142 transition count 186
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 325 place count 140 transition count 183
Iterating global reduction 3 with 2 rules applied. Total rules applied 327 place count 140 transition count 183
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 329 place count 138 transition count 180
Iterating global reduction 3 with 2 rules applied. Total rules applied 331 place count 138 transition count 180
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 332 place count 137 transition count 179
Iterating global reduction 3 with 1 rules applied. Total rules applied 333 place count 137 transition count 179
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 334 place count 137 transition count 179
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 336 place count 135 transition count 177
Reduce places removed 2 places and 0 transitions.
Graph (complete) has 162 edges and 133 vertex of which 129 are kept as prefixes of interest. Removing 4 places using SCC suffix rule.1 ms
Discarding 4 places :
Also discarding 5 output transitions
Drop transitions removed 5 transitions
Graph (trivial) has 140 edges and 129 vertex of which 54 / 129 are part of one of the 27 SCC in 3 ms
Free SCC test removed 27 places
Drop transitions removed 42 transitions
Trivial Post-agglo rules discarded 42 transitions
Performed 42 trivial Post agglomeration. Transition count delta: 42
Iterating post reduction 3 with 46 rules applied. Total rules applied 382 place count 102 transition count 130
Reduce places removed 42 places and 0 transitions.
Ensure Unique test removed 27 transitions
Reduce isomorphic transitions removed 27 transitions.
Iterating post reduction 4 with 69 rules applied. Total rules applied 451 place count 60 transition count 103
Discarding 11 places :
Symmetric choice reduction at 5 with 11 rule applications. Total rules 462 place count 49 transition count 81
Iterating global reduction 5 with 11 rules applied. Total rules applied 473 place count 49 transition count 81
Discarding 11 places :
Symmetric choice reduction at 5 with 11 rule applications. Total rules 484 place count 38 transition count 59
Iterating global reduction 5 with 11 rules applied. Total rules applied 495 place count 38 transition count 59
Discarding 11 places :
Symmetric choice reduction at 5 with 11 rule applications. Total rules 506 place count 27 transition count 37
Iterating global reduction 5 with 11 rules applied. Total rules applied 517 place count 27 transition count 37
Discarding 11 places :
Symmetric choice reduction at 5 with 11 rule applications. Total rules 528 place count 16 transition count 26
Iterating global reduction 5 with 11 rules applied. Total rules applied 539 place count 16 transition count 26
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 5 with 1 rules applied. Total rules applied 540 place count 16 transition count 25
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 5 with 1 rules applied. Total rules applied 541 place count 16 transition count 24
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 542 place count 15 transition count 24
Reduce places removed 3 places and 3 transitions.
Iterating global reduction 7 with 3 rules applied. Total rules applied 545 place count 12 transition count 21
Applied a total of 545 rules in 132 ms. Remains 12 /311 variables (removed 299) and now considering 21/363 (removed 342) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 132 ms. Remains : 12/311 places, 21/363 transitions.
[2023-03-09 01:56:16] [INFO ] Flatten gal took : 1 ms
[2023-03-09 01:56:16] [INFO ] Flatten gal took : 1 ms
[2023-03-09 01:56:16] [INFO ] Input system was already deterministic with 21 transitions.
Finished random walk after 457 steps, including 13 resets, run visited all 1 properties in 13 ms. (steps per millisecond=35 )
FORMULA DiscoveryGPU-PT-14b-CTLFireability-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 311/311 places, 363/363 transitions.
Graph (complete) has 601 edges and 311 vertex of which 304 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.3 ms
Discarding 7 places :
Also discarding 7 output transitions
Drop transitions removed 7 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 59 transitions
Trivial Post-agglo rules discarded 59 transitions
Performed 59 trivial Post agglomeration. Transition count delta: 59
Iterating post reduction 0 with 59 rules applied. Total rules applied 60 place count 303 transition count 296
Reduce places removed 59 places and 0 transitions.
Iterating post reduction 1 with 59 rules applied. Total rules applied 119 place count 244 transition count 296
Performed 33 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 33 Pre rules applied. Total rules applied 119 place count 244 transition count 263
Deduced a syphon composed of 33 places in 1 ms
Reduce places removed 33 places and 0 transitions.
Iterating global reduction 2 with 66 rules applied. Total rules applied 185 place count 211 transition count 263
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 197 place count 199 transition count 251
Iterating global reduction 2 with 12 rules applied. Total rules applied 209 place count 199 transition count 251
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 209 place count 199 transition count 249
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 213 place count 197 transition count 249
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 222 place count 188 transition count 240
Iterating global reduction 2 with 9 rules applied. Total rules applied 231 place count 188 transition count 240
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 240 place count 179 transition count 226
Iterating global reduction 2 with 9 rules applied. Total rules applied 249 place count 179 transition count 226
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 258 place count 170 transition count 213
Iterating global reduction 2 with 9 rules applied. Total rules applied 267 place count 170 transition count 213
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 271 place count 166 transition count 209
Iterating global reduction 2 with 4 rules applied. Total rules applied 275 place count 166 transition count 209
Performed 27 Post agglomeration using F-continuation condition.Transition count delta: 27
Deduced a syphon composed of 27 places in 0 ms
Reduce places removed 27 places and 0 transitions.
Iterating global reduction 2 with 54 rules applied. Total rules applied 329 place count 139 transition count 182
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 331 place count 137 transition count 179
Iterating global reduction 2 with 2 rules applied. Total rules applied 333 place count 137 transition count 179
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 335 place count 135 transition count 176
Iterating global reduction 2 with 2 rules applied. Total rules applied 337 place count 135 transition count 176
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 338 place count 134 transition count 175
Iterating global reduction 2 with 1 rules applied. Total rules applied 339 place count 134 transition count 175
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 341 place count 132 transition count 173
Reduce places removed 2 places and 0 transitions.
Graph (complete) has 158 edges and 130 vertex of which 126 are kept as prefixes of interest. Removing 4 places using SCC suffix rule.1 ms
Discarding 4 places :
Also discarding 5 output transitions
Drop transitions removed 5 transitions
Graph (trivial) has 138 edges and 126 vertex of which 54 / 126 are part of one of the 27 SCC in 0 ms
Free SCC test removed 27 places
Drop transitions removed 42 transitions
Trivial Post-agglo rules discarded 42 transitions
Performed 42 trivial Post agglomeration. Transition count delta: 42
Iterating post reduction 2 with 46 rules applied. Total rules applied 387 place count 99 transition count 126
Reduce places removed 42 places and 0 transitions.
Ensure Unique test removed 27 transitions
Reduce isomorphic transitions removed 27 transitions.
Iterating post reduction 3 with 69 rules applied. Total rules applied 456 place count 57 transition count 99
Discarding 12 places :
Symmetric choice reduction at 4 with 12 rule applications. Total rules 468 place count 45 transition count 75
Iterating global reduction 4 with 12 rules applied. Total rules applied 480 place count 45 transition count 75
Discarding 12 places :
Symmetric choice reduction at 4 with 12 rule applications. Total rules 492 place count 33 transition count 51
Iterating global reduction 4 with 12 rules applied. Total rules applied 504 place count 33 transition count 51
Discarding 12 places :
Symmetric choice reduction at 4 with 12 rule applications. Total rules 516 place count 21 transition count 27
Iterating global reduction 4 with 12 rules applied. Total rules applied 528 place count 21 transition count 27
Discarding 12 places :
Symmetric choice reduction at 4 with 12 rule applications. Total rules 540 place count 9 transition count 15
Iterating global reduction 4 with 12 rules applied. Total rules applied 552 place count 9 transition count 15
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 4 with 1 rules applied. Total rules applied 553 place count 9 transition count 14
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 4 with 1 rules applied. Total rules applied 554 place count 9 transition count 13
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 555 place count 8 transition count 13
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 6 with 2 rules applied. Total rules applied 557 place count 6 transition count 11
Applied a total of 557 rules in 116 ms. Remains 6 /311 variables (removed 305) and now considering 11/363 (removed 352) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 116 ms. Remains : 6/311 places, 11/363 transitions.
[2023-03-09 01:56:16] [INFO ] Flatten gal took : 1 ms
[2023-03-09 01:56:16] [INFO ] Flatten gal took : 0 ms
[2023-03-09 01:56:16] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 311/311 places, 363/363 transitions.
Discarding 31 places :
Symmetric choice reduction at 0 with 31 rule applications. Total rules 31 place count 280 transition count 332
Iterating global reduction 0 with 31 rules applied. Total rules applied 62 place count 280 transition count 332
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 73 place count 269 transition count 320
Iterating global reduction 0 with 11 rules applied. Total rules applied 84 place count 269 transition count 320
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 94 place count 259 transition count 307
Iterating global reduction 0 with 10 rules applied. Total rules applied 104 place count 259 transition count 307
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 113 place count 250 transition count 296
Iterating global reduction 0 with 9 rules applied. Total rules applied 122 place count 250 transition count 296
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 129 place count 243 transition count 286
Iterating global reduction 0 with 7 rules applied. Total rules applied 136 place count 243 transition count 286
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 141 place count 238 transition count 281
Iterating global reduction 0 with 5 rules applied. Total rules applied 146 place count 238 transition count 281
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 149 place count 235 transition count 278
Iterating global reduction 0 with 3 rules applied. Total rules applied 152 place count 235 transition count 278
Applied a total of 152 rules in 41 ms. Remains 235 /311 variables (removed 76) and now considering 278/363 (removed 85) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42 ms. Remains : 235/311 places, 278/363 transitions.
[2023-03-09 01:56:16] [INFO ] Flatten gal took : 12 ms
[2023-03-09 01:56:16] [INFO ] Flatten gal took : 13 ms
[2023-03-09 01:56:16] [INFO ] Input system was already deterministic with 278 transitions.
Starting structural reductions in LTL mode, iteration 0 : 311/311 places, 363/363 transitions.
Discarding 31 places :
Symmetric choice reduction at 0 with 31 rule applications. Total rules 31 place count 280 transition count 332
Iterating global reduction 0 with 31 rules applied. Total rules applied 62 place count 280 transition count 332
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 74 place count 268 transition count 319
Iterating global reduction 0 with 12 rules applied. Total rules applied 86 place count 268 transition count 319
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 97 place count 257 transition count 304
Iterating global reduction 0 with 11 rules applied. Total rules applied 108 place count 257 transition count 304
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 119 place count 246 transition count 291
Iterating global reduction 0 with 11 rules applied. Total rules applied 130 place count 246 transition count 291
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 139 place count 237 transition count 278
Iterating global reduction 0 with 9 rules applied. Total rules applied 148 place count 237 transition count 278
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 153 place count 232 transition count 273
Iterating global reduction 0 with 5 rules applied. Total rules applied 158 place count 232 transition count 273
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 162 place count 228 transition count 269
Iterating global reduction 0 with 4 rules applied. Total rules applied 166 place count 228 transition count 269
Applied a total of 166 rules in 45 ms. Remains 228 /311 variables (removed 83) and now considering 269/363 (removed 94) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 46 ms. Remains : 228/311 places, 269/363 transitions.
[2023-03-09 01:56:16] [INFO ] Flatten gal took : 12 ms
[2023-03-09 01:56:16] [INFO ] Flatten gal took : 12 ms
[2023-03-09 01:56:16] [INFO ] Input system was already deterministic with 269 transitions.
Starting structural reductions in LTL mode, iteration 0 : 311/311 places, 363/363 transitions.
Discarding 32 places :
Symmetric choice reduction at 0 with 32 rule applications. Total rules 32 place count 279 transition count 331
Iterating global reduction 0 with 32 rules applied. Total rules applied 64 place count 279 transition count 331
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 76 place count 267 transition count 318
Iterating global reduction 0 with 12 rules applied. Total rules applied 88 place count 267 transition count 318
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 99 place count 256 transition count 303
Iterating global reduction 0 with 11 rules applied. Total rules applied 110 place count 256 transition count 303
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 121 place count 245 transition count 290
Iterating global reduction 0 with 11 rules applied. Total rules applied 132 place count 245 transition count 290
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 142 place count 235 transition count 276
Iterating global reduction 0 with 10 rules applied. Total rules applied 152 place count 235 transition count 276
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 158 place count 229 transition count 270
Iterating global reduction 0 with 6 rules applied. Total rules applied 164 place count 229 transition count 270
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 168 place count 225 transition count 266
Iterating global reduction 0 with 4 rules applied. Total rules applied 172 place count 225 transition count 266
Applied a total of 172 rules in 43 ms. Remains 225 /311 variables (removed 86) and now considering 266/363 (removed 97) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 43 ms. Remains : 225/311 places, 266/363 transitions.
[2023-03-09 01:56:16] [INFO ] Flatten gal took : 11 ms
[2023-03-09 01:56:16] [INFO ] Flatten gal took : 12 ms
[2023-03-09 01:56:16] [INFO ] Input system was already deterministic with 266 transitions.
Starting structural reductions in LTL mode, iteration 0 : 311/311 places, 363/363 transitions.
Discarding 26 places :
Symmetric choice reduction at 0 with 26 rule applications. Total rules 26 place count 285 transition count 337
Iterating global reduction 0 with 26 rules applied. Total rules applied 52 place count 285 transition count 337
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 61 place count 276 transition count 328
Iterating global reduction 0 with 9 rules applied. Total rules applied 70 place count 276 transition count 328
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 77 place count 269 transition count 319
Iterating global reduction 0 with 7 rules applied. Total rules applied 84 place count 269 transition count 319
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 91 place count 262 transition count 311
Iterating global reduction 0 with 7 rules applied. Total rules applied 98 place count 262 transition count 311
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 105 place count 255 transition count 300
Iterating global reduction 0 with 7 rules applied. Total rules applied 112 place count 255 transition count 300
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 117 place count 250 transition count 295
Iterating global reduction 0 with 5 rules applied. Total rules applied 122 place count 250 transition count 295
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 126 place count 246 transition count 291
Iterating global reduction 0 with 4 rules applied. Total rules applied 130 place count 246 transition count 291
Applied a total of 130 rules in 53 ms. Remains 246 /311 variables (removed 65) and now considering 291/363 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 55 ms. Remains : 246/311 places, 291/363 transitions.
[2023-03-09 01:56:16] [INFO ] Flatten gal took : 12 ms
[2023-03-09 01:56:16] [INFO ] Flatten gal took : 13 ms
[2023-03-09 01:56:16] [INFO ] Input system was already deterministic with 291 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 311/311 places, 363/363 transitions.
Graph (complete) has 601 edges and 311 vertex of which 304 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.1 ms
Discarding 7 places :
Also discarding 7 output transitions
Drop transitions removed 7 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 56 transitions
Trivial Post-agglo rules discarded 56 transitions
Performed 56 trivial Post agglomeration. Transition count delta: 56
Iterating post reduction 0 with 56 rules applied. Total rules applied 57 place count 303 transition count 299
Reduce places removed 56 places and 0 transitions.
Iterating post reduction 1 with 56 rules applied. Total rules applied 113 place count 247 transition count 299
Performed 31 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 31 Pre rules applied. Total rules applied 113 place count 247 transition count 268
Deduced a syphon composed of 31 places in 0 ms
Reduce places removed 31 places and 0 transitions.
Iterating global reduction 2 with 62 rules applied. Total rules applied 175 place count 216 transition count 268
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 187 place count 204 transition count 256
Iterating global reduction 2 with 12 rules applied. Total rules applied 199 place count 204 transition count 256
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 199 place count 204 transition count 255
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 201 place count 203 transition count 255
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 210 place count 194 transition count 246
Iterating global reduction 2 with 9 rules applied. Total rules applied 219 place count 194 transition count 246
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 228 place count 185 transition count 232
Iterating global reduction 2 with 9 rules applied. Total rules applied 237 place count 185 transition count 232
Discarding 8 places :
Symmetric choice reduction at 2 with 8 rule applications. Total rules 245 place count 177 transition count 221
Iterating global reduction 2 with 8 rules applied. Total rules applied 253 place count 177 transition count 221
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 256 place count 174 transition count 218
Iterating global reduction 2 with 3 rules applied. Total rules applied 259 place count 174 transition count 218
Performed 27 Post agglomeration using F-continuation condition.Transition count delta: 27
Deduced a syphon composed of 27 places in 0 ms
Reduce places removed 27 places and 0 transitions.
Iterating global reduction 2 with 54 rules applied. Total rules applied 313 place count 147 transition count 191
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 315 place count 145 transition count 188
Iterating global reduction 2 with 2 rules applied. Total rules applied 317 place count 145 transition count 188
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 319 place count 143 transition count 185
Iterating global reduction 2 with 2 rules applied. Total rules applied 321 place count 143 transition count 185
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 322 place count 142 transition count 184
Iterating global reduction 2 with 1 rules applied. Total rules applied 323 place count 142 transition count 184
Partial Post-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 2 with 2 rules applied. Total rules applied 325 place count 142 transition count 184
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 2 with 1 rules applied. Total rules applied 326 place count 141 transition count 183
Reduce places removed 1 places and 0 transitions.
Drop transitions removed 13 transitions
Trivial Post-agglo rules discarded 13 transitions
Performed 13 trivial Post agglomeration. Transition count delta: 13
Iterating post reduction 2 with 14 rules applied. Total rules applied 340 place count 140 transition count 170
Reduce places removed 13 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 3 with 14 rules applied. Total rules applied 354 place count 127 transition count 169
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 355 place count 126 transition count 169
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 1 Pre rules applied. Total rules applied 355 place count 126 transition count 168
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 357 place count 125 transition count 168
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 359 place count 124 transition count 167
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 360 place count 124 transition count 166
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 6 with 2 rules applied. Total rules applied 362 place count 123 transition count 165
Applied a total of 362 rules in 85 ms. Remains 123 /311 variables (removed 188) and now considering 165/363 (removed 198) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 86 ms. Remains : 123/311 places, 165/363 transitions.
[2023-03-09 01:56:17] [INFO ] Flatten gal took : 8 ms
[2023-03-09 01:56:17] [INFO ] Flatten gal took : 8 ms
[2023-03-09 01:56:17] [INFO ] Input system was already deterministic with 165 transitions.
Starting structural reductions in LTL mode, iteration 0 : 311/311 places, 363/363 transitions.
Discarding 26 places :
Symmetric choice reduction at 0 with 26 rule applications. Total rules 26 place count 285 transition count 337
Iterating global reduction 0 with 26 rules applied. Total rules applied 52 place count 285 transition count 337
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 64 place count 273 transition count 324
Iterating global reduction 0 with 12 rules applied. Total rules applied 76 place count 273 transition count 324
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 86 place count 263 transition count 311
Iterating global reduction 0 with 10 rules applied. Total rules applied 96 place count 263 transition count 311
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 103 place count 256 transition count 303
Iterating global reduction 0 with 7 rules applied. Total rules applied 110 place count 256 transition count 303
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 116 place count 250 transition count 294
Iterating global reduction 0 with 6 rules applied. Total rules applied 122 place count 250 transition count 294
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 126 place count 246 transition count 290
Iterating global reduction 0 with 4 rules applied. Total rules applied 130 place count 246 transition count 290
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 133 place count 243 transition count 287
Iterating global reduction 0 with 3 rules applied. Total rules applied 136 place count 243 transition count 287
Applied a total of 136 rules in 46 ms. Remains 243 /311 variables (removed 68) and now considering 287/363 (removed 76) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 47 ms. Remains : 243/311 places, 287/363 transitions.
[2023-03-09 01:56:17] [INFO ] Flatten gal took : 11 ms
[2023-03-09 01:56:17] [INFO ] Flatten gal took : 12 ms
[2023-03-09 01:56:17] [INFO ] Input system was already deterministic with 287 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 311/311 places, 363/363 transitions.
Graph (complete) has 601 edges and 311 vertex of which 304 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.1 ms
Discarding 7 places :
Also discarding 7 output transitions
Drop transitions removed 7 transitions
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 58 transitions
Trivial Post-agglo rules discarded 58 transitions
Performed 58 trivial Post agglomeration. Transition count delta: 58
Iterating post reduction 0 with 58 rules applied. Total rules applied 59 place count 303 transition count 297
Reduce places removed 58 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 59 rules applied. Total rules applied 118 place count 245 transition count 296
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 119 place count 244 transition count 296
Performed 33 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 33 Pre rules applied. Total rules applied 119 place count 244 transition count 263
Deduced a syphon composed of 33 places in 1 ms
Reduce places removed 33 places and 0 transitions.
Iterating global reduction 3 with 66 rules applied. Total rules applied 185 place count 211 transition count 263
Discarding 12 places :
Symmetric choice reduction at 3 with 12 rule applications. Total rules 197 place count 199 transition count 251
Iterating global reduction 3 with 12 rules applied. Total rules applied 209 place count 199 transition count 251
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 209 place count 199 transition count 249
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 213 place count 197 transition count 249
Discarding 9 places :
Symmetric choice reduction at 3 with 9 rule applications. Total rules 222 place count 188 transition count 240
Iterating global reduction 3 with 9 rules applied. Total rules applied 231 place count 188 transition count 240
Discarding 9 places :
Symmetric choice reduction at 3 with 9 rule applications. Total rules 240 place count 179 transition count 226
Iterating global reduction 3 with 9 rules applied. Total rules applied 249 place count 179 transition count 226
Discarding 9 places :
Symmetric choice reduction at 3 with 9 rule applications. Total rules 258 place count 170 transition count 213
Iterating global reduction 3 with 9 rules applied. Total rules applied 267 place count 170 transition count 213
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 271 place count 166 transition count 209
Iterating global reduction 3 with 4 rules applied. Total rules applied 275 place count 166 transition count 209
Performed 27 Post agglomeration using F-continuation condition.Transition count delta: 27
Deduced a syphon composed of 27 places in 0 ms
Reduce places removed 27 places and 0 transitions.
Iterating global reduction 3 with 54 rules applied. Total rules applied 329 place count 139 transition count 182
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 331 place count 137 transition count 179
Iterating global reduction 3 with 2 rules applied. Total rules applied 333 place count 137 transition count 179
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 335 place count 135 transition count 176
Iterating global reduction 3 with 2 rules applied. Total rules applied 337 place count 135 transition count 176
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 338 place count 134 transition count 175
Iterating global reduction 3 with 1 rules applied. Total rules applied 339 place count 134 transition count 175
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 341 place count 132 transition count 173
Reduce places removed 2 places and 0 transitions.
Graph (complete) has 158 edges and 130 vertex of which 126 are kept as prefixes of interest. Removing 4 places using SCC suffix rule.1 ms
Discarding 4 places :
Also discarding 5 output transitions
Drop transitions removed 5 transitions
Graph (trivial) has 138 edges and 126 vertex of which 56 / 126 are part of one of the 28 SCC in 1 ms
Free SCC test removed 28 places
Drop transitions removed 40 transitions
Trivial Post-agglo rules discarded 40 transitions
Performed 40 trivial Post agglomeration. Transition count delta: 40
Iterating post reduction 3 with 44 rules applied. Total rules applied 385 place count 98 transition count 128
Reduce places removed 40 places and 0 transitions.
Ensure Unique test removed 28 transitions
Reduce isomorphic transitions removed 28 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 4 with 69 rules applied. Total rules applied 454 place count 58 transition count 99
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 455 place count 57 transition count 99
Discarding 13 places :
Symmetric choice reduction at 6 with 13 rule applications. Total rules 468 place count 44 transition count 73
Iterating global reduction 6 with 13 rules applied. Total rules applied 481 place count 44 transition count 73
Discarding 12 places :
Symmetric choice reduction at 6 with 12 rule applications. Total rules 493 place count 32 transition count 49
Iterating global reduction 6 with 12 rules applied. Total rules applied 505 place count 32 transition count 49
Discarding 12 places :
Symmetric choice reduction at 6 with 12 rule applications. Total rules 517 place count 20 transition count 25
Iterating global reduction 6 with 12 rules applied. Total rules applied 529 place count 20 transition count 25
Discarding 12 places :
Symmetric choice reduction at 6 with 12 rule applications. Total rules 541 place count 8 transition count 13
Iterating global reduction 6 with 12 rules applied. Total rules applied 553 place count 8 transition count 13
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 6 with 2 rules applied. Total rules applied 555 place count 8 transition count 11
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 6 with 1 rules applied. Total rules applied 556 place count 8 transition count 10
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 7 with 1 rules applied. Total rules applied 557 place count 7 transition count 10
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 8 with 2 rules applied. Total rules applied 559 place count 5 transition count 8
Applied a total of 559 rules in 73 ms. Remains 5 /311 variables (removed 306) and now considering 8/363 (removed 355) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 73 ms. Remains : 5/311 places, 8/363 transitions.
[2023-03-09 01:56:17] [INFO ] Flatten gal took : 0 ms
[2023-03-09 01:56:17] [INFO ] Flatten gal took : 0 ms
[2023-03-09 01:56:17] [INFO ] Input system was already deterministic with 8 transitions.
Finished random walk after 30 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=30 )
FORMULA DiscoveryGPU-PT-14b-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 311/311 places, 363/363 transitions.
Discarding 22 places :
Symmetric choice reduction at 0 with 22 rule applications. Total rules 22 place count 289 transition count 341
Iterating global reduction 0 with 22 rules applied. Total rules applied 44 place count 289 transition count 341
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 50 place count 283 transition count 334
Iterating global reduction 0 with 6 rules applied. Total rules applied 56 place count 283 transition count 334
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 62 place count 277 transition count 324
Iterating global reduction 0 with 6 rules applied. Total rules applied 68 place count 277 transition count 324
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 74 place count 271 transition count 317
Iterating global reduction 0 with 6 rules applied. Total rules applied 80 place count 271 transition count 317
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 85 place count 266 transition count 312
Iterating global reduction 0 with 5 rules applied. Total rules applied 90 place count 266 transition count 312
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 91 place count 265 transition count 311
Iterating global reduction 0 with 1 rules applied. Total rules applied 92 place count 265 transition count 311
Applied a total of 92 rules in 31 ms. Remains 265 /311 variables (removed 46) and now considering 311/363 (removed 52) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 32 ms. Remains : 265/311 places, 311/363 transitions.
[2023-03-09 01:56:17] [INFO ] Flatten gal took : 13 ms
[2023-03-09 01:56:17] [INFO ] Flatten gal took : 14 ms
[2023-03-09 01:56:17] [INFO ] Input system was already deterministic with 311 transitions.
Starting structural reductions in LTL mode, iteration 0 : 311/311 places, 363/363 transitions.
Discarding 30 places :
Symmetric choice reduction at 0 with 30 rule applications. Total rules 30 place count 281 transition count 333
Iterating global reduction 0 with 30 rules applied. Total rules applied 60 place count 281 transition count 333
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 71 place count 270 transition count 321
Iterating global reduction 0 with 11 rules applied. Total rules applied 82 place count 270 transition count 321
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 91 place count 261 transition count 309
Iterating global reduction 0 with 9 rules applied. Total rules applied 100 place count 261 transition count 309
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 108 place count 253 transition count 299
Iterating global reduction 0 with 8 rules applied. Total rules applied 116 place count 253 transition count 299
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 123 place count 246 transition count 289
Iterating global reduction 0 with 7 rules applied. Total rules applied 130 place count 246 transition count 289
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 135 place count 241 transition count 284
Iterating global reduction 0 with 5 rules applied. Total rules applied 140 place count 241 transition count 284
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 143 place count 238 transition count 281
Iterating global reduction 0 with 3 rules applied. Total rules applied 146 place count 238 transition count 281
Applied a total of 146 rules in 34 ms. Remains 238 /311 variables (removed 73) and now considering 281/363 (removed 82) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 34 ms. Remains : 238/311 places, 281/363 transitions.
[2023-03-09 01:56:17] [INFO ] Flatten gal took : 11 ms
[2023-03-09 01:56:17] [INFO ] Flatten gal took : 13 ms
[2023-03-09 01:56:17] [INFO ] Input system was already deterministic with 281 transitions.
[2023-03-09 01:56:17] [INFO ] Flatten gal took : 15 ms
[2023-03-09 01:56:17] [INFO ] Flatten gal took : 16 ms
[2023-03-09 01:56:17] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-09 01:56:17] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 311 places, 363 transitions and 962 arcs took 7 ms.
Total runtime 6888 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DiscoveryGPU-PT-14b
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/369
CTLFireability

FORMULA DiscoveryGPU-PT-14b-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-14b-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-14b-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-14b-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-14b-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-14b-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-14b-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-14b-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-14b-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-14b-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-14b-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678327264542

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/369/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/369/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/369/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 34 (type EXCL) for 33 DiscoveryGPU-PT-14b-CTLFireability-12
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 34 (type EXCL) for DiscoveryGPU-PT-14b-CTLFireability-12
lola: result : true
lola: markings : 304
lola: fired transitions : 335
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 4 (type EXCL) for 3 DiscoveryGPU-PT-14b-CTLFireability-01
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/276 3/32 DiscoveryGPU-PT-14b-CTLFireability-01 374154 m, 74830 m/sec, 1395238 t fired, .

Time elapsed: 6 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/276 5/32 DiscoveryGPU-PT-14b-CTLFireability-01 746735 m, 74516 m/sec, 2838840 t fired, .

Time elapsed: 11 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 15/276 7/32 DiscoveryGPU-PT-14b-CTLFireability-01 1108887 m, 72430 m/sec, 4293544 t fired, .

Time elapsed: 16 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 20/276 9/32 DiscoveryGPU-PT-14b-CTLFireability-01 1459275 m, 70077 m/sec, 5677217 t fired, .

Time elapsed: 21 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 25/276 11/32 DiscoveryGPU-PT-14b-CTLFireability-01 1824000 m, 72945 m/sec, 7115305 t fired, .

Time elapsed: 26 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 30/276 14/32 DiscoveryGPU-PT-14b-CTLFireability-01 2199232 m, 75046 m/sec, 8572257 t fired, .

Time elapsed: 31 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 35/276 15/32 DiscoveryGPU-PT-14b-CTLFireability-01 2515202 m, 63194 m/sec, 10013640 t fired, .

Time elapsed: 36 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 40/276 17/32 DiscoveryGPU-PT-14b-CTLFireability-01 2781248 m, 53209 m/sec, 11493206 t fired, .

Time elapsed: 41 secs. Pages in use: 17
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 45/276 19/32 DiscoveryGPU-PT-14b-CTLFireability-01 3046614 m, 53073 m/sec, 12979026 t fired, .

Time elapsed: 46 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 50/276 20/32 DiscoveryGPU-PT-14b-CTLFireability-01 3313305 m, 53338 m/sec, 14445750 t fired, .

Time elapsed: 51 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 55/276 22/32 DiscoveryGPU-PT-14b-CTLFireability-01 3583883 m, 54115 m/sec, 15925192 t fired, .

Time elapsed: 56 secs. Pages in use: 22
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 60/276 23/32 DiscoveryGPU-PT-14b-CTLFireability-01 3861288 m, 55481 m/sec, 17376348 t fired, .

Time elapsed: 61 secs. Pages in use: 23
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 65/276 25/32 DiscoveryGPU-PT-14b-CTLFireability-01 4212202 m, 70182 m/sec, 18802689 t fired, .

Time elapsed: 66 secs. Pages in use: 25
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 70/276 27/32 DiscoveryGPU-PT-14b-CTLFireability-01 4529058 m, 63371 m/sec, 20219014 t fired, .

Time elapsed: 71 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 75/276 29/32 DiscoveryGPU-PT-14b-CTLFireability-01 4858696 m, 65927 m/sec, 21652484 t fired, .

Time elapsed: 76 secs. Pages in use: 29
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 80/276 31/32 DiscoveryGPU-PT-14b-CTLFireability-01 5198124 m, 67885 m/sec, 23078418 t fired, .

Time elapsed: 81 secs. Pages in use: 31
# running tasks: 1 of 4 Visible: 14
lola: CANCELED task # 4 (type EXCL) for DiscoveryGPU-PT-14b-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 86 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
lola: LAUNCH task # 37 (type EXCL) for 36 DiscoveryGPU-PT-14b-CTLFireability-14
lola: time limit : 292 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for DiscoveryGPU-PT-14b-CTLFireability-14
lola: result : true
lola: markings : 91
lola: fired transitions : 93
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 DiscoveryGPU-PT-14b-CTLFireability-10
lola: time limit : 319 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for DiscoveryGPU-PT-14b-CTLFireability-10
lola: result : false
lola: markings : 120
lola: fired transitions : 120
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 DiscoveryGPU-PT-14b-CTLFireability-09
lola: time limit : 351 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for DiscoveryGPU-PT-14b-CTLFireability-09
lola: result : true
lola: markings : 54
lola: fired transitions : 55
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 DiscoveryGPU-PT-14b-CTLFireability-08
lola: time limit : 390 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for DiscoveryGPU-PT-14b-CTLFireability-08
lola: result : true
lola: markings : 36
lola: fired transitions : 36
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 DiscoveryGPU-PT-14b-CTLFireability-07
lola: time limit : 439 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for DiscoveryGPU-PT-14b-CTLFireability-07
lola: result : false
lola: markings : 121
lola: fired transitions : 241
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 DiscoveryGPU-PT-14b-CTLFireability-04
lola: time limit : 502 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 5/502 2/32 DiscoveryGPU-PT-14b-CTLFireability-04 319482 m, 63896 m/sec, 1596390 t fired, .

Time elapsed: 91 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 10/502 4/32 DiscoveryGPU-PT-14b-CTLFireability-04 599792 m, 56062 m/sec, 3106054 t fired, .

Time elapsed: 96 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 15/502 5/32 DiscoveryGPU-PT-14b-CTLFireability-04 858951 m, 51831 m/sec, 4491072 t fired, .

Time elapsed: 101 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 20/502 7/32 DiscoveryGPU-PT-14b-CTLFireability-04 1150199 m, 58249 m/sec, 6035098 t fired, .

Time elapsed: 106 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 25/502 8/32 DiscoveryGPU-PT-14b-CTLFireability-04 1435154 m, 56991 m/sec, 7590588 t fired, .

Time elapsed: 111 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 30/502 10/32 DiscoveryGPU-PT-14b-CTLFireability-04 1719114 m, 56792 m/sec, 9111043 t fired, .

Time elapsed: 116 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 35/502 12/32 DiscoveryGPU-PT-14b-CTLFireability-04 2010230 m, 58223 m/sec, 10690040 t fired, .

Time elapsed: 121 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 40/502 13/32 DiscoveryGPU-PT-14b-CTLFireability-04 2283545 m, 54663 m/sec, 12282229 t fired, .

Time elapsed: 126 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 45/502 14/32 DiscoveryGPU-PT-14b-CTLFireability-04 2550084 m, 53307 m/sec, 13860703 t fired, .

Time elapsed: 131 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 50/502 16/32 DiscoveryGPU-PT-14b-CTLFireability-04 2821381 m, 54259 m/sec, 15455426 t fired, .

Time elapsed: 136 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 55/502 17/32 DiscoveryGPU-PT-14b-CTLFireability-04 3089165 m, 53556 m/sec, 17046109 t fired, .

Time elapsed: 141 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 60/502 19/32 DiscoveryGPU-PT-14b-CTLFireability-04 3366283 m, 55423 m/sec, 18607133 t fired, .

Time elapsed: 146 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 65/502 20/32 DiscoveryGPU-PT-14b-CTLFireability-04 3650165 m, 56776 m/sec, 20129075 t fired, .

Time elapsed: 151 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 70/502 22/32 DiscoveryGPU-PT-14b-CTLFireability-04 3920997 m, 54166 m/sec, 21655912 t fired, .

Time elapsed: 156 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 75/502 23/32 DiscoveryGPU-PT-14b-CTLFireability-04 4193333 m, 54467 m/sec, 23172522 t fired, .

Time elapsed: 161 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 80/502 25/32 DiscoveryGPU-PT-14b-CTLFireability-04 4463323 m, 53998 m/sec, 24701711 t fired, .

Time elapsed: 166 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 85/502 26/32 DiscoveryGPU-PT-14b-CTLFireability-04 4737331 m, 54801 m/sec, 26260425 t fired, .

Time elapsed: 171 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 90/502 28/32 DiscoveryGPU-PT-14b-CTLFireability-04 5009866 m, 54507 m/sec, 27793666 t fired, .

Time elapsed: 176 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 95/502 29/32 DiscoveryGPU-PT-14b-CTLFireability-04 5285903 m, 55207 m/sec, 29320627 t fired, .

Time elapsed: 181 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 100/502 30/32 DiscoveryGPU-PT-14b-CTLFireability-04 5559597 m, 54738 m/sec, 30875586 t fired, .

Time elapsed: 186 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 105/502 32/32 DiscoveryGPU-PT-14b-CTLFireability-04 5822432 m, 52567 m/sec, 32411565 t fired, .

Time elapsed: 191 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
lola: CANCELED task # 13 (type EXCL) for DiscoveryGPU-PT-14b-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-06: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-14b-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 196 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
lola: LAUNCH task # 10 (type EXCL) for 9 DiscoveryGPU-PT-14b-CTLFireability-03
lola: time limit : 567 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for DiscoveryGPU-PT-14b-CTLFireability-03
lola: result : false
lola: markings : 3151
lola: fired transitions : 5337
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 DiscoveryGPU-PT-14b-CTLFireability-02
lola: time limit : 680 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for DiscoveryGPU-PT-14b-CTLFireability-02
lola: result : false
lola: markings : 206
lola: fired transitions : 217
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 DiscoveryGPU-PT-14b-CTLFireability-00
lola: time limit : 851 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for DiscoveryGPU-PT-14b-CTLFireability-00
lola: result : false
lola: markings : 36
lola: fired transitions : 38
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 DiscoveryGPU-PT-14b-CTLFireability-06
lola: time limit : 1134 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for DiscoveryGPU-PT-14b-CTLFireability-06
lola: result : true
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 DiscoveryGPU-PT-14b-CTLFireability-15
lola: time limit : 1702 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for DiscoveryGPU-PT-14b-CTLFireability-15
lola: result : false
lola: markings : 36
lola: fired transitions : 108
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 DiscoveryGPU-PT-14b-CTLFireability-11
lola: time limit : 3404 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 5/3404 2/32 DiscoveryGPU-PT-14b-CTLFireability-11 401182 m, 80236 m/sec, 2918404 t fired, .

Time elapsed: 201 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 10/3404 4/32 DiscoveryGPU-PT-14b-CTLFireability-11 797923 m, 79348 m/sec, 6097956 t fired, .

Time elapsed: 206 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 15/3404 6/32 DiscoveryGPU-PT-14b-CTLFireability-11 1178707 m, 76156 m/sec, 9259276 t fired, .

Time elapsed: 211 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 20/3404 8/32 DiscoveryGPU-PT-14b-CTLFireability-11 1560590 m, 76376 m/sec, 12417434 t fired, .

Time elapsed: 216 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 25/3404 10/32 DiscoveryGPU-PT-14b-CTLFireability-11 1939252 m, 75732 m/sec, 15526927 t fired, .

Time elapsed: 221 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 30/3404 12/32 DiscoveryGPU-PT-14b-CTLFireability-11 2304540 m, 73057 m/sec, 18538831 t fired, .

Time elapsed: 226 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 35/3404 14/32 DiscoveryGPU-PT-14b-CTLFireability-11 2682042 m, 75500 m/sec, 21614541 t fired, .

Time elapsed: 231 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 40/3404 16/32 DiscoveryGPU-PT-14b-CTLFireability-11 3086184 m, 80828 m/sec, 24646453 t fired, .

Time elapsed: 236 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 45/3404 18/32 DiscoveryGPU-PT-14b-CTLFireability-11 3465992 m, 75961 m/sec, 27646893 t fired, .

Time elapsed: 241 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 50/3404 19/32 DiscoveryGPU-PT-14b-CTLFireability-11 3799592 m, 66720 m/sec, 30587905 t fired, .

Time elapsed: 246 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 55/3404 21/32 DiscoveryGPU-PT-14b-CTLFireability-11 4129101 m, 65901 m/sec, 33378157 t fired, .

Time elapsed: 251 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 60/3404 23/32 DiscoveryGPU-PT-14b-CTLFireability-11 4442611 m, 62702 m/sec, 36239016 t fired, .

Time elapsed: 256 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 65/3404 24/32 DiscoveryGPU-PT-14b-CTLFireability-11 4785264 m, 68530 m/sec, 39220758 t fired, .

Time elapsed: 261 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 70/3404 26/32 DiscoveryGPU-PT-14b-CTLFireability-11 5136660 m, 70279 m/sec, 42175996 t fired, .

Time elapsed: 266 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 75/3404 28/32 DiscoveryGPU-PT-14b-CTLFireability-11 5471564 m, 66980 m/sec, 44816470 t fired, .

Time elapsed: 271 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 80/3404 30/32 DiscoveryGPU-PT-14b-CTLFireability-11 5849855 m, 75658 m/sec, 48018315 t fired, .

Time elapsed: 276 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 85/3404 31/32 DiscoveryGPU-PT-14b-CTLFireability-11 6202024 m, 70433 m/sec, 51076861 t fired, .

Time elapsed: 281 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
lola: CANCELED task # 31 (type EXCL) for DiscoveryGPU-PT-14b-CTLFireability-11 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-14b-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-14b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 286 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 14
lola: Portfolio finished: no open tasks 14

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-14b-CTLFireability-00: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-01: CTL unknown AGGR
DiscoveryGPU-PT-14b-CTLFireability-02: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-03: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-04: CTL unknown AGGR
DiscoveryGPU-PT-14b-CTLFireability-06: EG true state space / EG
DiscoveryGPU-PT-14b-CTLFireability-07: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-08: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-09: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-10: CTL false CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-11: CTL unknown AGGR
DiscoveryGPU-PT-14b-CTLFireability-12: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-14: CTL true CTL model checker
DiscoveryGPU-PT-14b-CTLFireability-15: CTL false CTL model checker


Time elapsed: 286 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DiscoveryGPU-PT-14b"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DiscoveryGPU-PT-14b, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r135-smll-167819414300418"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DiscoveryGPU-PT-14b.tgz
mv DiscoveryGPU-PT-14b execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;