Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r135-smll-167819414000297.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DiscoveryGPU-PT-07a, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r135-smll-167819414000297
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 6.5K Feb 25 13:36 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K Feb 25 13:36 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 13:33 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 13:33 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 15:59 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 15:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:59 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:59 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 13:37 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 156K Feb 25 13:37 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Feb 25 13:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 55K Feb 25 13:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:59 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:59 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 25K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DiscoveryGPU-PT-07a-CTLCardinality-00
FORMULA_NAME DiscoveryGPU-PT-07a-CTLCardinality-01
FORMULA_NAME DiscoveryGPU-PT-07a-CTLCardinality-02
FORMULA_NAME DiscoveryGPU-PT-07a-CTLCardinality-03
FORMULA_NAME DiscoveryGPU-PT-07a-CTLCardinality-04
FORMULA_NAME DiscoveryGPU-PT-07a-CTLCardinality-05
FORMULA_NAME DiscoveryGPU-PT-07a-CTLCardinality-06
FORMULA_NAME DiscoveryGPU-PT-07a-CTLCardinality-07
FORMULA_NAME DiscoveryGPU-PT-07a-CTLCardinality-08
FORMULA_NAME DiscoveryGPU-PT-07a-CTLCardinality-09
FORMULA_NAME DiscoveryGPU-PT-07a-CTLCardinality-10
FORMULA_NAME DiscoveryGPU-PT-07a-CTLCardinality-11
FORMULA_NAME DiscoveryGPU-PT-07a-CTLCardinality-12
FORMULA_NAME DiscoveryGPU-PT-07a-CTLCardinality-13
FORMULA_NAME DiscoveryGPU-PT-07a-CTLCardinality-14
FORMULA_NAME DiscoveryGPU-PT-07a-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678314713585

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DiscoveryGPU-PT-07a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 22:31:57] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-08 22:31:57] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 22:31:57] [INFO ] Load time of PNML (sax parser for PT used): 113 ms
[2023-03-08 22:31:57] [INFO ] Transformed 73 places.
[2023-03-08 22:31:57] [INFO ] Transformed 99 transitions.
[2023-03-08 22:31:57] [INFO ] Found NUPN structural information;
[2023-03-08 22:31:57] [INFO ] Parsed PT model containing 73 places and 99 transitions and 318 arcs in 271 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 29 ms.
Initial state reduction rules removed 1 formulas.
FORMULA DiscoveryGPU-PT-07a-CTLCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DiscoveryGPU-PT-07a-CTLCardinality-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 57 out of 73 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 73/73 places, 99/99 transitions.
Drop transitions removed 7 transitions
Redundant transition composition rules discarded 7 transitions
Iterating global reduction 0 with 7 rules applied. Total rules applied 7 place count 73 transition count 92
Applied a total of 7 rules in 31 ms. Remains 73 /73 variables (removed 0) and now considering 92/99 (removed 7) transitions.
// Phase 1: matrix 92 rows 73 cols
[2023-03-08 22:31:57] [INFO ] Computed 2 place invariants in 10 ms
[2023-03-08 22:31:58] [INFO ] Implicit Places using invariants in 363 ms returned []
[2023-03-08 22:31:58] [INFO ] Invariant cache hit.
[2023-03-08 22:31:58] [INFO ] State equation strengthened by 56 read => feed constraints.
[2023-03-08 22:31:58] [INFO ] Implicit Places using invariants and state equation in 216 ms returned []
Implicit Place search using SMT with State Equation took 645 ms to find 0 implicit places.
[2023-03-08 22:31:58] [INFO ] Invariant cache hit.
[2023-03-08 22:31:58] [INFO ] Dead Transitions using invariants and state equation in 232 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 73/73 places, 92/99 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 911 ms. Remains : 73/73 places, 92/99 transitions.
Support contains 57 out of 73 places after structural reductions.
[2023-03-08 22:31:59] [INFO ] Flatten gal took : 56 ms
[2023-03-08 22:31:59] [INFO ] Flatten gal took : 24 ms
[2023-03-08 22:31:59] [INFO ] Input system was already deterministic with 92 transitions.
Support contains 56 out of 73 places (down from 57) after GAL structural reductions.
Finished random walk after 2142 steps, including 26 resets, run visited all 50 properties in 248 ms. (steps per millisecond=8 )
[2023-03-08 22:31:59] [INFO ] Flatten gal took : 13 ms
[2023-03-08 22:31:59] [INFO ] Flatten gal took : 15 ms
[2023-03-08 22:31:59] [INFO ] Input system was already deterministic with 92 transitions.
Computed a total of 10 stabilizing places and 8 stable transitions
Graph (complete) has 200 edges and 73 vertex of which 66 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.4 ms
Starting structural reductions in LTL mode, iteration 0 : 73/73 places, 92/92 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 70 transition count 89
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 70 transition count 89
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 9 place count 67 transition count 86
Iterating global reduction 0 with 3 rules applied. Total rules applied 12 place count 67 transition count 86
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 14 place count 65 transition count 84
Iterating global reduction 0 with 2 rules applied. Total rules applied 16 place count 65 transition count 84
Applied a total of 16 rules in 24 ms. Remains 65 /73 variables (removed 8) and now considering 84/92 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24 ms. Remains : 65/73 places, 84/92 transitions.
[2023-03-08 22:31:59] [INFO ] Flatten gal took : 11 ms
[2023-03-08 22:31:59] [INFO ] Flatten gal took : 11 ms
[2023-03-08 22:31:59] [INFO ] Input system was already deterministic with 84 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 73/73 places, 92/92 transitions.
Graph (complete) has 200 edges and 73 vertex of which 68 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.1 ms
Discarding 5 places :
Also discarding 5 output transitions
Drop transitions removed 5 transitions
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 6 Pre rules applied. Total rules applied 1 place count 68 transition count 81
Deduced a syphon composed of 6 places in 1 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 0 with 12 rules applied. Total rules applied 13 place count 62 transition count 81
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 17 place count 58 transition count 77
Iterating global reduction 0 with 4 rules applied. Total rules applied 21 place count 58 transition count 77
Applied a total of 21 rules in 34 ms. Remains 58 /73 variables (removed 15) and now considering 77/92 (removed 15) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 34 ms. Remains : 58/73 places, 77/92 transitions.
[2023-03-08 22:31:59] [INFO ] Flatten gal took : 9 ms
[2023-03-08 22:31:59] [INFO ] Flatten gal took : 10 ms
[2023-03-08 22:31:59] [INFO ] Input system was already deterministic with 77 transitions.
Starting structural reductions in LTL mode, iteration 0 : 73/73 places, 92/92 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 67 transition count 86
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 67 transition count 86
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 17 place count 62 transition count 81
Iterating global reduction 0 with 5 rules applied. Total rules applied 22 place count 62 transition count 81
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 27 place count 57 transition count 76
Iterating global reduction 0 with 5 rules applied. Total rules applied 32 place count 57 transition count 76
Applied a total of 32 rules in 16 ms. Remains 57 /73 variables (removed 16) and now considering 76/92 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 57/73 places, 76/92 transitions.
[2023-03-08 22:31:59] [INFO ] Flatten gal took : 8 ms
[2023-03-08 22:31:59] [INFO ] Flatten gal took : 9 ms
[2023-03-08 22:31:59] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 73/73 places, 92/92 transitions.
Graph (complete) has 200 edges and 73 vertex of which 66 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.1 ms
Discarding 7 places :
Also discarding 7 output transitions
Drop transitions removed 7 transitions
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 5 Pre rules applied. Total rules applied 1 place count 66 transition count 80
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 0 with 10 rules applied. Total rules applied 11 place count 61 transition count 80
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 16 place count 56 transition count 75
Iterating global reduction 0 with 5 rules applied. Total rules applied 21 place count 56 transition count 75
Applied a total of 21 rules in 18 ms. Remains 56 /73 variables (removed 17) and now considering 75/92 (removed 17) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 56/73 places, 75/92 transitions.
[2023-03-08 22:31:59] [INFO ] Flatten gal took : 7 ms
[2023-03-08 22:31:59] [INFO ] Flatten gal took : 8 ms
[2023-03-08 22:31:59] [INFO ] Input system was already deterministic with 75 transitions.
Starting structural reductions in LTL mode, iteration 0 : 73/73 places, 92/92 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 67 transition count 86
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 67 transition count 86
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 18 place count 61 transition count 80
Iterating global reduction 0 with 6 rules applied. Total rules applied 24 place count 61 transition count 80
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 29 place count 56 transition count 75
Iterating global reduction 0 with 5 rules applied. Total rules applied 34 place count 56 transition count 75
Applied a total of 34 rules in 15 ms. Remains 56 /73 variables (removed 17) and now considering 75/92 (removed 17) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 56/73 places, 75/92 transitions.
[2023-03-08 22:31:59] [INFO ] Flatten gal took : 6 ms
[2023-03-08 22:31:59] [INFO ] Flatten gal took : 8 ms
[2023-03-08 22:31:59] [INFO ] Input system was already deterministic with 75 transitions.
Starting structural reductions in LTL mode, iteration 0 : 73/73 places, 92/92 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 68 transition count 87
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 68 transition count 87
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 14 place count 64 transition count 83
Iterating global reduction 0 with 4 rules applied. Total rules applied 18 place count 64 transition count 83
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 21 place count 61 transition count 80
Iterating global reduction 0 with 3 rules applied. Total rules applied 24 place count 61 transition count 80
Applied a total of 24 rules in 14 ms. Remains 61 /73 variables (removed 12) and now considering 80/92 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 61/73 places, 80/92 transitions.
[2023-03-08 22:31:59] [INFO ] Flatten gal took : 7 ms
[2023-03-08 22:31:59] [INFO ] Flatten gal took : 9 ms
[2023-03-08 22:32:00] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in LTL mode, iteration 0 : 73/73 places, 92/92 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 68 transition count 87
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 68 transition count 87
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 15 place count 63 transition count 82
Iterating global reduction 0 with 5 rules applied. Total rules applied 20 place count 63 transition count 82
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 24 place count 59 transition count 78
Iterating global reduction 0 with 4 rules applied. Total rules applied 28 place count 59 transition count 78
Applied a total of 28 rules in 14 ms. Remains 59 /73 variables (removed 14) and now considering 78/92 (removed 14) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 59/73 places, 78/92 transitions.
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 7 ms
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 8 ms
[2023-03-08 22:32:00] [INFO ] Input system was already deterministic with 78 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 73/73 places, 92/92 transitions.
Graph (complete) has 200 edges and 73 vertex of which 67 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.1 ms
Discarding 6 places :
Also discarding 6 output transitions
Drop transitions removed 6 transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 2 places and 0 transitions.
Graph (complete) has 71 edges and 64 vertex of which 52 are kept as prefixes of interest. Removing 12 places using SCC suffix rule.1 ms
Discarding 12 places :
Also discarding 12 output transitions
Drop transitions removed 12 transitions
Graph (trivial) has 58 edges and 52 vertex of which 28 / 52 are part of one of the 14 SCC in 4 ms
Free SCC test removed 14 places
Drop transitions removed 8 transitions
Trivial Post-agglo rules discarded 8 transitions
Performed 8 trivial Post agglomeration. Transition count delta: 8
Iterating post reduction 0 with 12 rules applied. Total rules applied 13 place count 38 transition count 65
Reduce places removed 8 places and 0 transitions.
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 1 with 22 rules applied. Total rules applied 35 place count 30 transition count 51
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 40 place count 25 transition count 41
Iterating global reduction 2 with 5 rules applied. Total rules applied 45 place count 25 transition count 41
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 50 place count 20 transition count 31
Iterating global reduction 2 with 5 rules applied. Total rules applied 55 place count 20 transition count 31
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 60 place count 15 transition count 21
Iterating global reduction 2 with 5 rules applied. Total rules applied 65 place count 15 transition count 21
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 70 place count 10 transition count 16
Iterating global reduction 2 with 5 rules applied. Total rules applied 75 place count 10 transition count 16
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 76 place count 10 transition count 15
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 1 rules applied. Total rules applied 77 place count 10 transition count 14
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 78 place count 9 transition count 14
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 80 place count 7 transition count 12
Applied a total of 80 rules in 31 ms. Remains 7 /73 variables (removed 66) and now considering 12/92 (removed 80) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 7/73 places, 12/92 transitions.
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 22:32:00] [INFO ] Input system was already deterministic with 12 transitions.
Finished random walk after 18 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=18 )
FORMULA DiscoveryGPU-PT-07a-CTLCardinality-08 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 73/73 places, 92/92 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 67 transition count 86
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 67 transition count 86
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 18 place count 61 transition count 80
Iterating global reduction 0 with 6 rules applied. Total rules applied 24 place count 61 transition count 80
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 30 place count 55 transition count 74
Iterating global reduction 0 with 6 rules applied. Total rules applied 36 place count 55 transition count 74
Applied a total of 36 rules in 12 ms. Remains 55 /73 variables (removed 18) and now considering 74/92 (removed 18) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 55/73 places, 74/92 transitions.
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 6 ms
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 7 ms
[2023-03-08 22:32:00] [INFO ] Input system was already deterministic with 74 transitions.
Starting structural reductions in LTL mode, iteration 0 : 73/73 places, 92/92 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 67 transition count 86
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 67 transition count 86
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 18 place count 61 transition count 80
Iterating global reduction 0 with 6 rules applied. Total rules applied 24 place count 61 transition count 80
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 30 place count 55 transition count 74
Iterating global reduction 0 with 6 rules applied. Total rules applied 36 place count 55 transition count 74
Applied a total of 36 rules in 17 ms. Remains 55 /73 variables (removed 18) and now considering 74/92 (removed 18) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 55/73 places, 74/92 transitions.
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 7 ms
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 8 ms
[2023-03-08 22:32:00] [INFO ] Input system was already deterministic with 74 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 73/73 places, 92/92 transitions.
Graph (complete) has 200 edges and 73 vertex of which 66 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.1 ms
Discarding 7 places :
Also discarding 7 output transitions
Drop transitions removed 7 transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 2 places and 0 transitions.
Graph (complete) has 70 edges and 63 vertex of which 52 are kept as prefixes of interest. Removing 11 places using SCC suffix rule.1 ms
Discarding 11 places :
Also discarding 11 output transitions
Drop transitions removed 11 transitions
Graph (trivial) has 57 edges and 52 vertex of which 28 / 52 are part of one of the 14 SCC in 1 ms
Free SCC test removed 14 places
Drop transitions removed 7 transitions
Trivial Post-agglo rules discarded 7 transitions
Performed 7 trivial Post agglomeration. Transition count delta: 7
Iterating post reduction 0 with 11 rules applied. Total rules applied 12 place count 38 transition count 66
Reduce places removed 7 places and 0 transitions.
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 1 with 21 rules applied. Total rules applied 33 place count 31 transition count 52
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 37 place count 27 transition count 44
Iterating global reduction 2 with 4 rules applied. Total rules applied 41 place count 27 transition count 44
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 45 place count 23 transition count 36
Iterating global reduction 2 with 4 rules applied. Total rules applied 49 place count 23 transition count 36
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 53 place count 19 transition count 28
Iterating global reduction 2 with 4 rules applied. Total rules applied 57 place count 19 transition count 28
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 61 place count 15 transition count 24
Iterating global reduction 2 with 4 rules applied. Total rules applied 65 place count 15 transition count 24
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 66 place count 15 transition count 23
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 1 rules applied. Total rules applied 67 place count 15 transition count 22
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 68 place count 14 transition count 22
Reduce places removed 3 places and 3 transitions.
Iterating global reduction 4 with 3 rules applied. Total rules applied 71 place count 11 transition count 19
Applied a total of 71 rules in 24 ms. Remains 11 /73 variables (removed 62) and now considering 19/92 (removed 73) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 25 ms. Remains : 11/73 places, 19/92 transitions.
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 1 ms
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 22:32:00] [INFO ] Input system was already deterministic with 19 transitions.
Starting structural reductions in LTL mode, iteration 0 : 73/73 places, 92/92 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 68 transition count 87
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 68 transition count 87
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 14 place count 64 transition count 83
Iterating global reduction 0 with 4 rules applied. Total rules applied 18 place count 64 transition count 83
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 20 place count 62 transition count 81
Iterating global reduction 0 with 2 rules applied. Total rules applied 22 place count 62 transition count 81
Applied a total of 22 rules in 8 ms. Remains 62 /73 variables (removed 11) and now considering 81/92 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 62/73 places, 81/92 transitions.
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 7 ms
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 9 ms
[2023-03-08 22:32:00] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 73/73 places, 92/92 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 67 transition count 86
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 67 transition count 86
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 17 place count 62 transition count 81
Iterating global reduction 0 with 5 rules applied. Total rules applied 22 place count 62 transition count 81
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 27 place count 57 transition count 76
Iterating global reduction 0 with 5 rules applied. Total rules applied 32 place count 57 transition count 76
Applied a total of 32 rules in 9 ms. Remains 57 /73 variables (removed 16) and now considering 76/92 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 57/73 places, 76/92 transitions.
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 6 ms
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 7 ms
[2023-03-08 22:32:00] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 73/73 places, 92/92 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 67 transition count 86
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 67 transition count 86
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 16 place count 63 transition count 82
Iterating global reduction 0 with 4 rules applied. Total rules applied 20 place count 63 transition count 82
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 24 place count 59 transition count 78
Iterating global reduction 0 with 4 rules applied. Total rules applied 28 place count 59 transition count 78
Applied a total of 28 rules in 6 ms. Remains 59 /73 variables (removed 14) and now considering 78/92 (removed 14) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 59/73 places, 78/92 transitions.
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:32:00] [INFO ] Input system was already deterministic with 78 transitions.
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 6 ms
[2023-03-08 22:32:00] [INFO ] Flatten gal took : 6 ms
[2023-03-08 22:32:00] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 3 ms.
[2023-03-08 22:32:00] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 73 places, 92 transitions and 290 arcs took 2 ms.
Total runtime 3066 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DiscoveryGPU-PT-07a
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/368

FORMULA DiscoveryGPU-PT-07a-CTLCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678314902053

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/368/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/368/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/368/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:287
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: LAUNCH task # 55 (type SKEL/SRCH) for 6 DiscoveryGPU-PT-07a-CTLCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 55 (type SKEL/SRCH) for DiscoveryGPU-PT-07a-CTLCardinality-02
lola: result : true
lola: markings : 9
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 57 (type SKEL/FNDP) for 39 DiscoveryGPU-PT-07a-CTLCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN) for 39 DiscoveryGPU-PT-07a-CTLCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/SRCH) for 39 DiscoveryGPU-PT-07a-CTLCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/SRCH) for 39 DiscoveryGPU-PT-07a-CTLCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 60 (type SKEL/SRCH) for DiscoveryGPU-PT-07a-CTLCardinality-11
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 59 (type SKEL/SRCH) for DiscoveryGPU-PT-07a-CTLCardinality-11
lola: result : true
lola: markings : 10
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 57 (type FNDP) for DiscoveryGPU-PT-07a-CTLCardinality-11 (obsolete)
lola: CANCELED task # 58 (type EQUN) for DiscoveryGPU-PT-07a-CTLCardinality-11 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 57 (type SKEL/FNDP) for DiscoveryGPU-PT-07a-CTLCardinality-11
lola: result : true
lola: fired transitions : 8
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 61 (type SKEL/SRCH) for 39 DiscoveryGPU-PT-07a-CTLCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 61 (type SKEL/SRCH) for DiscoveryGPU-PT-07a-CTLCardinality-11
lola: result : false
lola: markings : 4
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 1 (type EXCL) for 0 DiscoveryGPU-PT-07a-CTLCardinality-00
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:714
sara: try reading problem file /home/mcc/execution/368/CTLCardinality-58.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 62 (type FNDP) for 39 DiscoveryGPU-PT-07a-CTLCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type EQUN) for 39 DiscoveryGPU-PT-07a-CTLCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type SRCH) for 39 DiscoveryGPU-PT-07a-CTLCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 65 (type SRCH) for DiscoveryGPU-PT-07a-CTLCardinality-11
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 62 (type FNDP) for DiscoveryGPU-PT-07a-CTLCardinality-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 63 (type EQUN) for DiscoveryGPU-PT-07a-CTLCardinality-11 (obsolete)

lola: FINISHED task # 63 (type EQUN) for DiscoveryGPU-PT-07a-CTLCardinality-11
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 58 (type SKEL/EQUN) for DiscoveryGPU-PT-07a-CTLCardinality-11
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 66 (type FNDP) for 15 DiscoveryGPU-PT-07a-CTLCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type EQUN) for 15 DiscoveryGPU-PT-07a-CTLCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 69 (type SRCH) for 15 DiscoveryGPU-PT-07a-CTLCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 69 (type SRCH) for DiscoveryGPU-PT-07a-CTLCardinality-06
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 66 (type FNDP) for DiscoveryGPU-PT-07a-CTLCardinality-06
lola: result : true
lola: fired transitions : 7
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 67 (type EQUN) for DiscoveryGPU-PT-07a-CTLCardinality-06 (obsolete)
sara: try reading problem file /home/mcc/execution/368/CTLCardinality-67.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 67 (type EQUN) for DiscoveryGPU-PT-07a-CTLCardinality-06
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-07a-CTLCardinality-06: DISJ true findpath
DiscoveryGPU-PT-07a-CTLCardinality-11: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-07a-CTLCardinality-00: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-02: EXEF 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-07: DISJ 0 2 0 0 2 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 4/299 3/32 DiscoveryGPU-PT-07a-CTLCardinality-00 642760 m, 128552 m/sec, 5163681 t fired, .

Time elapsed: 5 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 13
lola: FINISHED task # 1 (type EXCL) for DiscoveryGPU-PT-07a-CTLCardinality-00
lola: result : true
lola: markings : 1000043
lola: fired transitions : 8200114
lola: time used : 7.000000
lola: memory pages used : 5
lola: LAUNCH task # 53 (type EXCL) for 52 DiscoveryGPU-PT-07a-CTLCardinality-14
lola: time limit : 326 sec
lola: memory limit: 32 pages
lola: FINISHED task # 53 (type EXCL) for DiscoveryGPU-PT-07a-CTLCardinality-14
lola: result : true
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 50 (type EXCL) for 49 DiscoveryGPU-PT-07a-CTLCardinality-13
lola: time limit : 359 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-07a-CTLCardinality-00: CTL true CTL model checker
DiscoveryGPU-PT-07a-CTLCardinality-06: DISJ true findpath
DiscoveryGPU-PT-07a-CTLCardinality-11: DISJ true findpath
DiscoveryGPU-PT-07a-CTLCardinality-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-07a-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-02: EXEF 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-07: DISJ 0 2 0 0 2 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
50 CTL EXCL 2/359 2/32 DiscoveryGPU-PT-07a-CTLCardinality-13 278498 m, 55699 m/sec, 2089510 t fired, .

Time elapsed: 10 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 13
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-07a-CTLCardinality-00: CTL true CTL model checker
DiscoveryGPU-PT-07a-CTLCardinality-06: DISJ true findpath
DiscoveryGPU-PT-07a-CTLCardinality-11: DISJ true findpath
DiscoveryGPU-PT-07a-CTLCardinality-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-07a-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-02: EXEF 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-07: DISJ 0 2 0 0 2 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
50 CTL EXCL 7/359 4/32 DiscoveryGPU-PT-07a-CTLCardinality-13 872288 m, 118758 m/sec, 7174853 t fired, .

Time elapsed: 15 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 13
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-07a-CTLCardinality-00: CTL true CTL model checker
DiscoveryGPU-PT-07a-CTLCardinality-06: DISJ true findpath
DiscoveryGPU-PT-07a-CTLCardinality-11: DISJ true findpath
DiscoveryGPU-PT-07a-CTLCardinality-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-07a-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-02: EXEF 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-07: DISJ 0 2 0 0 2 0 0 0
DiscoveryGPU-PT-07a-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
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4 CTL EXCL 56/3481 16/32 DiscoveryGPU-PT-07a-CTLCardinality-01 3649552 m, 0 m/sec, 67746238 t fired, .

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# running tasks: 1 of 4 Visible: 13
lola: FINISHED task # 4 (type EXCL) for DiscoveryGPU-PT-07a-CTLCardinality-01
lola: result : false
lola: markings : 3690542
lola: fired transitions : 73389964
lola: time used : 61.000000
lola: memory pages used : 16
lola: Portfolio finished: no open tasks 13

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-07a-CTLCardinality-00: CTL true CTL model checker
DiscoveryGPU-PT-07a-CTLCardinality-01: CTL false CTL model checker
DiscoveryGPU-PT-07a-CTLCardinality-02: EXEF true state space /EXEF
DiscoveryGPU-PT-07a-CTLCardinality-04: CTL false CTL model checker
DiscoveryGPU-PT-07a-CTLCardinality-05: CTL true CTL model checker
DiscoveryGPU-PT-07a-CTLCardinality-06: DISJ true findpath
DiscoveryGPU-PT-07a-CTLCardinality-07: DISJ true CTL model checker
DiscoveryGPU-PT-07a-CTLCardinality-09: CTL true CTL model checker
DiscoveryGPU-PT-07a-CTLCardinality-10: CTL false CTL model checker
DiscoveryGPU-PT-07a-CTLCardinality-11: DISJ true findpath
DiscoveryGPU-PT-07a-CTLCardinality-12: CTL false CTL model checker
DiscoveryGPU-PT-07a-CTLCardinality-13: CTL unknown AGGR
DiscoveryGPU-PT-07a-CTLCardinality-14: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DiscoveryGPU-PT-07a"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DiscoveryGPU-PT-07a, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r135-smll-167819414000297"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DiscoveryGPU-PT-07a.tgz
mv DiscoveryGPU-PT-07a execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;