fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r135-smll-167819414000281
Last Updated
May 14, 2023

About the Execution of LoLa+red for DiscoveryGPU-PT-06a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
483.852 59759.00 67430.00 670.00 FFFFFTTTTTFTTFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r135-smll-167819414000281.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DiscoveryGPU-PT-06a, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r135-smll-167819414000281
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 452K
-rw-r--r-- 1 mcc users 7.5K Feb 25 13:35 CTLCardinality.txt
-rw-r--r-- 1 mcc users 84K Feb 25 13:35 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.2K Feb 25 13:32 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 25 13:32 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 15:59 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 15:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 15:59 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 15:59 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.1K Feb 25 13:36 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 95K Feb 25 13:36 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Feb 25 13:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 72K Feb 25 13:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:59 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:59 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 22K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DiscoveryGPU-PT-06a-CTLCardinality-00
FORMULA_NAME DiscoveryGPU-PT-06a-CTLCardinality-01
FORMULA_NAME DiscoveryGPU-PT-06a-CTLCardinality-02
FORMULA_NAME DiscoveryGPU-PT-06a-CTLCardinality-03
FORMULA_NAME DiscoveryGPU-PT-06a-CTLCardinality-04
FORMULA_NAME DiscoveryGPU-PT-06a-CTLCardinality-05
FORMULA_NAME DiscoveryGPU-PT-06a-CTLCardinality-06
FORMULA_NAME DiscoveryGPU-PT-06a-CTLCardinality-07
FORMULA_NAME DiscoveryGPU-PT-06a-CTLCardinality-08
FORMULA_NAME DiscoveryGPU-PT-06a-CTLCardinality-09
FORMULA_NAME DiscoveryGPU-PT-06a-CTLCardinality-10
FORMULA_NAME DiscoveryGPU-PT-06a-CTLCardinality-11
FORMULA_NAME DiscoveryGPU-PT-06a-CTLCardinality-12
FORMULA_NAME DiscoveryGPU-PT-06a-CTLCardinality-13
FORMULA_NAME DiscoveryGPU-PT-06a-CTLCardinality-14
FORMULA_NAME DiscoveryGPU-PT-06a-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678314234614

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DiscoveryGPU-PT-06a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 22:23:57] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-08 22:23:57] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 22:23:58] [INFO ] Load time of PNML (sax parser for PT used): 52 ms
[2023-03-08 22:23:58] [INFO ] Transformed 63 places.
[2023-03-08 22:23:58] [INFO ] Transformed 85 transitions.
[2023-03-08 22:23:58] [INFO ] Found NUPN structural information;
[2023-03-08 22:23:58] [INFO ] Parsed PT model containing 63 places and 85 transitions and 273 arcs in 171 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 22 ms.
FORMULA DiscoveryGPU-PT-06a-CTLCardinality-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 54 out of 63 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 85/85 transitions.
Drop transitions removed 6 transitions
Redundant transition composition rules discarded 6 transitions
Iterating global reduction 0 with 6 rules applied. Total rules applied 6 place count 63 transition count 79
Applied a total of 6 rules in 20 ms. Remains 63 /63 variables (removed 0) and now considering 79/85 (removed 6) transitions.
// Phase 1: matrix 79 rows 63 cols
[2023-03-08 22:23:58] [INFO ] Computed 2 place invariants in 9 ms
[2023-03-08 22:23:58] [INFO ] Implicit Places using invariants in 320 ms returned []
[2023-03-08 22:23:58] [INFO ] Invariant cache hit.
[2023-03-08 22:23:58] [INFO ] State equation strengthened by 48 read => feed constraints.
[2023-03-08 22:23:58] [INFO ] Implicit Places using invariants and state equation in 222 ms returned []
Implicit Place search using SMT with State Equation took 585 ms to find 0 implicit places.
[2023-03-08 22:23:58] [INFO ] Invariant cache hit.
[2023-03-08 22:23:59] [INFO ] Dead Transitions using invariants and state equation in 158 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 63/63 places, 79/85 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 765 ms. Remains : 63/63 places, 79/85 transitions.
Support contains 54 out of 63 places after structural reductions.
[2023-03-08 22:23:59] [INFO ] Flatten gal took : 49 ms
[2023-03-08 22:23:59] [INFO ] Flatten gal took : 34 ms
[2023-03-08 22:23:59] [INFO ] Input system was already deterministic with 79 transitions.
Support contains 53 out of 63 places (down from 54) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 157 resets, run finished after 650 ms. (steps per millisecond=15 ) properties (out of 59) seen :56
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 116 ms. (steps per millisecond=86 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 24 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10000 steps, including 26 resets, run finished after 60 ms. (steps per millisecond=166 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-08 22:24:00] [INFO ] Invariant cache hit.
[2023-03-08 22:24:00] [INFO ] After 82ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:2
[2023-03-08 22:24:00] [INFO ] [Nat]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-03-08 22:24:00] [INFO ] After 108ms SMT Verify possible using all constraints in natural domain returned unsat :3 sat :0
Fused 3 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 3 atomic propositions for a total of 15 simplifications.
FORMULA DiscoveryGPU-PT-06a-CTLCardinality-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-08 22:24:00] [INFO ] Flatten gal took : 8 ms
[2023-03-08 22:24:00] [INFO ] Flatten gal took : 8 ms
[2023-03-08 22:24:00] [INFO ] Input system was already deterministic with 79 transitions.
Computed a total of 9 stabilizing places and 7 stable transitions
Graph (complete) has 172 edges and 63 vertex of which 57 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.3 ms
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 79/79 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 59 transition count 75
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 59 transition count 75
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 11 place count 56 transition count 72
Iterating global reduction 0 with 3 rules applied. Total rules applied 14 place count 56 transition count 72
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 16 place count 54 transition count 70
Iterating global reduction 0 with 2 rules applied. Total rules applied 18 place count 54 transition count 70
Applied a total of 18 rules in 14 ms. Remains 54 /63 variables (removed 9) and now considering 70/79 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 54/63 places, 70/79 transitions.
[2023-03-08 22:24:00] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:24:00] [INFO ] Flatten gal took : 6 ms
[2023-03-08 22:24:00] [INFO ] Input system was already deterministic with 70 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 79/79 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 59 transition count 75
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 59 transition count 75
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 12 place count 55 transition count 71
Iterating global reduction 0 with 4 rules applied. Total rules applied 16 place count 55 transition count 71
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 19 place count 52 transition count 68
Iterating global reduction 0 with 3 rules applied. Total rules applied 22 place count 52 transition count 68
Applied a total of 22 rules in 10 ms. Remains 52 /63 variables (removed 11) and now considering 68/79 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 52/63 places, 68/79 transitions.
[2023-03-08 22:24:00] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:24:00] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:24:00] [INFO ] Input system was already deterministic with 68 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 79/79 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 59 transition count 75
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 59 transition count 75
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 12 place count 55 transition count 71
Iterating global reduction 0 with 4 rules applied. Total rules applied 16 place count 55 transition count 71
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 19 place count 52 transition count 68
Iterating global reduction 0 with 3 rules applied. Total rules applied 22 place count 52 transition count 68
Applied a total of 22 rules in 8 ms. Remains 52 /63 variables (removed 11) and now considering 68/79 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 52/63 places, 68/79 transitions.
[2023-03-08 22:24:00] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:24:00] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:24:00] [INFO ] Input system was already deterministic with 68 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 63/63 places, 79/79 transitions.
Graph (complete) has 172 edges and 63 vertex of which 57 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.1 ms
Discarding 6 places :
Also discarding 6 output transitions
Drop transitions removed 6 transitions
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 6 Pre rules applied. Total rules applied 1 place count 57 transition count 67
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 0 with 12 rules applied. Total rules applied 13 place count 51 transition count 67
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 18 place count 46 transition count 62
Iterating global reduction 0 with 5 rules applied. Total rules applied 23 place count 46 transition count 62
Applied a total of 23 rules in 22 ms. Remains 46 /63 variables (removed 17) and now considering 62/79 (removed 17) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 23 ms. Remains : 46/63 places, 62/79 transitions.
[2023-03-08 22:24:00] [INFO ] Flatten gal took : 3 ms
[2023-03-08 22:24:00] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:24:00] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 79/79 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 58 transition count 74
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 58 transition count 74
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 15 place count 53 transition count 69
Iterating global reduction 0 with 5 rules applied. Total rules applied 20 place count 53 transition count 69
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 25 place count 48 transition count 64
Iterating global reduction 0 with 5 rules applied. Total rules applied 30 place count 48 transition count 64
Applied a total of 30 rules in 9 ms. Remains 48 /63 variables (removed 15) and now considering 64/79 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 48/63 places, 64/79 transitions.
[2023-03-08 22:24:00] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:24:00] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:24:00] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 79/79 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 60 transition count 76
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 60 transition count 76
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 9 place count 57 transition count 73
Iterating global reduction 0 with 3 rules applied. Total rules applied 12 place count 57 transition count 73
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 15 place count 54 transition count 70
Iterating global reduction 0 with 3 rules applied. Total rules applied 18 place count 54 transition count 70
Applied a total of 18 rules in 9 ms. Remains 54 /63 variables (removed 9) and now considering 70/79 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 54/63 places, 70/79 transitions.
[2023-03-08 22:24:00] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:24:00] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:24:01] [INFO ] Input system was already deterministic with 70 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 63/63 places, 79/79 transitions.
Graph (complete) has 172 edges and 63 vertex of which 57 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.1 ms
Discarding 6 places :
Also discarding 6 output transitions
Drop transitions removed 6 transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 2 places and 0 transitions.
Graph (complete) has 60 edges and 54 vertex of which 44 are kept as prefixes of interest. Removing 10 places using SCC suffix rule.1 ms
Discarding 10 places :
Also discarding 10 output transitions
Drop transitions removed 10 transitions
Graph (trivial) has 49 edges and 44 vertex of which 24 / 44 are part of one of the 12 SCC in 3 ms
Free SCC test removed 12 places
Drop transitions removed 6 transitions
Trivial Post-agglo rules discarded 6 transitions
Performed 6 trivial Post agglomeration. Transition count delta: 6
Iterating post reduction 0 with 10 rules applied. Total rules applied 11 place count 32 transition count 56
Reduce places removed 6 places and 0 transitions.
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Iterating post reduction 1 with 18 rules applied. Total rules applied 29 place count 26 transition count 44
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 33 place count 22 transition count 36
Iterating global reduction 2 with 4 rules applied. Total rules applied 37 place count 22 transition count 36
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 41 place count 18 transition count 28
Iterating global reduction 2 with 4 rules applied. Total rules applied 45 place count 18 transition count 28
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 49 place count 14 transition count 20
Iterating global reduction 2 with 4 rules applied. Total rules applied 53 place count 14 transition count 20
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 57 place count 10 transition count 16
Iterating global reduction 2 with 4 rules applied. Total rules applied 61 place count 10 transition count 16
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 62 place count 10 transition count 15
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 1 rules applied. Total rules applied 63 place count 10 transition count 14
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 64 place count 9 transition count 14
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 66 place count 7 transition count 12
Applied a total of 66 rules in 26 ms. Remains 7 /63 variables (removed 56) and now considering 12/79 (removed 67) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 26 ms. Remains : 7/63 places, 12/79 transitions.
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 1 ms
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 0 ms
[2023-03-08 22:24:01] [INFO ] Input system was already deterministic with 12 transitions.
Finished random walk after 19 steps, including 1 resets, run visited all 1 properties in 2 ms. (steps per millisecond=9 )
FORMULA DiscoveryGPU-PT-06a-CTLCardinality-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 79/79 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 58 transition count 74
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 58 transition count 74
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 15 place count 53 transition count 69
Iterating global reduction 0 with 5 rules applied. Total rules applied 20 place count 53 transition count 69
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 24 place count 49 transition count 65
Iterating global reduction 0 with 4 rules applied. Total rules applied 28 place count 49 transition count 65
Applied a total of 28 rules in 9 ms. Remains 49 /63 variables (removed 14) and now considering 65/79 (removed 14) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 49/63 places, 65/79 transitions.
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:24:01] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 79/79 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 60 transition count 76
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 60 transition count 76
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 8 place count 58 transition count 74
Iterating global reduction 0 with 2 rules applied. Total rules applied 10 place count 58 transition count 74
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 12 place count 56 transition count 72
Iterating global reduction 0 with 2 rules applied. Total rules applied 14 place count 56 transition count 72
Applied a total of 14 rules in 8 ms. Remains 56 /63 variables (removed 7) and now considering 72/79 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 56/63 places, 72/79 transitions.
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:24:01] [INFO ] Input system was already deterministic with 72 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 79/79 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 58 transition count 74
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 58 transition count 74
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 15 place count 53 transition count 69
Iterating global reduction 0 with 5 rules applied. Total rules applied 20 place count 53 transition count 69
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 25 place count 48 transition count 64
Iterating global reduction 0 with 5 rules applied. Total rules applied 30 place count 48 transition count 64
Applied a total of 30 rules in 8 ms. Remains 48 /63 variables (removed 15) and now considering 64/79 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 48/63 places, 64/79 transitions.
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 3 ms
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:24:01] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 79/79 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 58 transition count 74
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 58 transition count 74
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 15 place count 53 transition count 69
Iterating global reduction 0 with 5 rules applied. Total rules applied 20 place count 53 transition count 69
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 25 place count 48 transition count 64
Iterating global reduction 0 with 5 rules applied. Total rules applied 30 place count 48 transition count 64
Applied a total of 30 rules in 8 ms. Remains 48 /63 variables (removed 15) and now considering 64/79 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 48/63 places, 64/79 transitions.
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:24:01] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 63/63 places, 79/79 transitions.
Graph (complete) has 172 edges and 63 vertex of which 58 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.1 ms
Discarding 5 places :
Also discarding 5 output transitions
Drop transitions removed 5 transitions
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 4 Pre rules applied. Total rules applied 1 place count 58 transition count 70
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 0 with 8 rules applied. Total rules applied 9 place count 54 transition count 70
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 12 place count 51 transition count 67
Iterating global reduction 0 with 3 rules applied. Total rules applied 15 place count 51 transition count 67
Applied a total of 15 rules in 12 ms. Remains 51 /63 variables (removed 12) and now considering 67/79 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 51/63 places, 67/79 transitions.
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:24:01] [INFO ] Input system was already deterministic with 67 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 63/63 places, 79/79 transitions.
Graph (complete) has 172 edges and 63 vertex of which 57 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.1 ms
Discarding 6 places :
Also discarding 6 output transitions
Drop transitions removed 6 transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 2 places and 0 transitions.
Graph (complete) has 60 edges and 54 vertex of which 42 are kept as prefixes of interest. Removing 12 places using SCC suffix rule.1 ms
Discarding 12 places :
Also discarding 12 output transitions
Drop transitions removed 12 transitions
Graph (trivial) has 44 edges and 42 vertex of which 22 / 42 are part of one of the 11 SCC in 0 ms
Free SCC test removed 11 places
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 9 rules applied. Total rules applied 10 place count 31 transition count 55
Reduce places removed 5 places and 0 transitions.
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 1 with 16 rules applied. Total rules applied 26 place count 26 transition count 44
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 30 place count 22 transition count 36
Iterating global reduction 2 with 4 rules applied. Total rules applied 34 place count 22 transition count 36
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 38 place count 18 transition count 28
Iterating global reduction 2 with 4 rules applied. Total rules applied 42 place count 18 transition count 28
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 46 place count 14 transition count 20
Iterating global reduction 2 with 4 rules applied. Total rules applied 50 place count 14 transition count 20
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 54 place count 10 transition count 16
Iterating global reduction 2 with 4 rules applied. Total rules applied 58 place count 10 transition count 16
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 59 place count 10 transition count 15
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 1 rules applied. Total rules applied 60 place count 10 transition count 14
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 61 place count 9 transition count 14
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 63 place count 7 transition count 12
Applied a total of 63 rules in 23 ms. Remains 7 /63 variables (removed 56) and now considering 12/79 (removed 67) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 24 ms. Remains : 7/63 places, 12/79 transitions.
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 0 ms
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 1 ms
[2023-03-08 22:24:01] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 63/63 places, 79/79 transitions.
Graph (complete) has 172 edges and 63 vertex of which 58 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.0 ms
Discarding 5 places :
Also discarding 5 output transitions
Drop transitions removed 5 transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 2 places and 0 transitions.
Graph (complete) has 61 edges and 55 vertex of which 46 are kept as prefixes of interest. Removing 9 places using SCC suffix rule.1 ms
Discarding 9 places :
Also discarding 9 output transitions
Drop transitions removed 9 transitions
Graph (trivial) has 48 edges and 46 vertex of which 24 / 46 are part of one of the 12 SCC in 0 ms
Free SCC test removed 12 places
Drop transitions removed 6 transitions
Trivial Post-agglo rules discarded 6 transitions
Performed 6 trivial Post agglomeration. Transition count delta: 6
Iterating post reduction 0 with 10 rules applied. Total rules applied 11 place count 34 transition count 58
Reduce places removed 6 places and 0 transitions.
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Iterating post reduction 1 with 18 rules applied. Total rules applied 29 place count 28 transition count 46
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 32 place count 25 transition count 40
Iterating global reduction 2 with 3 rules applied. Total rules applied 35 place count 25 transition count 40
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 37 place count 23 transition count 36
Iterating global reduction 2 with 2 rules applied. Total rules applied 39 place count 23 transition count 36
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 41 place count 21 transition count 32
Iterating global reduction 2 with 2 rules applied. Total rules applied 43 place count 21 transition count 32
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 45 place count 19 transition count 30
Iterating global reduction 2 with 2 rules applied. Total rules applied 47 place count 19 transition count 30
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 2 with 2 rules applied. Total rules applied 49 place count 19 transition count 28
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 1 rules applied. Total rules applied 50 place count 19 transition count 27
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 51 place count 18 transition count 27
Reduce places removed 4 places and 4 transitions.
Iterating global reduction 4 with 4 rules applied. Total rules applied 55 place count 14 transition count 23
Applied a total of 55 rules in 21 ms. Remains 14 /63 variables (removed 49) and now considering 23/79 (removed 56) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 22 ms. Remains : 14/63 places, 23/79 transitions.
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 1 ms
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 1 ms
[2023-03-08 22:24:01] [INFO ] Input system was already deterministic with 23 transitions.
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:24:01] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:24:01] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 4 ms.
[2023-03-08 22:24:01] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 63 places, 79 transitions and 249 arcs took 2 ms.
Total runtime 3480 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DiscoveryGPU-PT-06a
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/366

FORMULA DiscoveryGPU-PT-06a-CTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-06a-CTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-06a-CTLCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-06a-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-06a-CTLCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-06a-CTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-06a-CTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-06a-CTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-06a-CTLCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-06a-CTLCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-06a-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-06a-CTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-06a-CTLCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678314294373

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/366/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/366/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/366/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 4 (type EXCL) for 3 DiscoveryGPU-PT-06a-CTLCardinality-01
lola: time limit : 144 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 4 (type EXCL) for DiscoveryGPU-PT-06a-CTLCardinality-01
lola: result : false
lola: markings : 866
lola: fired transitions : 4134
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 19 (type EXCL) for 18 DiscoveryGPU-PT-06a-CTLCardinality-08
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: FINISHED task # 19 (type EXCL) for DiscoveryGPU-PT-06a-CTLCardinality-08
lola: result : true
lola: markings : 64
lola: fired transitions : 96
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 60 (type EXCL) for 21 DiscoveryGPU-PT-06a-CTLCardinality-10
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 60 (type EXCL) for DiscoveryGPU-PT-06a-CTLCardinality-10
lola: result : true
lola: markings : 6144
lola: fired transitions : 46592
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 45 (type EXCL) for 44 DiscoveryGPU-PT-06a-CTLCardinality-11
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-06a-CTLCardinality-01: CTL false CTL model checker
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DiscoveryGPU-PT-06a-CTLCardinality-14: AGEF 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 5/240 2/32 DiscoveryGPU-PT-06a-CTLCardinality-11 305560 m, 61112 m/sec, 5358964 t fired, .

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45 CTL EXCL 10/240 3/32 DiscoveryGPU-PT-06a-CTLCardinality-11 614024 m, 61692 m/sec, 11259843 t fired, .

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45 CTL EXCL 15/240 4/32 DiscoveryGPU-PT-06a-CTLCardinality-11 914864 m, 60168 m/sec, 17038502 t fired, .

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DiscoveryGPU-PT-06a-CTLCardinality-14: AGEF 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-06a-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

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45 CTL EXCL 25/240 7/32 DiscoveryGPU-PT-06a-CTLCardinality-11 1559343 m, 70537 m/sec, 28025692 t fired, .

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DiscoveryGPU-PT-06a-CTLCardinality-01: CTL false CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-08: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-11: CTL true CTL model checker

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DiscoveryGPU-PT-06a-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-06a-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-06a-CTLCardinality-10: DISJ 0 4 0 0 8 0 0 0
DiscoveryGPU-PT-06a-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-06a-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-06a-CTLCardinality-14: AGEF 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-06a-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

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16 CTL EXCL 2/274 2/32 DiscoveryGPU-PT-06a-CTLCardinality-06 245105 m, 49021 m/sec, 1594672 t fired, .

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DiscoveryGPU-PT-06a-CTLCardinality-01: CTL false CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-05: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-06: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-08: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-11: CTL true CTL model checker

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DiscoveryGPU-PT-06a-CTLCardinality-10: DISJ 0 4 0 0 8 0 0 0
DiscoveryGPU-PT-06a-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
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7 CTL EXCL 4/324 3/32 DiscoveryGPU-PT-06a-CTLCardinality-02 530490 m, 106098 m/sec, 3935350 t fired, .

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DiscoveryGPU-PT-06a-CTLCardinality-01: CTL false CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-05: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-06: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-08: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-11: CTL true CTL model checker

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DiscoveryGPU-PT-06a-CTLCardinality-10: DISJ 0 4 0 0 8 0 0 0
DiscoveryGPU-PT-06a-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-06a-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-06a-CTLCardinality-14: AGEF 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-06a-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 9/324 5/32 DiscoveryGPU-PT-06a-CTLCardinality-02 1137789 m, 121459 m/sec, 8775033 t fired, .

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DiscoveryGPU-PT-06a-CTLCardinality-00: CTL false CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-01: CTL false CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-02: CTL false CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-03: AGEF false tscc_search
DiscoveryGPU-PT-06a-CTLCardinality-05: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-06: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-08: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-10: DISJ false DISJ
DiscoveryGPU-PT-06a-CTLCardinality-11: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-14: AGEF false tscc_search

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57 CTL EXCL 0/1185 1/32 DiscoveryGPU-PT-06a-CTLCardinality-15 4041 m, 808 m/sec, 36961 t fired, .

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DiscoveryGPU-PT-06a-CTLCardinality-00: CTL false CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-01: CTL false CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-02: CTL false CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-03: AGEF false tscc_search
DiscoveryGPU-PT-06a-CTLCardinality-05: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-06: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-08: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-10: DISJ false DISJ
DiscoveryGPU-PT-06a-CTLCardinality-11: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-12: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-14: AGEF false tscc_search
DiscoveryGPU-PT-06a-CTLCardinality-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-06a-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 5/3555 3/32 DiscoveryGPU-PT-06a-CTLCardinality-13 533586 m, 106717 m/sec, 5567766 t fired, .

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lola: memory pages used : 4
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-06a-CTLCardinality-00: CTL false CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-01: CTL false CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-02: CTL false CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-03: AGEF false tscc_search
DiscoveryGPU-PT-06a-CTLCardinality-05: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-06: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-08: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-10: DISJ false DISJ
DiscoveryGPU-PT-06a-CTLCardinality-11: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-12: CTL true CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-13: CTL false CTL model checker
DiscoveryGPU-PT-06a-CTLCardinality-14: AGEF false tscc_search
DiscoveryGPU-PT-06a-CTLCardinality-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DiscoveryGPU-PT-06a"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DiscoveryGPU-PT-06a, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r135-smll-167819414000281"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DiscoveryGPU-PT-06a.tgz
mv DiscoveryGPU-PT-06a execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;