Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r135-smll-167819413600130.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Diffusion2D-PT-D10N100, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r135-smll-167819413600130
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 756K
-rw-r--r-- 1 mcc users 7.3K Feb 26 04:03 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Feb 26 04:03 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 26 04:01 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K Feb 26 04:01 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.4K Feb 25 15:57 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 15:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Feb 25 15:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 04:04 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 126K Feb 26 04:04 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Feb 26 04:03 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 103K Feb 26 04:03 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 15:57 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:57 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 255K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Diffusion2D-PT-D10N100-CTLFireability-00
FORMULA_NAME Diffusion2D-PT-D10N100-CTLFireability-01
FORMULA_NAME Diffusion2D-PT-D10N100-CTLFireability-02
FORMULA_NAME Diffusion2D-PT-D10N100-CTLFireability-03
FORMULA_NAME Diffusion2D-PT-D10N100-CTLFireability-04
FORMULA_NAME Diffusion2D-PT-D10N100-CTLFireability-05
FORMULA_NAME Diffusion2D-PT-D10N100-CTLFireability-06
FORMULA_NAME Diffusion2D-PT-D10N100-CTLFireability-07
FORMULA_NAME Diffusion2D-PT-D10N100-CTLFireability-08
FORMULA_NAME Diffusion2D-PT-D10N100-CTLFireability-09
FORMULA_NAME Diffusion2D-PT-D10N100-CTLFireability-10
FORMULA_NAME Diffusion2D-PT-D10N100-CTLFireability-11
FORMULA_NAME Diffusion2D-PT-D10N100-CTLFireability-12
FORMULA_NAME Diffusion2D-PT-D10N100-CTLFireability-13
FORMULA_NAME Diffusion2D-PT-D10N100-CTLFireability-14
FORMULA_NAME Diffusion2D-PT-D10N100-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678283750899

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Diffusion2D-PT-D10N100
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 13:55:53] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 13:55:53] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 13:55:53] [INFO ] Load time of PNML (sax parser for PT used): 173 ms
[2023-03-08 13:55:53] [INFO ] Transformed 100 places.
[2023-03-08 13:55:53] [INFO ] Transformed 684 transitions.
[2023-03-08 13:55:53] [INFO ] Parsed PT model containing 100 places and 684 transitions and 1368 arcs in 316 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 23 ms.
Support contains 71 out of 100 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 33 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
// Phase 1: matrix 684 rows 100 cols
[2023-03-08 13:55:54] [INFO ] Computed 1 place invariants in 29 ms
[2023-03-08 13:55:54] [INFO ] Implicit Places using invariants in 446 ms returned []
[2023-03-08 13:55:54] [INFO ] Invariant cache hit.
[2023-03-08 13:55:55] [INFO ] Implicit Places using invariants and state equation in 447 ms returned []
Implicit Place search using SMT with State Equation took 950 ms to find 0 implicit places.
[2023-03-08 13:55:55] [INFO ] Invariant cache hit.
[2023-03-08 13:55:55] [INFO ] Dead Transitions using invariants and state equation in 672 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1669 ms. Remains : 100/100 places, 684/684 transitions.
Support contains 71 out of 100 places after structural reductions.
[2023-03-08 13:55:56] [INFO ] Flatten gal took : 97 ms
[2023-03-08 13:55:56] [INFO ] Flatten gal took : 38 ms
[2023-03-08 13:55:56] [INFO ] Input system was already deterministic with 684 transitions.
Incomplete random walk after 10009 steps, including 2 resets, run finished after 93 ms. (steps per millisecond=107 ) properties (out of 74) seen :44
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=30 ) properties (out of 30) seen :3
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 27) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 26) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 25) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 24) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=35 ) properties (out of 23) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 22) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 21) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 20) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 19) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 18) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 17) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 16) seen :0
Running SMT prover for 16 properties.
[2023-03-08 13:55:56] [INFO ] Invariant cache hit.
[2023-03-08 13:55:56] [INFO ] [Real]Absence check using 1 positive place invariants in 1 ms returned sat
[2023-03-08 13:55:57] [INFO ] After 176ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1 real:15
[2023-03-08 13:55:57] [INFO ] After 235ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :1 real:15
Attempting to minimize the solution found.
Minimization took 37 ms.
[2023-03-08 13:55:57] [INFO ] After 456ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :1 real:15
[2023-03-08 13:55:57] [INFO ] [Nat]Absence check using 1 positive place invariants in 1 ms returned sat
[2023-03-08 13:55:57] [INFO ] After 449ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :16
[2023-03-08 13:55:58] [INFO ] After 1122ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :16
Attempting to minimize the solution found.
Minimization took 339 ms.
[2023-03-08 13:55:58] [INFO ] After 1701ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :16
Fused 16 Parikh solutions to 7 different solutions.
Finished Parikh walk after 774 steps, including 0 resets, run visited all 16 properties in 82 ms. (steps per millisecond=9 )
Parikh walk visited 16 properties in 114 ms.
[2023-03-08 13:55:58] [INFO ] Flatten gal took : 50 ms
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 122 ms
[2023-03-08 13:55:59] [INFO ] Input system was already deterministic with 684 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 10 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 24 ms
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 24 ms
[2023-03-08 13:55:59] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 8 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 21 ms
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 22 ms
[2023-03-08 13:55:59] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 8 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 18 ms
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 17 ms
[2023-03-08 13:55:59] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 11 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 16 ms
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 15 ms
[2023-03-08 13:55:59] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 4 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 17 ms
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 16 ms
[2023-03-08 13:55:59] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 3 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 15 ms
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 13 ms
[2023-03-08 13:55:59] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Graph (trivial) has 674 edges and 100 vertex of which 99 / 100 are part of one of the 1 SCC in 4 ms
Free SCC test removed 98 places
Ensure Unique test removed 681 transitions
Reduce isomorphic transitions removed 681 transitions.
Applied a total of 1 rules in 12 ms. Remains 2 /100 variables (removed 98) and now considering 3/684 (removed 681) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 2/100 places, 3/684 transitions.
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 0 ms
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 0 ms
[2023-03-08 13:55:59] [INFO ] Input system was already deterministic with 3 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 3 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 12 ms
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 13 ms
[2023-03-08 13:55:59] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 2 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 12 ms
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 12 ms
[2023-03-08 13:55:59] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 3 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 12 ms
[2023-03-08 13:55:59] [INFO ] Flatten gal took : 12 ms
[2023-03-08 13:56:00] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Graph (trivial) has 674 edges and 100 vertex of which 99 / 100 are part of one of the 1 SCC in 1 ms
Free SCC test removed 98 places
Ensure Unique test removed 681 transitions
Reduce isomorphic transitions removed 681 transitions.
Applied a total of 1 rules in 4 ms. Remains 2 /100 variables (removed 98) and now considering 3/684 (removed 681) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 2/100 places, 3/684 transitions.
[2023-03-08 13:56:00] [INFO ] Flatten gal took : 1 ms
[2023-03-08 13:56:00] [INFO ] Flatten gal took : 0 ms
[2023-03-08 13:56:00] [INFO ] Input system was already deterministic with 3 transitions.
Finished random walk after 1 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=1 )
FORMULA Diffusion2D-PT-D10N100-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 3 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:56:00] [INFO ] Flatten gal took : 11 ms
[2023-03-08 13:56:00] [INFO ] Flatten gal took : 12 ms
[2023-03-08 13:56:00] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 3 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:56:00] [INFO ] Flatten gal took : 11 ms
[2023-03-08 13:56:00] [INFO ] Flatten gal took : 12 ms
[2023-03-08 13:56:00] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Graph (trivial) has 582 edges and 100 vertex of which 92 / 100 are part of one of the 1 SCC in 1 ms
Free SCC test removed 91 places
Ensure Unique test removed 665 transitions
Reduce isomorphic transitions removed 665 transitions.
Applied a total of 1 rules in 5 ms. Remains 9 /100 variables (removed 91) and now considering 19/684 (removed 665) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 9/100 places, 19/684 transitions.
[2023-03-08 13:56:00] [INFO ] Flatten gal took : 0 ms
[2023-03-08 13:56:00] [INFO ] Flatten gal took : 1 ms
[2023-03-08 13:56:00] [INFO ] Input system was already deterministic with 19 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 3 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:56:00] [INFO ] Flatten gal took : 12 ms
[2023-03-08 13:56:00] [INFO ] Flatten gal took : 12 ms
[2023-03-08 13:56:00] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 3 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:56:00] [INFO ] Flatten gal took : 13 ms
[2023-03-08 13:56:00] [INFO ] Flatten gal took : 14 ms
[2023-03-08 13:56:00] [INFO ] Input system was already deterministic with 684 transitions.
[2023-03-08 13:56:00] [INFO ] Flatten gal took : 12 ms
[2023-03-08 13:56:00] [INFO ] Flatten gal took : 12 ms
[2023-03-08 13:56:00] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 7 ms.
[2023-03-08 13:56:00] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 100 places, 684 transitions and 1368 arcs took 7 ms.
Total runtime 6773 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Diffusion2D-PT-D10N100
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA Diffusion2D-PT-D10N100-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N100-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N100-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N100-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N100-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N100-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N100-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N100-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N100-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N100-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678284002837

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 7 (type EXCL) for 6 Diffusion2D-PT-D10N100-CTLFireability-02
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Diffusion2D-PT-D10N100-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-15: CONJ 0 6 0 0 6 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/179 5/32 Diffusion2D-PT-D10N100-CTLFireability-02 922035 m, 184407 m/sec, 3488091 t fired, .

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Diffusion2D-PT-D10N100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-15: CONJ 0 6 0 0 6 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/179 10/32 Diffusion2D-PT-D10N100-CTLFireability-02 1902066 m, 196006 m/sec, 7198267 t fired, .

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Diffusion2D-PT-D10N100-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-15: CONJ 0 6 0 0 6 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 15/179 15/32 Diffusion2D-PT-D10N100-CTLFireability-02 2883063 m, 196199 m/sec, 10915949 t fired, .

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Diffusion2D-PT-D10N100-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-15: CONJ 0 6 0 0 6 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 20/179 20/32 Diffusion2D-PT-D10N100-CTLFireability-02 3810582 m, 185503 m/sec, 14436578 t fired, .

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Diffusion2D-PT-D10N100-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-15: CONJ 0 6 0 0 6 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 25/179 24/32 Diffusion2D-PT-D10N100-CTLFireability-02 4718038 m, 181491 m/sec, 17887195 t fired, .

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Diffusion2D-PT-D10N100-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
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Diffusion2D-PT-D10N100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D10N100-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D10N100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D10N100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 30/1134 24/32 Diffusion2D-PT-D10N100-CTLFireability-00 4744717 m, 150351 m/sec, 17989857 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Diffusion2D-PT-D10N100-CTLFireability-03: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-04: CTL false CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-05: CTL false CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-07: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-11: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-12: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-14: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-15: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Diffusion2D-PT-D10N100-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D10N100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D10N100-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D10N100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D10N100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 35/1134 28/32 Diffusion2D-PT-D10N100-CTLFireability-00 5525645 m, 156185 m/sec, 20952060 t fired, .

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Diffusion2D-PT-D10N100-CTLFireability-03: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-04: CTL false CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-05: CTL false CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-07: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-11: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-12: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-14: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-15: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Diffusion2D-PT-D10N100-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D10N100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D10N100-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D10N100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D10N100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 40/1134 32/32 Diffusion2D-PT-D10N100-CTLFireability-00 6309385 m, 156748 m/sec, 23923756 t fired, .

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lola: CANCELED task # 1 (type EXCL) for Diffusion2D-PT-D10N100-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Diffusion2D-PT-D10N100-CTLFireability-03: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-04: CTL false CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-05: CTL false CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-07: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-11: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-12: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-14: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-15: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Diffusion2D-PT-D10N100-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D10N100-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D10N100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D10N100-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N100-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D10N100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D10N100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 241 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
lola: LAUNCH task # 19 (type EXCL) for 18 Diffusion2D-PT-D10N100-CTLFireability-06
lola: time limit : 1679 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for Diffusion2D-PT-D10N100-CTLFireability-06
lola: result : true
lola: markings : 2
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 Diffusion2D-PT-D10N100-CTLFireability-13
lola: time limit : 3359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for Diffusion2D-PT-D10N100-CTLFireability-13
lola: result : true
lola: markings : 151
lola: fired transitions : 617
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 15

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Diffusion2D-PT-D10N100-CTLFireability-00: CTL unknown AGGR
Diffusion2D-PT-D10N100-CTLFireability-01: CTL unknown AGGR
Diffusion2D-PT-D10N100-CTLFireability-02: CTL unknown AGGR
Diffusion2D-PT-D10N100-CTLFireability-03: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-04: CTL false CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-05: CTL false CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-06: EGEF true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-07: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-08: CTL unknown AGGR
Diffusion2D-PT-D10N100-CTLFireability-09: CTL unknown AGGR
Diffusion2D-PT-D10N100-CTLFireability-11: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-12: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-13: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-14: CTL true CTL model checker
Diffusion2D-PT-D10N100-CTLFireability-15: CONJ false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Diffusion2D-PT-D10N100"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Diffusion2D-PT-D10N100, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r135-smll-167819413600130"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Diffusion2D-PT-D10N100.tgz
mv Diffusion2D-PT-D10N100 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;