About the Execution of LoLA for DoubleExponent-PT-010
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16218.640 | 3600000.00 | 10127884.00 | 24511.90 | ???TFTFTTFT?T??T | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r134-smll-167819412800474.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is DoubleExponent-PT-010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r134-smll-167819412800474
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 604K
-rw-r--r-- 1 mcc users 7.2K Feb 26 13:29 CTLCardinality.txt
-rw-r--r-- 1 mcc users 78K Feb 26 13:29 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K Feb 26 13:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 26 13:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:01 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 16:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:01 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.2K Feb 26 13:30 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 95K Feb 26 13:30 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.3K Feb 26 13:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 83K Feb 26 13:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:01 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:01 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 169K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DoubleExponent-PT-010-CTLFireability-00
FORMULA_NAME DoubleExponent-PT-010-CTLFireability-01
FORMULA_NAME DoubleExponent-PT-010-CTLFireability-02
FORMULA_NAME DoubleExponent-PT-010-CTLFireability-03
FORMULA_NAME DoubleExponent-PT-010-CTLFireability-04
FORMULA_NAME DoubleExponent-PT-010-CTLFireability-05
FORMULA_NAME DoubleExponent-PT-010-CTLFireability-06
FORMULA_NAME DoubleExponent-PT-010-CTLFireability-07
FORMULA_NAME DoubleExponent-PT-010-CTLFireability-08
FORMULA_NAME DoubleExponent-PT-010-CTLFireability-09
FORMULA_NAME DoubleExponent-PT-010-CTLFireability-10
FORMULA_NAME DoubleExponent-PT-010-CTLFireability-11
FORMULA_NAME DoubleExponent-PT-010-CTLFireability-12
FORMULA_NAME DoubleExponent-PT-010-CTLFireability-13
FORMULA_NAME DoubleExponent-PT-010-CTLFireability-14
FORMULA_NAME DoubleExponent-PT-010-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678441120176
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DoubleExponent-PT-010
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT DoubleExponent-PT-010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA DoubleExponent-PT-010-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleExponent-PT-010-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleExponent-PT-010-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleExponent-PT-010-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleExponent-PT-010-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleExponent-PT-010-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleExponent-PT-010-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleExponent-PT-010-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleExponent-PT-010-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleExponent-PT-010-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 13088620 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16271116 kB
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:183
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:182
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 58 (type EXCL) for 0 DoubleExponent-PT-010-CTLFireability-00
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 56 (type FNDP) for 0 DoubleExponent-PT-010-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type EQUN) for 0 DoubleExponent-PT-010-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SRCH) for 0 DoubleExponent-PT-010-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 59 (type SRCH) for DoubleExponent-PT-010-CTLFireability-00
lola: result : unknown
lola: markings : 10
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/CTLFireability-57.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH INITIAL
lola: LAUNCH task # 30 (type CNST) for 29 DoubleExponent-PT-010-CTLFireability-07
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 30 (type CNST) for DoubleExponent-PT-010-CTLFireability-07
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:665
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:662
lola: rewrite Frontend/Parser/formula_rewrite.k:674
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 62 (type FNDP) for 19 DoubleExponent-PT-010-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: warning, failure of lp_solve (at job 16)
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 1 3 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-05: EF 0 3 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 5 0 0 2 0 0 0
DoubleExponent-PT-010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 4 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 5/899 0/5 DoubleExponent-PT-010-CTLFireability-00 602734 t fired, 61871 attempts, .
57 EF STEQ 5/899 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
58 EF EXCL 5/211 4/32 DoubleExponent-PT-010-CTLFireability-00 548525 m, 109705 m/sec, 548524 t fired, .
62 EF FNDP 5/1199 0/5 DoubleExponent-PT-010-CTLFireability-05 1177846 t fired, 120709 attempts, .
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DoubleExponent-PT-010-CTLFireability-00: DISJ 0 1 3 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-05: EF 0 3 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 5 0 0 2 0 0 0
DoubleExponent-PT-010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 4 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 10/894 0/5 DoubleExponent-PT-010-CTLFireability-00 1258476 t fired, 128875 attempts, .
57 EF STEQ 10/894 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
58 EF EXCL 10/211 7/32 DoubleExponent-PT-010-CTLFireability-00 1147528 m, 119800 m/sec, 1147527 t fired, .
62 EF FNDP 10/1194 0/5 DoubleExponent-PT-010-CTLFireability-05 2509267 t fired, 257060 attempts, .
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DoubleExponent-PT-010-CTLFireability-00: DISJ 0 1 3 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-05: EF 0 3 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 5 0 0 2 0 0 0
DoubleExponent-PT-010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 4 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 15/889 0/5 DoubleExponent-PT-010-CTLFireability-00 1922145 t fired, 197175 attempts, .
57 EF STEQ 15/889 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
58 EF EXCL 15/211 10/32 DoubleExponent-PT-010-CTLFireability-00 1751328 m, 120760 m/sec, 1751327 t fired, .
62 EF FNDP 15/1189 0/5 DoubleExponent-PT-010-CTLFireability-05 3838532 t fired, 393045 attempts, .
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DoubleExponent-PT-010-CTLFireability-00: DISJ 0 1 3 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-05: EF 0 3 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 5 0 0 2 0 0 0
DoubleExponent-PT-010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 4 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 20/884 0/5 DoubleExponent-PT-010-CTLFireability-00 2586452 t fired, 265477 attempts, .
57 EF STEQ 20/884 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
58 EF EXCL 20/211 14/32 DoubleExponent-PT-010-CTLFireability-00 2348857 m, 119505 m/sec, 2348856 t fired, .
62 EF FNDP 20/1184 0/5 DoubleExponent-PT-010-CTLFireability-05 5165337 t fired, 529204 attempts, .
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DoubleExponent-PT-010-CTLFireability-00: DISJ 0 1 3 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-05: EF 0 3 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 5 0 0 2 0 0 0
DoubleExponent-PT-010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 4 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 25/879 0/5 DoubleExponent-PT-010-CTLFireability-00 3253840 t fired, 333759 attempts, .
57 EF STEQ 25/879 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
58 EF EXCL 25/211 17/32 DoubleExponent-PT-010-CTLFireability-00 2948614 m, 119951 m/sec, 2948613 t fired, .
62 EF FNDP 25/1179 0/5 DoubleExponent-PT-010-CTLFireability-05 6500450 t fired, 666190 attempts, .
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DoubleExponent-PT-010-CTLFireability-00: DISJ 0 1 3 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-05: EF 0 3 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 5 0 0 2 0 0 0
DoubleExponent-PT-010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 4 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 30/874 0/5 DoubleExponent-PT-010-CTLFireability-00 3917333 t fired, 401923 attempts, .
57 EF STEQ 30/874 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
58 EF EXCL 30/211 20/32 DoubleExponent-PT-010-CTLFireability-00 3550463 m, 120369 m/sec, 3550462 t fired, .
62 EF FNDP 30/1174 0/5 DoubleExponent-PT-010-CTLFireability-05 7834897 t fired, 803139 attempts, .
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DoubleExponent-PT-010-CTLFireability-00: DISJ 0 1 3 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-05: EF 0 3 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 5 0 0 2 0 0 0
DoubleExponent-PT-010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 4 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 35/869 0/5 DoubleExponent-PT-010-CTLFireability-00 4577354 t fired, 469782 attempts, .
57 EF STEQ 35/869 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
58 EF EXCL 35/211 24/32 DoubleExponent-PT-010-CTLFireability-00 4148558 m, 119619 m/sec, 4148557 t fired, .
62 EF FNDP 35/1169 0/5 DoubleExponent-PT-010-CTLFireability-05 9173345 t fired, 940309 attempts, .
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DoubleExponent-PT-010-CTLFireability-00: DISJ 0 1 3 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-05: EF 0 3 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 5 0 0 2 0 0 0
DoubleExponent-PT-010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 4 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 40/864 0/5 DoubleExponent-PT-010-CTLFireability-00 5236764 t fired, 537333 attempts, .
57 EF STEQ 40/864 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
58 EF EXCL 40/211 27/32 DoubleExponent-PT-010-CTLFireability-00 4745904 m, 119469 m/sec, 4745903 t fired, .
62 EF FNDP 40/1164 0/5 DoubleExponent-PT-010-CTLFireability-05 10512838 t fired, 1077546 attempts, .
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DoubleExponent-PT-010-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-05: EF 0 3 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 5 0 0 2 0 0 0
DoubleExponent-PT-010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 4 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 45/859 0/5 DoubleExponent-PT-010-CTLFireability-00 5896903 t fired, 605091 attempts, .
57 EF STEQ 45/859 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
58 EF EXCL 45/211 30/32 DoubleExponent-PT-010-CTLFireability-00 5341504 m, 119120 m/sec, 5341503 t fired, .
62 EF FNDP 45/1159 0/5 DoubleExponent-PT-010-CTLFireability-05 11851904 t fired, 1214727 attempts, .
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DoubleExponent-PT-010-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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DoubleExponent-PT-010-CTLFireability-06: CONJ 0 5 0 0 2 0 0 0
DoubleExponent-PT-010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 4 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 50/854 0/5 DoubleExponent-PT-010-CTLFireability-00 6554018 t fired, 672376 attempts, .
57 EF STEQ 50/854 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 50/1154 0/5 DoubleExponent-PT-010-CTLFireability-05 13203783 t fired, 1353399 attempts, .
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lola: result : true
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DoubleExponent-PT-010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 5/236 8/32 DoubleExponent-PT-010-CTLFireability-13 1066637 m, 213327 m/sec, 1066637 t fired, .
56 EF FNDP 55/849 0/5 DoubleExponent-PT-010-CTLFireability-00 7214114 t fired, 740202 attempts, .
57 EF STEQ 55/849 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 55/1149 0/5 DoubleExponent-PT-010-CTLFireability-05 14544421 t fired, 1490597 attempts, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 10/236 15/32 DoubleExponent-PT-010-CTLFireability-13 2137687 m, 214210 m/sec, 2137688 t fired, .
56 EF FNDP 60/844 0/5 DoubleExponent-PT-010-CTLFireability-00 7874878 t fired, 807894 attempts, .
57 EF STEQ 60/844 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 60/1144 0/5 DoubleExponent-PT-010-CTLFireability-05 15883921 t fired, 1627668 attempts, .
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48 CTL EXCL 15/236 22/32 DoubleExponent-PT-010-CTLFireability-13 3176269 m, 207716 m/sec, 3176270 t fired, .
56 EF FNDP 65/839 0/5 DoubleExponent-PT-010-CTLFireability-00 8535318 t fired, 875493 attempts, .
57 EF STEQ 65/839 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 65/1139 0/5 DoubleExponent-PT-010-CTLFireability-05 17225390 t fired, 1765174 attempts, .
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48 CTL EXCL 20/236 29/32 DoubleExponent-PT-010-CTLFireability-13 4189590 m, 202664 m/sec, 4189591 t fired, .
56 EF FNDP 70/834 0/5 DoubleExponent-PT-010-CTLFireability-00 9203960 t fired, 943900 attempts, .
57 EF STEQ 70/834 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 70/1134 0/5 DoubleExponent-PT-010-CTLFireability-05 18551918 t fired, 1901377 attempts, .
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56 EF FNDP 75/829 0/5 DoubleExponent-PT-010-CTLFireability-00 9881700 t fired, 1013271 attempts, .
57 EF STEQ 75/829 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 75/1129 0/5 DoubleExponent-PT-010-CTLFireability-05 19855904 t fired, 2034957 attempts, .
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33 CTL EXCL 5/251 3/32 DoubleExponent-PT-010-CTLFireability-08 441810 m, 88362 m/sec, 883674 t fired, .
56 EF FNDP 80/824 0/5 DoubleExponent-PT-010-CTLFireability-00 10540370 t fired, 1080830 attempts, .
57 EF STEQ 80/824 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 80/1124 0/5 DoubleExponent-PT-010-CTLFireability-05 21147943 t fired, 2167644 attempts, .
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33 CTL EXCL 10/251 6/32 DoubleExponent-PT-010-CTLFireability-08 875180 m, 86674 m/sec, 1750463 t fired, .
56 EF FNDP 85/819 0/5 DoubleExponent-PT-010-CTLFireability-00 11192693 t fired, 1147920 attempts, .
57 EF STEQ 85/819 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 85/1119 0/5 DoubleExponent-PT-010-CTLFireability-05 22438819 t fired, 2300089 attempts, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 15/251 9/32 DoubleExponent-PT-010-CTLFireability-08 1320504 m, 89064 m/sec, 2641161 t fired, .
56 EF FNDP 90/814 0/5 DoubleExponent-PT-010-CTLFireability-00 11863791 t fired, 1216778 attempts, .
57 EF STEQ 90/814 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 90/1114 0/5 DoubleExponent-PT-010-CTLFireability-05 23738310 t fired, 2433069 attempts, .
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33 CTL EXCL 20/251 12/32 DoubleExponent-PT-010-CTLFireability-08 1738950 m, 83689 m/sec, 3478091 t fired, .
56 EF FNDP 95/809 0/5 DoubleExponent-PT-010-CTLFireability-00 12509394 t fired, 1282923 attempts, .
57 EF STEQ 95/809 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 95/1109 0/5 DoubleExponent-PT-010-CTLFireability-05 25040707 t fired, 2566776 attempts, .
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33 CTL EXCL 25/251 15/32 DoubleExponent-PT-010-CTLFireability-08 2184007 m, 89011 m/sec, 4368252 t fired, .
56 EF FNDP 100/804 0/5 DoubleExponent-PT-010-CTLFireability-00 13157939 t fired, 1349574 attempts, .
57 EF STEQ 100/804 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 100/1104 0/5 DoubleExponent-PT-010-CTLFireability-05 26338118 t fired, 2700042 attempts, .
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8 CTL EXCL 3/349 3/32 DoubleExponent-PT-010-CTLFireability-01 320381 m, 64076 m/sec, 640763 t fired, .
56 EF FNDP 105/797 0/5 DoubleExponent-PT-010-CTLFireability-00 13816682 t fired, 1417016 attempts, .
57 EF STEQ 105/797 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 105/1097 0/5 DoubleExponent-PT-010-CTLFireability-05 27673384 t fired, 2836769 attempts, .
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8 CTL EXCL 8/349 7/32 DoubleExponent-PT-010-CTLFireability-01 907280 m, 117379 m/sec, 1814560 t fired, .
56 EF FNDP 110/794 0/5 DoubleExponent-PT-010-CTLFireability-00 14485504 t fired, 1485582 attempts, .
57 EF STEQ 110/794 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 CTL EXCL 13/349 11/32 DoubleExponent-PT-010-CTLFireability-01 1494885 m, 117521 m/sec, 2989770 t fired, .
56 EF FNDP 115/789 0/5 DoubleExponent-PT-010-CTLFireability-00 15153661 t fired, 1554218 attempts, .
57 EF STEQ 115/789 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 115/1089 0/5 DoubleExponent-PT-010-CTLFireability-05 30318447 t fired, 3108116 attempts, .
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DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 CTL EXCL 18/349 14/32 DoubleExponent-PT-010-CTLFireability-01 2085267 m, 118076 m/sec, 4170534 t fired, .
56 EF FNDP 120/784 0/5 DoubleExponent-PT-010-CTLFireability-00 15815250 t fired, 1622039 attempts, .
57 EF STEQ 120/784 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 120/1084 0/5 DoubleExponent-PT-010-CTLFireability-05 31635959 t fired, 3243456 attempts, .
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8 CTL EXCL 23/349 18/32 DoubleExponent-PT-010-CTLFireability-01 2660565 m, 115059 m/sec, 5321131 t fired, .
56 EF FNDP 125/779 0/5 DoubleExponent-PT-010-CTLFireability-00 16488180 t fired, 1691078 attempts, .
57 EF STEQ 125/779 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 125/1079 0/5 DoubleExponent-PT-010-CTLFireability-05 32949395 t fired, 3378075 attempts, .
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8 CTL EXCL 28/349 22/32 DoubleExponent-PT-010-CTLFireability-01 3214868 m, 110860 m/sec, 6429737 t fired, .
56 EF FNDP 130/774 0/5 DoubleExponent-PT-010-CTLFireability-00 17160583 t fired, 1759837 attempts, .
57 EF STEQ 130/774 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 130/1074 0/5 DoubleExponent-PT-010-CTLFireability-05 34262728 t fired, 3512650 attempts, .
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8 CTL EXCL 33/349 26/32 DoubleExponent-PT-010-CTLFireability-01 3766655 m, 110357 m/sec, 7533310 t fired, .
56 EF FNDP 135/769 0/5 DoubleExponent-PT-010-CTLFireability-00 17832020 t fired, 1828716 attempts, .
57 EF STEQ 135/769 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 135/1069 0/5 DoubleExponent-PT-010-CTLFireability-05 35580238 t fired, 3647788 attempts, .
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8 CTL EXCL 38/349 29/32 DoubleExponent-PT-010-CTLFireability-01 4315477 m, 109764 m/sec, 8630954 t fired, .
56 EF FNDP 140/764 0/5 DoubleExponent-PT-010-CTLFireability-00 18493041 t fired, 1896582 attempts, .
57 EF STEQ 140/764 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 140/1064 0/5 DoubleExponent-PT-010-CTLFireability-05 36903457 t fired, 3783446 attempts, .
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56 EF FNDP 145/759 0/5 DoubleExponent-PT-010-CTLFireability-00 19162534 t fired, 1965037 attempts, .
57 EF STEQ 145/759 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 145/1059 0/5 DoubleExponent-PT-010-CTLFireability-05 38223924 t fired, 3918455 attempts, .
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56 EF FNDP 150/754 0/5 DoubleExponent-PT-010-CTLFireability-00 19832330 t fired, 2033679 attempts, .
57 EF STEQ 150/754 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 150/1054 0/5 DoubleExponent-PT-010-CTLFireability-05 39538327 t fired, 4053444 attempts, .
71 EF EXCL 5/383 4/32 DoubleExponent-PT-010-CTLFireability-14 601736 m, 120347 m/sec, 601735 t fired, .
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56 EF FNDP 155/749 0/5 DoubleExponent-PT-010-CTLFireability-00 20499633 t fired, 2102172 attempts, .
57 EF STEQ 155/749 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 155/1049 0/5 DoubleExponent-PT-010-CTLFireability-05 40855986 t fired, 4188779 attempts, .
71 EF EXCL 10/383 7/32 DoubleExponent-PT-010-CTLFireability-14 1206632 m, 120979 m/sec, 1206631 t fired, .
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56 EF FNDP 160/744 0/5 DoubleExponent-PT-010-CTLFireability-00 21166302 t fired, 2170756 attempts, .
57 EF STEQ 160/744 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 160/1044 0/5 DoubleExponent-PT-010-CTLFireability-05 42169425 t fired, 4323552 attempts, .
71 EF EXCL 15/383 11/32 DoubleExponent-PT-010-CTLFireability-14 1819537 m, 122581 m/sec, 1819537 t fired, .
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56 EF FNDP 165/739 0/5 DoubleExponent-PT-010-CTLFireability-00 21831581 t fired, 2238972 attempts, .
57 EF STEQ 165/739 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 165/1039 0/5 DoubleExponent-PT-010-CTLFireability-05 43482133 t fired, 4458271 attempts, .
71 EF EXCL 20/383 14/32 DoubleExponent-PT-010-CTLFireability-14 2431225 m, 122337 m/sec, 2431224 t fired, .
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56 EF FNDP 170/734 0/5 DoubleExponent-PT-010-CTLFireability-00 22497911 t fired, 2307331 attempts, .
57 EF STEQ 170/734 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 170/1034 0/5 DoubleExponent-PT-010-CTLFireability-05 44797861 t fired, 4593318 attempts, .
71 EF EXCL 25/383 17/32 DoubleExponent-PT-010-CTLFireability-14 3041475 m, 122050 m/sec, 3041475 t fired, .
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56 EF FNDP 175/729 0/5 DoubleExponent-PT-010-CTLFireability-00 23162967 t fired, 2375763 attempts, .
57 EF STEQ 175/729 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 175/1029 0/5 DoubleExponent-PT-010-CTLFireability-05 46115461 t fired, 4728448 attempts, .
71 EF EXCL 30/383 21/32 DoubleExponent-PT-010-CTLFireability-14 3652748 m, 122254 m/sec, 3652747 t fired, .
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DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-05: EF 0 3 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 4 0 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 3 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 180/724 0/5 DoubleExponent-PT-010-CTLFireability-00 23828947 t fired, 2443980 attempts, .
57 EF STEQ 180/724 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 180/1024 0/5 DoubleExponent-PT-010-CTLFireability-05 47430552 t fired, 4863322 attempts, .
71 EF EXCL 35/383 24/32 DoubleExponent-PT-010-CTLFireability-14 4261445 m, 121739 m/sec, 4261444 t fired, .
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DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-05: EF 0 3 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 4 0 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 185/719 0/5 DoubleExponent-PT-010-CTLFireability-00 24494429 t fired, 2512140 attempts, .
57 EF STEQ 185/719 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 185/1019 0/5 DoubleExponent-PT-010-CTLFireability-05 48746601 t fired, 4998188 attempts, .
71 EF EXCL 40/383 28/32 DoubleExponent-PT-010-CTLFireability-14 4870477 m, 121806 m/sec, 4870476 t fired, .
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DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
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DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-05: EF 0 3 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 4 0 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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56 EF FNDP 190/714 0/5 DoubleExponent-PT-010-CTLFireability-00 25153513 t fired, 2579731 attempts, .
57 EF STEQ 190/714 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 190/1014 0/5 DoubleExponent-PT-010-CTLFireability-05 50062886 t fired, 5133073 attempts, .
71 EF EXCL 45/383 31/32 DoubleExponent-PT-010-CTLFireability-14 5470821 m, 120068 m/sec, 5470821 t fired, .
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DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
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DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-05: EF 0 3 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 4 0 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 3 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 195/709 0/5 DoubleExponent-PT-010-CTLFireability-00 25836506 t fired, 2649918 attempts, .
57 EF STEQ 195/709 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
62 EF FNDP 195/1009 0/5 DoubleExponent-PT-010-CTLFireability-05 51391135 t fired, 5268966 attempts, .
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lola: FINISHED task # 64 (type EXCL) for DoubleExponent-PT-010-CTLFireability-05
lola: result : true
lola: markings : 2012
lola: fired transitions : 2011
lola: time used : 0.000000
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lola: CANCELED task # 62 (type FNDP) for DoubleExponent-PT-010-CTLFireability-05 (obsolete)
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lola: result : unknown
lola: fired transitions : 51394484
lola: tried executions : 5269296
lola: time used : 195.000000
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-00: DISJ 0 1 2 0 3 0 1 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 3 1 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 3 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 200/1604 0/5 DoubleExponent-PT-010-CTLFireability-00 26513273 t fired, 2719102 attempts, .
57 EF STEQ 200/1004 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
67 LTL EXCL 5/486 8/32 DoubleExponent-PT-010-CTLFireability-11 843010 m, 168602 m/sec, 994706 t fired, .
68 EF FNDP 5/1134 0/5 DoubleExponent-PT-010-CTLFireability-06 636607 t fired, 65394 attempts, .
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DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-00: DISJ 0 1 2 0 3 0 1 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 3 1 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 3 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 205/1599 0/5 DoubleExponent-PT-010-CTLFireability-00 27190533 t fired, 2788477 attempts, .
57 EF STEQ 205/999 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
67 LTL EXCL 10/486 15/32 DoubleExponent-PT-010-CTLFireability-11 1678587 m, 167115 m/sec, 1980582 t fired, .
68 EF FNDP 10/1129 0/5 DoubleExponent-PT-010-CTLFireability-06 1280404 t fired, 131464 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-00: DISJ 0 1 2 0 3 0 1 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 3 1 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 3 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 210/1594 0/5 DoubleExponent-PT-010-CTLFireability-00 27864972 t fired, 2857640 attempts, .
57 EF STEQ 210/994 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
67 LTL EXCL 15/486 22/32 DoubleExponent-PT-010-CTLFireability-11 2458363 m, 155955 m/sec, 2900878 t fired, .
68 EF FNDP 15/1124 0/5 DoubleExponent-PT-010-CTLFireability-06 1906192 t fired, 195409 attempts, .
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DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-00: DISJ 0 1 2 0 3 0 1 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 3 1 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 3 0 0 1 0 1 0
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56 EF FNDP 215/1589 0/5 DoubleExponent-PT-010-CTLFireability-00 28533996 t fired, 2926268 attempts, .
57 EF STEQ 215/989 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
67 LTL EXCL 20/486 29/32 DoubleExponent-PT-010-CTLFireability-11 3246285 m, 157584 m/sec, 3830925 t fired, .
68 EF FNDP 20/1119 0/5 DoubleExponent-PT-010-CTLFireability-06 2548698 t fired, 261175 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-00: DISJ 0 1 2 0 3 0 1 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 3 1 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 3 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 220/1584 0/5 DoubleExponent-PT-010-CTLFireability-00 29207214 t fired, 2995133 attempts, .
57 EF STEQ 220/984 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
68 EF FNDP 25/1114 0/5 DoubleExponent-PT-010-CTLFireability-06 3215176 t fired, 329753 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 2 2 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 3 0 0 1 0 1 0
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56 EF FNDP 225/1579 0/5 DoubleExponent-PT-010-CTLFireability-00 29878545 t fired, 3064025 attempts, .
57 EF STEQ 225/979 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
68 EF FNDP 30/1109 0/5 DoubleExponent-PT-010-CTLFireability-06 3870178 t fired, 397021 attempts, .
74 EF EXCL 5/563 4/32 DoubleExponent-PT-010-CTLFireability-06 599082 m, 119816 m/sec, 599081 t fired, .
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DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-06: CONJ 0 2 2 0 3 0 0 0
DoubleExponent-PT-010-CTLFireability-09: AFAG 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 3 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 230/1574 0/5 DoubleExponent-PT-010-CTLFireability-00 30553184 t fired, 3133168 attempts, .
57 EF STEQ 230/974 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
68 EF FNDP 35/1104 0/5 DoubleExponent-PT-010-CTLFireability-06 4517483 t fired, 463365 attempts, .
74 EF EXCL 10/563 7/32 DoubleExponent-PT-010-CTLFireability-06 1197326 m, 119648 m/sec, 1197325 t fired, .
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lola: FINISHED task # 74 (type EXCL) for DoubleExponent-PT-010-CTLFireability-06
lola: result : true
lola: markings : 1335554
lola: fired transitions : 1335553
lola: time used : 11.000000
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lola: CANCELED task # 68 (type FNDP) for DoubleExponent-PT-010-CTLFireability-06 (obsolete)
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lola: FINISHED task # 68 (type FNDP) for DoubleExponent-PT-010-CTLFireability-06
lola: result : unknown
lola: fired transitions : 4667029
lola: tried executions : 478635
lola: time used : 36.000000
lola: memory pages used : 0
lola: FINISHED task # 36 (type EXCL) for DoubleExponent-PT-010-CTLFireability-09
lola: result : false
lola: markings : 10
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 60 (type EXCL) for 0 DoubleExponent-PT-010-CTLFireability-00
lola: time limit : 842 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 3 0 3 0 1 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 2 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 235/3368 0/5 DoubleExponent-PT-010-CTLFireability-00 31228818 t fired, 3202578 attempts, .
57 EF STEQ 235/1568 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
60 AGEF EXCL 4/842 9/32 DoubleExponent-PT-010-CTLFireability-00 1368406 m, 273681 m/sec, 1368406 t fired, .
65 EF FNDP 4/1684 0/5 DoubleExponent-PT-010-CTLFireability-14 512072 t fired, 52348 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 3 0 3 0 1 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 2 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 240/3364 0/5 DoubleExponent-PT-010-CTLFireability-00 31906023 t fired, 3271897 attempts, .
57 EF STEQ 240/1564 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
60 AGEF EXCL 9/842 19/32 DoubleExponent-PT-010-CTLFireability-00 3028753 m, 332069 m/sec, 3028753 t fired, .
65 EF FNDP 9/1680 0/5 DoubleExponent-PT-010-CTLFireability-14 1179786 t fired, 120990 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 3 0 3 0 1 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 2 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 245/3359 0/5 DoubleExponent-PT-010-CTLFireability-00 32576847 t fired, 3340708 attempts, .
57 EF STEQ 245/1559 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
60 AGEF EXCL 14/842 28/32 DoubleExponent-PT-010-CTLFireability-00 4649376 m, 324124 m/sec, 4649376 t fired, .
65 EF FNDP 14/1675 0/5 DoubleExponent-PT-010-CTLFireability-14 1854502 t fired, 190274 attempts, .
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lola: CANCELED task # 60 (type EXCL) for DoubleExponent-PT-010-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 2 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 250/3354 0/5 DoubleExponent-PT-010-CTLFireability-00 33242294 t fired, 3408926 attempts, .
57 EF STEQ 250/1554 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 19/1670 0/5 DoubleExponent-PT-010-CTLFireability-14 2550651 t fired, 261551 attempts, .
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lola: LAUNCH task # 11 (type EXCL) for 10 DoubleExponent-PT-010-CTLFireability-02
lola: time limit : 1116 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 2 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 5/1116 4/32 DoubleExponent-PT-010-CTLFireability-02 591064 m, 118212 m/sec, 1666739 t fired, .
56 EF FNDP 255/3349 0/5 DoubleExponent-PT-010-CTLFireability-00 33906193 t fired, 3476922 attempts, .
57 EF STEQ 255/1549 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 24/1665 0/5 DoubleExponent-PT-010-CTLFireability-14 3231616 t fired, 331415 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 2 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 10/1116 8/32 DoubleExponent-PT-010-CTLFireability-02 1184240 m, 118635 m/sec, 3339378 t fired, .
56 EF FNDP 260/3344 0/5 DoubleExponent-PT-010-CTLFireability-00 34570831 t fired, 3545062 attempts, .
57 EF STEQ 260/1544 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 29/1660 0/5 DoubleExponent-PT-010-CTLFireability-14 3912585 t fired, 401235 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 2 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 15/1116 12/32 DoubleExponent-PT-010-CTLFireability-02 1760796 m, 115311 m/sec, 4965351 t fired, .
56 EF FNDP 265/3339 0/5 DoubleExponent-PT-010-CTLFireability-00 35235128 t fired, 3613184 attempts, .
57 EF STEQ 265/1539 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 34/1655 0/5 DoubleExponent-PT-010-CTLFireability-14 4592252 t fired, 470837 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 2 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 20/1116 15/32 DoubleExponent-PT-010-CTLFireability-02 2311594 m, 110159 m/sec, 6518519 t fired, .
56 EF FNDP 270/3334 0/5 DoubleExponent-PT-010-CTLFireability-00 35894089 t fired, 3680844 attempts, .
57 EF STEQ 270/1534 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 39/1650 0/5 DoubleExponent-PT-010-CTLFireability-14 5249031 t fired, 537969 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 2 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 25/1116 19/32 DoubleExponent-PT-010-CTLFireability-02 2865028 m, 110686 m/sec, 8079023 t fired, .
56 EF FNDP 275/3329 0/5 DoubleExponent-PT-010-CTLFireability-00 36572234 t fired, 3750386 attempts, .
57 EF STEQ 275/1529 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 44/1645 0/5 DoubleExponent-PT-010-CTLFireability-14 5868219 t fired, 601185 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 2 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 30/1116 22/32 DoubleExponent-PT-010-CTLFireability-02 3415750 m, 110144 m/sec, 9631846 t fired, .
56 EF FNDP 280/3324 0/5 DoubleExponent-PT-010-CTLFireability-00 37250695 t fired, 3819963 attempts, .
57 EF STEQ 280/1524 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 49/1640 0/5 DoubleExponent-PT-010-CTLFireability-14 6536562 t fired, 669624 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 2 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 35/1116 26/32 DoubleExponent-PT-010-CTLFireability-02 3966621 m, 110174 m/sec, 11185111 t fired, .
56 EF FNDP 285/3319 0/5 DoubleExponent-PT-010-CTLFireability-00 37929787 t fired, 3889461 attempts, .
57 EF STEQ 285/1519 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 54/1635 0/5 DoubleExponent-PT-010-CTLFireability-14 7204719 t fired, 738086 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 2 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 40/1116 29/32 DoubleExponent-PT-010-CTLFireability-02 4495214 m, 105718 m/sec, 12675522 t fired, .
56 EF FNDP 290/3314 0/5 DoubleExponent-PT-010-CTLFireability-00 38590126 t fired, 3957089 attempts, .
57 EF STEQ 290/1514 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 59/1630 0/5 DoubleExponent-PT-010-CTLFireability-14 7860596 t fired, 805573 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 2 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 295/3309 0/5 DoubleExponent-PT-010-CTLFireability-00 39262569 t fired, 4025915 attempts, .
57 EF STEQ 295/1509 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 64/1625 0/5 DoubleExponent-PT-010-CTLFireability-14 8532968 t fired, 874746 attempts, .
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lola: LAUNCH task # 45 (type EXCL) for 44 DoubleExponent-PT-010-CTLFireability-12
lola: time limit : 1652 sec
lola: memory limit: 32 pages
lola: FINISHED task # 45 (type EXCL) for DoubleExponent-PT-010-CTLFireability-12
lola: result : true
lola: markings : 8
lola: fired transitions : 16
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 38 DoubleExponent-PT-010-CTLFireability-10
lola: time limit : 3304 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for DoubleExponent-PT-010-CTLFireability-10
lola: result : true
lola: markings : 8
lola: fired transitions : 30
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 70 (type EQUN) for 50 DoubleExponent-PT-010-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/CTLFireability-70.sara.
sara: place or transition ordering is non-deterministic
sara: warning, failure of lp_solve (at job 17)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 1 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 300/3304 0/5 DoubleExponent-PT-010-CTLFireability-00 39930921 t fired, 4094463 attempts, .
57 EF STEQ 300/3304 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 69/3304 0/5 DoubleExponent-PT-010-CTLFireability-14 9205997 t fired, 943919 attempts, .
70 EF STEQ 5/1652 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 1 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 305/3299 0/5 DoubleExponent-PT-010-CTLFireability-00 40603286 t fired, 4163430 attempts, .
57 EF STEQ 305/3299 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 74/3299 0/5 DoubleExponent-PT-010-CTLFireability-14 9881020 t fired, 1013045 attempts, .
70 EF STEQ 10/1647 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 1 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 310/3294 0/5 DoubleExponent-PT-010-CTLFireability-00 41277804 t fired, 4232396 attempts, .
57 EF STEQ 310/3294 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 79/3294 0/5 DoubleExponent-PT-010-CTLFireability-14 10548597 t fired, 1081434 attempts, .
70 EF STEQ 15/1642 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 1 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 315/3289 0/5 DoubleExponent-PT-010-CTLFireability-00 41954164 t fired, 4301598 attempts, .
57 EF STEQ 315/3289 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 84/3289 0/5 DoubleExponent-PT-010-CTLFireability-14 11215226 t fired, 1149858 attempts, .
70 EF STEQ 20/1637 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 1 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 320/3284 0/5 DoubleExponent-PT-010-CTLFireability-00 42630677 t fired, 4370947 attempts, .
57 EF STEQ 320/3284 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 89/3284 0/5 DoubleExponent-PT-010-CTLFireability-14 11880100 t fired, 1217942 attempts, .
70 EF STEQ 25/1632 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 1 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 325/3279 0/5 DoubleExponent-PT-010-CTLFireability-00 43307398 t fired, 4440328 attempts, .
57 EF STEQ 325/3279 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 94/3279 0/5 DoubleExponent-PT-010-CTLFireability-14 12548287 t fired, 1286305 attempts, .
70 EF STEQ 30/1627 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 1 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 330/3274 0/5 DoubleExponent-PT-010-CTLFireability-00 43983252 t fired, 4509832 attempts, .
57 EF STEQ 330/3274 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 99/3274 0/5 DoubleExponent-PT-010-CTLFireability-14 13218564 t fired, 1355009 attempts, .
70 EF STEQ 35/1622 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 1 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 335/3269 0/5 DoubleExponent-PT-010-CTLFireability-00 44646382 t fired, 4577733 attempts, .
57 EF STEQ 335/3269 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 104/3269 0/5 DoubleExponent-PT-010-CTLFireability-14 13898888 t fired, 1424913 attempts, .
70 EF STEQ 40/1617 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 1 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 340/3264 0/5 DoubleExponent-PT-010-CTLFireability-00 45309592 t fired, 4646005 attempts, .
57 EF STEQ 340/3264 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 109/3264 0/5 DoubleExponent-PT-010-CTLFireability-14 14579192 t fired, 1494785 attempts, .
70 EF STEQ 45/1612 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 1 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 345/3259 0/5 DoubleExponent-PT-010-CTLFireability-00 45974353 t fired, 4714282 attempts, .
57 EF STEQ 345/3259 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 114/3259 0/5 DoubleExponent-PT-010-CTLFireability-14 15261230 t fired, 1564793 attempts, .
70 EF STEQ 50/1607 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 1 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 350/3254 0/5 DoubleExponent-PT-010-CTLFireability-00 46645657 t fired, 4783172 attempts, .
57 EF STEQ 350/3254 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 119/3254 0/5 DoubleExponent-PT-010-CTLFireability-14 15941072 t fired, 1634596 attempts, .
70 EF STEQ 55/1602 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 1 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 355/3249 0/5 DoubleExponent-PT-010-CTLFireability-00 47287846 t fired, 4848926 attempts, .
57 EF STEQ 355/3249 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 124/3249 0/5 DoubleExponent-PT-010-CTLFireability-14 16616086 t fired, 1703740 attempts, .
70 EF STEQ 60/1597 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-05: EF true state space
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DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-14: EF 0 1 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 360/3244 0/5 DoubleExponent-PT-010-CTLFireability-00 47964613 t fired, 4918257 attempts, .
57 EF STEQ 360/3244 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 129/3244 0/5 DoubleExponent-PT-010-CTLFireability-14 17293285 t fired, 1773029 attempts, .
70 EF STEQ 65/1592 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
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56 EF FNDP 365/3239 0/5 DoubleExponent-PT-010-CTLFireability-00 48629982 t fired, 4986354 attempts, .
57 EF STEQ 365/3239 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 134/3239 0/5 DoubleExponent-PT-010-CTLFireability-14 17973841 t fired, 1842822 attempts, .
70 EF STEQ 70/1587 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
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56 EF FNDP 370/3234 0/5 DoubleExponent-PT-010-CTLFireability-00 49291471 t fired, 5053945 attempts, .
57 EF STEQ 370/3234 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 139/3234 0/5 DoubleExponent-PT-010-CTLFireability-14 18654239 t fired, 1912568 attempts, .
70 EF STEQ 75/1582 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
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56 EF FNDP 375/3229 0/5 DoubleExponent-PT-010-CTLFireability-00 49957310 t fired, 5122194 attempts, .
57 EF STEQ 375/3229 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 144/3229 0/5 DoubleExponent-PT-010-CTLFireability-14 19335695 t fired, 1982261 attempts, .
70 EF STEQ 80/1577 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-05: EF true state space
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56 EF FNDP 380/3224 0/5 DoubleExponent-PT-010-CTLFireability-00 50622429 t fired, 5190421 attempts, .
57 EF STEQ 380/3224 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 149/3224 0/5 DoubleExponent-PT-010-CTLFireability-14 20017226 t fired, 2052068 attempts, .
70 EF STEQ 85/1572 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
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56 EF FNDP 385/3219 0/5 DoubleExponent-PT-010-CTLFireability-00 51298951 t fired, 5259842 attempts, .
57 EF STEQ 385/3219 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 154/3219 0/5 DoubleExponent-PT-010-CTLFireability-14 20697775 t fired, 2121667 attempts, .
70 EF STEQ 90/1567 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
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56 EF FNDP 390/3214 0/5 DoubleExponent-PT-010-CTLFireability-00 51966196 t fired, 5328109 attempts, .
57 EF STEQ 390/3214 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 159/3214 0/5 DoubleExponent-PT-010-CTLFireability-14 21377923 t fired, 2191373 attempts, .
70 EF STEQ 95/1562 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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56 EF FNDP 395/3209 0/5 DoubleExponent-PT-010-CTLFireability-00 52635244 t fired, 5396908 attempts, .
57 EF STEQ 395/3209 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 164/3209 0/5 DoubleExponent-PT-010-CTLFireability-14 22059362 t fired, 2261158 attempts, .
70 EF STEQ 100/1557 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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56 EF FNDP 400/3204 0/5 DoubleExponent-PT-010-CTLFireability-00 53302578 t fired, 5465322 attempts, .
57 EF STEQ 400/3204 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 169/3204 0/5 DoubleExponent-PT-010-CTLFireability-14 22740972 t fired, 2331002 attempts, .
70 EF STEQ 105/1552 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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56 EF FNDP 405/3199 0/5 DoubleExponent-PT-010-CTLFireability-00 53969754 t fired, 5533815 attempts, .
57 EF STEQ 405/3199 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 174/3199 0/5 DoubleExponent-PT-010-CTLFireability-14 23422400 t fired, 2400848 attempts, .
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56 EF FNDP 410/3194 0/5 DoubleExponent-PT-010-CTLFireability-00 54636332 t fired, 5602091 attempts, .
57 EF STEQ 410/3194 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 179/3194 0/5 DoubleExponent-PT-010-CTLFireability-14 24102795 t fired, 2470250 attempts, .
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56 EF FNDP 415/3189 0/5 DoubleExponent-PT-010-CTLFireability-00 55316663 t fired, 5671767 attempts, .
57 EF STEQ 415/3189 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 184/3189 0/5 DoubleExponent-PT-010-CTLFireability-14 24783651 t fired, 2539898 attempts, .
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DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 420/3184 0/5 DoubleExponent-PT-010-CTLFireability-00 55982309 t fired, 5739934 attempts, .
57 EF STEQ 420/3184 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 189/3184 0/5 DoubleExponent-PT-010-CTLFireability-14 25463641 t fired, 2609600 attempts, .
70 EF STEQ 125/1532 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-05: EF true state space
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56 EF FNDP 425/3179 0/5 DoubleExponent-PT-010-CTLFireability-00 56648463 t fired, 5808221 attempts, .
57 EF STEQ 425/3179 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 194/3179 0/5 DoubleExponent-PT-010-CTLFireability-14 26144592 t fired, 2679460 attempts, .
70 EF STEQ 130/1527 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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56 EF FNDP 430/3174 0/5 DoubleExponent-PT-010-CTLFireability-00 57313320 t fired, 5876519 attempts, .
57 EF STEQ 430/3174 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 199/3174 0/5 DoubleExponent-PT-010-CTLFireability-14 26826192 t fired, 2749505 attempts, .
70 EF STEQ 135/1522 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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56 EF FNDP 435/3169 0/5 DoubleExponent-PT-010-CTLFireability-00 57975169 t fired, 5944257 attempts, .
57 EF STEQ 435/3169 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 204/3169 0/5 DoubleExponent-PT-010-CTLFireability-14 27507175 t fired, 2819048 attempts, .
70 EF STEQ 140/1517 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-05: EF true state space
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DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
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56 EF FNDP 440/3164 0/5 DoubleExponent-PT-010-CTLFireability-00 58637611 t fired, 6012015 attempts, .
57 EF STEQ 440/3164 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 209/3164 0/5 DoubleExponent-PT-010-CTLFireability-14 28188998 t fired, 2889190 attempts, .
70 EF STEQ 145/1512 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-05: EF true state space
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DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
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56 EF FNDP 445/3159 0/5 DoubleExponent-PT-010-CTLFireability-00 59317554 t fired, 6081647 attempts, .
57 EF STEQ 445/3159 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 214/3159 0/5 DoubleExponent-PT-010-CTLFireability-14 28869992 t fired, 2959110 attempts, .
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DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
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DoubleExponent-PT-010-CTLFireability-14: EF 0 1 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 450/3154 0/5 DoubleExponent-PT-010-CTLFireability-00 59982653 t fired, 6149757 attempts, .
57 EF STEQ 450/3154 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 219/3154 0/5 DoubleExponent-PT-010-CTLFireability-14 29551206 t fired, 3028943 attempts, .
70 EF STEQ 155/1502 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
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56 EF FNDP 455/3149 0/5 DoubleExponent-PT-010-CTLFireability-00 60645259 t fired, 6217784 attempts, .
57 EF STEQ 455/3149 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 224/3149 0/5 DoubleExponent-PT-010-CTLFireability-14 30232946 t fired, 3098784 attempts, .
70 EF STEQ 160/1497 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
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56 EF FNDP 460/3144 0/5 DoubleExponent-PT-010-CTLFireability-00 61311296 t fired, 6286011 attempts, .
57 EF STEQ 460/3144 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 229/3144 0/5 DoubleExponent-PT-010-CTLFireability-14 30914448 t fired, 3168668 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-05: EF true state space
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DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
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56 EF FNDP 465/3139 0/5 DoubleExponent-PT-010-CTLFireability-00 61975863 t fired, 6353866 attempts, .
57 EF STEQ 465/3139 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 234/3139 0/5 DoubleExponent-PT-010-CTLFireability-14 31595506 t fired, 3238293 attempts, .
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56 EF FNDP 470/3134 0/5 DoubleExponent-PT-010-CTLFireability-00 62640110 t fired, 6422195 attempts, .
57 EF STEQ 470/3134 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 239/3134 0/5 DoubleExponent-PT-010-CTLFireability-14 32276509 t fired, 3308131 attempts, .
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56 EF FNDP 475/3129 0/5 DoubleExponent-PT-010-CTLFireability-00 63315185 t fired, 6491462 attempts, .
57 EF STEQ 475/3129 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 244/3129 0/5 DoubleExponent-PT-010-CTLFireability-14 32954820 t fired, 3377820 attempts, .
70 EF STEQ 180/1477 0/5 DoubleExponent-PT-010-CTLFireability-14 sara is running.
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lola: FINISHED task # 70 (type EQUN) for DoubleExponent-PT-010-CTLFireability-14
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
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DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
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56 EF FNDP 480/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 63990204 t fired, 6560618 attempts, .
57 EF STEQ 480/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 485/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 64666333 t fired, 6629974 attempts, .
57 EF STEQ 485/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 490/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 495/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 500/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 505/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 510/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 515/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 550/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 73535308 t fired, 7539383 attempts, .
57 EF STEQ 550/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 319/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 43430780 t fired, 4451849 attempts, .
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56 EF FNDP 555/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 74235091 t fired, 7611151 attempts, .
57 EF STEQ 555/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 560/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 74935077 t fired, 7682922 attempts, .
57 EF STEQ 560/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 565/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 75635934 t fired, 7754832 attempts, .
57 EF STEQ 565/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 570/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 575/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 580/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 585/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 590/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 615/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 82633088 t fired, 8472021 attempts, .
57 EF STEQ 615/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 620/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 83334088 t fired, 8543597 attempts, .
57 EF STEQ 620/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 625/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 84035998 t fired, 8615688 attempts, .
57 EF STEQ 625/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 630/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 84734582 t fired, 8686868 attempts, .
57 EF STEQ 630/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 635/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 85438138 t fired, 8758894 attempts, .
57 EF STEQ 635/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 640/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 645/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 650/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 87538454 t fired, 8974461 attempts, .
57 EF STEQ 650/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 655/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 665/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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DoubleExponent-PT-010-CTLFireability-05: EF true state space
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56 EF FNDP 685/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 92459824 t fired, 9478423 attempts, .
57 EF STEQ 685/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 454/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 62609566 t fired, 6416877 attempts, .
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56 EF FNDP 690/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 93165891 t fired, 9550756 attempts, .
57 EF STEQ 690/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 459/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 63314557 t fired, 6489028 attempts, .
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56 EF FNDP 695/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 93871926 t fired, 9622843 attempts, .
57 EF STEQ 695/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 700/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 94577983 t fired, 9695060 attempts, .
57 EF STEQ 700/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 705/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 95283897 t fired, 9767254 attempts, .
57 EF STEQ 705/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 710/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 95990756 t fired, 9839698 attempts, .
57 EF STEQ 710/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 715/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 96697293 t fired, 9912139 attempts, .
57 EF STEQ 715/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 720/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 97403467 t fired, 9984470 attempts, .
57 EF STEQ 720/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 725/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 98109507 t fired, 10056710 attempts, .
57 EF STEQ 725/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 730/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 98816086 t fired, 10129107 attempts, .
57 EF STEQ 730/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 735/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 99522028 t fired, 10201346 attempts, .
57 EF STEQ 735/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 740/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 100228657 t fired, 10273990 attempts, .
57 EF STEQ 740/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 745/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 100935988 t fired, 10346747 attempts, .
57 EF STEQ 745/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 750/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 101643655 t fired, 10419346 attempts, .
57 EF STEQ 750/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 755/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 102350213 t fired, 10491834 attempts, .
57 EF STEQ 755/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 760/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 765/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 770/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 775/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 780/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 785/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 820/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 111527100 t fired, 11432920 attempts, .
57 EF STEQ 820/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 825/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 830/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 835/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 840/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 845/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 850/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 885/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 120707704 t fired, 12374173 attempts, .
57 EF STEQ 885/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 654/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 90803446 t fired, 9307498 attempts, .
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56 EF FNDP 890/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 121413276 t fired, 12446680 attempts, .
57 EF STEQ 890/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 895/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 122119495 t fired, 12518876 attempts, .
57 EF STEQ 895/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 900/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 122824408 t fired, 12591103 attempts, .
57 EF STEQ 900/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 905/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 123530301 t fired, 12663148 attempts, .
57 EF STEQ 905/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 910/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 124236543 t fired, 12735886 attempts, .
57 EF STEQ 910/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 915/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 920/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 125648536 t fired, 12880912 attempts, .
57 EF STEQ 920/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 925/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 126354501 t fired, 12953491 attempts, .
57 EF STEQ 925/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 950/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 129887385 t fired, 13316324 attempts, .
57 EF STEQ 950/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 955/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 960/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 965/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 970/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 975/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 980/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 985/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1020/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 139744117 t fired, 14326922 attempts, .
57 EF STEQ 1020/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1025/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1030/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1035/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1040/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1045/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1050/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1055/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1085/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 148892349 t fired, 15265012 attempts, .
57 EF STEQ 1085/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 854/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 119051961 t fired, 12203267 attempts, .
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56 EF FNDP 1090/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 149597593 t fired, 15337100 attempts, .
57 EF STEQ 1090/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 859/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 119757158 t fired, 12275720 attempts, .
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56 EF FNDP 1095/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 150297706 t fired, 15408769 attempts, .
57 EF STEQ 1095/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1100/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 150997800 t fired, 15480656 attempts, .
57 EF STEQ 1100/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1105/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 151698171 t fired, 15552627 attempts, .
57 EF STEQ 1105/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1110/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 152400081 t fired, 15624672 attempts, .
57 EF STEQ 1110/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1115/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 153100353 t fired, 15696502 attempts, .
57 EF STEQ 1115/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1120/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 153798694 t fired, 15768439 attempts, .
57 EF STEQ 1120/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1125/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 154500141 t fired, 15840740 attempts, .
57 EF STEQ 1125/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1130/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 155201424 t fired, 15912806 attempts, .
57 EF STEQ 1130/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1135/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 155901275 t fired, 15984693 attempts, .
57 EF STEQ 1135/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1140/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1145/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 157301986 t fired, 16128209 attempts, .
57 EF STEQ 1145/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1150/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 158002792 t fired, 16199985 attempts, .
57 EF STEQ 1150/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 919/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 128298057 t fired, 13151226 attempts, .
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56 EF FNDP 1155/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 158704578 t fired, 16272118 attempts, .
57 EF STEQ 1155/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1160/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 159404526 t fired, 16343887 attempts, .
57 EF STEQ 1160/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1165/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 160105021 t fired, 16415754 attempts, .
57 EF STEQ 1165/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1170/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 160808303 t fired, 16488063 attempts, .
57 EF STEQ 1170/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1175/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1180/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1185/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1220/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 167815003 t fired, 17207202 attempts, .
57 EF STEQ 1220/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 989/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 138260896 t fired, 14171970 attempts, .
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56 EF FNDP 1225/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 168518863 t fired, 17279107 attempts, .
57 EF STEQ 1225/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1230/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 169222610 t fired, 17351345 attempts, .
57 EF STEQ 1230/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1235/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 169925215 t fired, 17423347 attempts, .
57 EF STEQ 1235/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1240/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 170628635 t fired, 17495288 attempts, .
57 EF STEQ 1240/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1245/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 171332797 t fired, 17567639 attempts, .
57 EF STEQ 1245/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1250/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 172035585 t fired, 17639537 attempts, .
57 EF STEQ 1250/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1255/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 172739122 t fired, 17711686 attempts, .
57 EF STEQ 1255/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1260/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 173443344 t fired, 17783820 attempts, .
57 EF STEQ 1260/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1265/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 174147019 t fired, 17855981 attempts, .
57 EF STEQ 1265/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1270/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1285/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 176963194 t fired, 18144590 attempts, .
57 EF STEQ 1285/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1290/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 177665506 t fired, 18216536 attempts, .
57 EF STEQ 1290/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1295/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1300/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1305/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1310/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1315/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1320/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1350/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1355/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 186826289 t fired, 19156626 attempts, .
57 EF STEQ 1355/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1360/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 187529596 t fired, 19228621 attempts, .
57 EF STEQ 1360/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1365/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 188234557 t fired, 19300916 attempts, .
57 EF STEQ 1365/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1370/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1375/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1380/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1385/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1420/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 195983879 t fired, 20095353 attempts, .
57 EF STEQ 1420/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 1189/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 166593164 t fired, 17075432 attempts, .
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56 EF FNDP 1425/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 196688965 t fired, 20167567 attempts, .
57 EF STEQ 1425/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1430/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 197393571 t fired, 20239761 attempts, .
57 EF STEQ 1430/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1435/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 198097382 t fired, 20312006 attempts, .
57 EF STEQ 1435/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1440/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1445/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1450/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1455/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 200917282 t fired, 20601028 attempts, .
57 EF STEQ 1455/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1485/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 205139571 t fired, 21033547 attempts, .
57 EF STEQ 1485/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1490/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 205844865 t fired, 21105924 attempts, .
57 EF STEQ 1490/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1495/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 206549961 t fired, 21178117 attempts, .
57 EF STEQ 1495/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1500/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 207256148 t fired, 21250388 attempts, .
57 EF STEQ 1500/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1505/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1510/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1515/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1520/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1525/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1530/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1535/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1550/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 214312924 t fired, 21973987 attempts, .
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56 EF FNDP 1555/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 215017448 t fired, 22046254 attempts, .
57 EF STEQ 1555/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1560/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 215725858 t fired, 22119075 attempts, .
57 EF STEQ 1560/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1565/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1570/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1575/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1580/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1585/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1620/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 224217452 t fired, 22990061 attempts, .
57 EF STEQ 1620/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1625/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 224924691 t fired, 23062506 attempts, .
57 EF STEQ 1625/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1630/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 225631655 t fired, 23135025 attempts, .
57 EF STEQ 1630/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1635/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1640/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1645/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1650/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1655/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1685/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 233334885 t fired, 23925121 attempts, .
57 EF STEQ 1685/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1690/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 234023906 t fired, 23995863 attempts, .
57 EF STEQ 1690/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1695/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1700/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1705/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1710/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1715/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1720/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1750/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1755/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1760/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1765/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1770/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1780/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1785/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1820/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 252039326 t fired, 25843034 attempts, .
57 EF STEQ 1820/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 1589/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 223072946 t fired, 22866589 attempts, .
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56 EF FNDP 1825/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 252732302 t fired, 25914058 attempts, .
57 EF STEQ 1825/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1830/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 253430993 t fired, 25985864 attempts, .
57 EF STEQ 1830/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1835/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 254125167 t fired, 26056878 attempts, .
57 EF STEQ 1835/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1840/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 254823474 t fired, 26128709 attempts, .
57 EF STEQ 1840/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1845/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 255518076 t fired, 26199700 attempts, .
57 EF STEQ 1845/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1850/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 256216118 t fired, 26271336 attempts, .
57 EF STEQ 1850/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1855/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 256862446 t fired, 26337791 attempts, .
57 EF STEQ 1855/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1860/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 257557824 t fired, 26409332 attempts, .
57 EF STEQ 1860/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1865/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 258253642 t fired, 26480557 attempts, .
57 EF STEQ 1865/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1870/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1875/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1885/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 261040757 t fired, 26766130 attempts, .
57 EF STEQ 1885/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1890/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 261731981 t fired, 26836820 attempts, .
57 EF STEQ 1890/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1895/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 262428923 t fired, 26908302 attempts, .
57 EF STEQ 1895/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1900/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 263120818 t fired, 26979294 attempts, .
57 EF STEQ 1900/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1905/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 263817782 t fired, 27050624 attempts, .
57 EF STEQ 1905/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1910/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 264517554 t fired, 27122415 attempts, .
57 EF STEQ 1910/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1915/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 265217891 t fired, 27194117 attempts, .
57 EF STEQ 1915/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1920/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 265916277 t fired, 27265738 attempts, .
57 EF STEQ 1920/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1925/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 266614027 t fired, 27337522 attempts, .
57 EF STEQ 1925/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1930/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 267307540 t fired, 27408559 attempts, .
57 EF STEQ 1930/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1935/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 1940/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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DoubleExponent-PT-010-CTLFireability-05: EF true state space
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56 EF FNDP 1955/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 270794629 t fired, 27766053 attempts, .
57 EF STEQ 1955/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 1724/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 242089312 t fired, 24815683 attempts, .
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56 EF FNDP 1960/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 271490557 t fired, 27837294 attempts, .
57 EF STEQ 1960/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 1729/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 242789759 t fired, 24887581 attempts, .
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56 EF FNDP 1965/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 272190284 t fired, 27909171 attempts, .
57 EF STEQ 1965/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 1734/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 243496341 t fired, 24959921 attempts, .
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56 EF FNDP 1970/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 272892108 t fired, 27980920 attempts, .
57 EF STEQ 1970/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 1739/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 244206849 t fired, 25032647 attempts, .
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56 EF FNDP 1975/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 273601041 t fired, 28053704 attempts, .
57 EF STEQ 1975/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 1744/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 244871625 t fired, 25100902 attempts, .
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56 EF FNDP 1980/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 274311604 t fired, 28126382 attempts, .
57 EF STEQ 1980/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 1749/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 245565963 t fired, 25172109 attempts, .
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56 EF FNDP 1985/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 275025043 t fired, 28199433 attempts, .
57 EF STEQ 1985/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1990/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 275735606 t fired, 28272162 attempts, .
57 EF STEQ 1990/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 1995/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 276445501 t fired, 28344878 attempts, .
57 EF STEQ 1995/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 2000/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 277158997 t fired, 28417917 attempts, .
57 EF STEQ 2000/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 2005/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 277869696 t fired, 28490761 attempts, .
57 EF STEQ 2005/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 2010/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 278580204 t fired, 28563446 attempts, .
57 EF STEQ 2010/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 2015/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 279293824 t fired, 28636572 attempts, .
57 EF STEQ 2015/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 2020/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 280004377 t fired, 28709567 attempts, .
57 EF STEQ 2020/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2025/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2030/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2035/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2040/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2050/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2055/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 2090/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 289984909 t fired, 29733133 attempts, .
57 EF STEQ 2090/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2095/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2100/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2105/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2115/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 2155/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 299188590 t fired, 30676322 attempts, .
57 EF STEQ 2155/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 1924/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 269911353 t fired, 27670257 attempts, .
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56 EF FNDP 2160/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 299892987 t fired, 30748634 attempts, .
57 EF STEQ 2160/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2165/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2170/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2175/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2180/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2185/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2190/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 2220/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 308242597 t fired, 31604726 attempts, .
57 EF STEQ 2220/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 1989/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 278914335 t fired, 28592862 attempts, .
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56 EF FNDP 2225/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 308753901 t fired, 31657174 attempts, .
57 EF STEQ 2225/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 2230/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 309452539 t fired, 31728763 attempts, .
57 EF STEQ 2230/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2235/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2240/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2245/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2250/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2255/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2260/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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56 EF FNDP 2290/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 317883049 t fired, 32592318 attempts, .
57 EF STEQ 2290/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2295/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2300/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2305/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2315/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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57 EF STEQ 2320/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
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DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 0 1 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 2355/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 327003810 t fired, 33527246 attempts, .
57 EF STEQ 2355/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 2124/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 297628707 t fired, 30510370 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 0 1 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 2360/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 327707783 t fired, 33599303 attempts, .
57 EF STEQ 2360/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 2129/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 298327499 t fired, 30582157 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 0 1 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 2365/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 328410046 t fired, 33671396 attempts, .
57 EF STEQ 2365/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 2134/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 299025872 t fired, 30653748 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 0 1 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 2370/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 329112459 t fired, 33743363 attempts, .
57 EF STEQ 2370/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 2139/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 299729390 t fired, 30725822 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 0 1 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 2375/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 329815286 t fired, 33815611 attempts, .
57 EF STEQ 2375/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 2144/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 300434652 t fired, 30798180 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
DoubleExponent-PT-010-CTLFireability-08: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-09: AFAG false CTL model checker
DoubleExponent-PT-010-CTLFireability-10: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-12: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleExponent-PT-010-CTLFireability-00: DISJ 0 0 2 0 3 0 2 0
DoubleExponent-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-11: SP ECTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DoubleExponent-PT-010-CTLFireability-14: EF 0 0 1 0 3 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 2380/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 330513153 t fired, 33886979 attempts, .
57 EF STEQ 2380/3599 0/5 DoubleExponent-PT-010-CTLFireability-00 sara is running.
65 EF FNDP 2149/3368 0/5 DoubleExponent-PT-010-CTLFireability-14 301138785 t fired, 30870441 attempts, .
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DoubleExponent-PT-010-CTLFireability-03: CTL true CTL model checker
DoubleExponent-PT-010-CTLFireability-04: CTL false CTL model checker
DoubleExponent-PT-010-CTLFireability-05: EF true state space
DoubleExponent-PT-010-CTLFireability-06: CONJ false state space
DoubleExponent-PT-010-CTLFireability-07: INITIAL true preprocessing
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DoubleExponent-PT-010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is DoubleExponent-PT-010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r134-smll-167819412800474"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DoubleExponent-PT-010.tgz
mv DoubleExponent-PT-010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;