Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r103-tall-167814479000986.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DNAwalker-PT-15ringRRLarge, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814479000986
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 556K
-rw-r--r-- 1 mcc users 6.5K Feb 25 13:02 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K Feb 25 13:02 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Feb 25 13:02 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 25 13:02 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:55 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 15:55 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 15:55 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:55 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.8K Feb 25 13:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 89K Feb 25 13:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.2K Feb 25 13:03 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 75K Feb 25 13:03 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:55 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:55 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 14 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 135K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DNAwalker-PT-15ringRRLarge-CTLFireability-00
FORMULA_NAME DNAwalker-PT-15ringRRLarge-CTLFireability-01
FORMULA_NAME DNAwalker-PT-15ringRRLarge-CTLFireability-02
FORMULA_NAME DNAwalker-PT-15ringRRLarge-CTLFireability-03
FORMULA_NAME DNAwalker-PT-15ringRRLarge-CTLFireability-04
FORMULA_NAME DNAwalker-PT-15ringRRLarge-CTLFireability-05
FORMULA_NAME DNAwalker-PT-15ringRRLarge-CTLFireability-06
FORMULA_NAME DNAwalker-PT-15ringRRLarge-CTLFireability-07
FORMULA_NAME DNAwalker-PT-15ringRRLarge-CTLFireability-08
FORMULA_NAME DNAwalker-PT-15ringRRLarge-CTLFireability-09
FORMULA_NAME DNAwalker-PT-15ringRRLarge-CTLFireability-10
FORMULA_NAME DNAwalker-PT-15ringRRLarge-CTLFireability-11
FORMULA_NAME DNAwalker-PT-15ringRRLarge-CTLFireability-12
FORMULA_NAME DNAwalker-PT-15ringRRLarge-CTLFireability-13
FORMULA_NAME DNAwalker-PT-15ringRRLarge-CTLFireability-14
FORMULA_NAME DNAwalker-PT-15ringRRLarge-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678303480919

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DNAwalker-PT-15ringRRLarge
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 19:24:42] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 19:24:42] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 19:24:42] [INFO ] Load time of PNML (sax parser for PT used): 54 ms
[2023-03-08 19:24:42] [INFO ] Transformed 33 places.
[2023-03-08 19:24:42] [INFO ] Transformed 312 transitions.
[2023-03-08 19:24:42] [INFO ] Parsed PT model containing 33 places and 312 transitions and 916 arcs in 111 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 8 ms.
Support contains 30 out of 33 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 312/312 transitions.
Applied a total of 0 rules in 11 ms. Remains 33 /33 variables (removed 0) and now considering 312/312 (removed 0) transitions.
[2023-03-08 19:24:42] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
// Phase 1: matrix 311 rows 33 cols
[2023-03-08 19:24:42] [INFO ] Computed 0 place invariants in 18 ms
[2023-03-08 19:24:42] [INFO ] Dead Transitions using invariants and state equation in 298 ms found 0 transitions.
[2023-03-08 19:24:42] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
[2023-03-08 19:24:42] [INFO ] Invariant cache hit.
[2023-03-08 19:24:42] [INFO ] Implicit Places using invariants in 23 ms returned []
[2023-03-08 19:24:42] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
[2023-03-08 19:24:42] [INFO ] Invariant cache hit.
[2023-03-08 19:24:43] [INFO ] State equation strengthened by 71 read => feed constraints.
[2023-03-08 19:24:43] [INFO ] Implicit Places using invariants and state equation in 267 ms returned []
Implicit Place search using SMT with State Equation took 294 ms to find 0 implicit places.
[2023-03-08 19:24:43] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
[2023-03-08 19:24:43] [INFO ] Invariant cache hit.
[2023-03-08 19:24:43] [INFO ] Dead Transitions using invariants and state equation in 187 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 815 ms. Remains : 33/33 places, 312/312 transitions.
Support contains 30 out of 33 places after structural reductions.
[2023-03-08 19:24:43] [INFO ] Flatten gal took : 37 ms
[2023-03-08 19:24:43] [INFO ] Flatten gal took : 17 ms
[2023-03-08 19:24:43] [INFO ] Input system was already deterministic with 312 transitions.
Incomplete random walk after 10000 steps, including 783 resets, run finished after 447 ms. (steps per millisecond=22 ) properties (out of 76) seen :61
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1000 steps, including 4 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 15) seen :0
Running SMT prover for 15 properties.
[2023-03-08 19:24:44] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
[2023-03-08 19:24:44] [INFO ] Invariant cache hit.
[2023-03-08 19:24:44] [INFO ] After 77ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:15
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Broken pipe ...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.checkResults(DeadlockTester.java:797)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:631)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-08 19:25:09] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-08 19:25:09] [INFO ] After 25020ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:15
Fused 15 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 15 out of 33 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 33/33 places, 312/312 transitions.
Drop transitions removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 0 with 7 rules applied. Total rules applied 7 place count 33 transition count 305
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 1 with 2 rules applied. Total rules applied 9 place count 31 transition count 303
Applied a total of 9 rules in 32 ms. Remains 31 /33 variables (removed 2) and now considering 303/312 (removed 9) transitions.
// Phase 1: matrix 303 rows 31 cols
[2023-03-08 19:25:09] [INFO ] Computed 0 place invariants in 5 ms
[2023-03-08 19:25:09] [INFO ] Dead Transitions using invariants and state equation in 120 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 153 ms. Remains : 31/33 places, 303/312 transitions.
Incomplete random walk after 10000 steps, including 869 resets, run finished after 208 ms. (steps per millisecond=48 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 57 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 60 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 55 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 3) seen :0
Interrupted probabilistic random walk after 1111522 steps, run timeout after 3001 ms. (steps per millisecond=370 ) properties seen :{}
Probabilistic random walk after 1111522 steps, saw 200927 distinct states, run finished after 3002 ms. (steps per millisecond=370 ) properties seen :0
Running SMT prover for 3 properties.
[2023-03-08 19:25:12] [INFO ] Invariant cache hit.
[2023-03-08 19:25:13] [INFO ] After 163ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-08 19:25:14] [INFO ] After 1441ms SMT Verify possible using all constraints in natural domain returned unsat :3 sat :0
Fused 3 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 15 atomic propositions for a total of 16 simplifications.
FORMULA DNAwalker-PT-15ringRRLarge-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DNAwalker-PT-15ringRRLarge-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-08 19:25:14] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-08 19:25:14] [INFO ] Flatten gal took : 12 ms
FORMULA DNAwalker-PT-15ringRRLarge-CTLFireability-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-08 19:25:14] [INFO ] Flatten gal took : 12 ms
[2023-03-08 19:25:14] [INFO ] Input system was already deterministic with 312 transitions.
Support contains 28 out of 33 places (down from 30) after GAL structural reductions.
Computed a total of 33 stabilizing places and 310 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 33/33 places, 312/312 transitions.
Applied a total of 0 rules in 19 ms. Remains 33 /33 variables (removed 0) and now considering 312/312 (removed 0) transitions.
[2023-03-08 19:25:14] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
// Phase 1: matrix 311 rows 33 cols
[2023-03-08 19:25:14] [INFO ] Computed 0 place invariants in 4 ms
[2023-03-08 19:25:14] [INFO ] Dead Transitions using invariants and state equation in 143 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 166 ms. Remains : 33/33 places, 312/312 transitions.
[2023-03-08 19:25:14] [INFO ] Flatten gal took : 9 ms
[2023-03-08 19:25:14] [INFO ] Flatten gal took : 24 ms
[2023-03-08 19:25:14] [INFO ] Input system was already deterministic with 312 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 33/33 places, 312/312 transitions.
Applied a total of 0 rules in 8 ms. Remains 33 /33 variables (removed 0) and now considering 312/312 (removed 0) transitions.
[2023-03-08 19:25:14] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
[2023-03-08 19:25:14] [INFO ] Invariant cache hit.
[2023-03-08 19:25:14] [INFO ] Dead Transitions using invariants and state equation in 138 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 147 ms. Remains : 33/33 places, 312/312 transitions.
[2023-03-08 19:25:14] [INFO ] Flatten gal took : 10 ms
[2023-03-08 19:25:14] [INFO ] Flatten gal took : 10 ms
[2023-03-08 19:25:15] [INFO ] Input system was already deterministic with 312 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 312/312 transitions.
Applied a total of 0 rules in 2 ms. Remains 33 /33 variables (removed 0) and now considering 312/312 (removed 0) transitions.
[2023-03-08 19:25:15] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
[2023-03-08 19:25:15] [INFO ] Invariant cache hit.
[2023-03-08 19:25:15] [INFO ] Dead Transitions using invariants and state equation in 132 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 135 ms. Remains : 33/33 places, 312/312 transitions.
[2023-03-08 19:25:15] [INFO ] Flatten gal took : 8 ms
[2023-03-08 19:25:15] [INFO ] Flatten gal took : 9 ms
[2023-03-08 19:25:15] [INFO ] Input system was already deterministic with 312 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 33/33 places, 312/312 transitions.
Applied a total of 0 rules in 6 ms. Remains 33 /33 variables (removed 0) and now considering 312/312 (removed 0) transitions.
[2023-03-08 19:25:15] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
[2023-03-08 19:25:15] [INFO ] Invariant cache hit.
[2023-03-08 19:25:15] [INFO ] Dead Transitions using invariants and state equation in 173 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 180 ms. Remains : 33/33 places, 312/312 transitions.
[2023-03-08 19:25:15] [INFO ] Flatten gal took : 8 ms
[2023-03-08 19:25:15] [INFO ] Flatten gal took : 8 ms
[2023-03-08 19:25:15] [INFO ] Input system was already deterministic with 312 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 312/312 transitions.
Applied a total of 0 rules in 2 ms. Remains 33 /33 variables (removed 0) and now considering 312/312 (removed 0) transitions.
[2023-03-08 19:25:15] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
[2023-03-08 19:25:15] [INFO ] Invariant cache hit.
[2023-03-08 19:25:15] [INFO ] Dead Transitions using invariants and state equation in 79 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 82 ms. Remains : 33/33 places, 312/312 transitions.
[2023-03-08 19:25:15] [INFO ] Flatten gal took : 6 ms
[2023-03-08 19:25:15] [INFO ] Flatten gal took : 7 ms
[2023-03-08 19:25:15] [INFO ] Input system was already deterministic with 312 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 312/312 transitions.
Applied a total of 0 rules in 2 ms. Remains 33 /33 variables (removed 0) and now considering 312/312 (removed 0) transitions.
[2023-03-08 19:25:15] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
[2023-03-08 19:25:15] [INFO ] Invariant cache hit.
[2023-03-08 19:25:15] [INFO ] Dead Transitions using invariants and state equation in 85 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 87 ms. Remains : 33/33 places, 312/312 transitions.
[2023-03-08 19:25:15] [INFO ] Flatten gal took : 13 ms
[2023-03-08 19:25:15] [INFO ] Flatten gal took : 13 ms
[2023-03-08 19:25:15] [INFO ] Input system was already deterministic with 312 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 312/312 transitions.
Applied a total of 0 rules in 1 ms. Remains 33 /33 variables (removed 0) and now considering 312/312 (removed 0) transitions.
[2023-03-08 19:25:15] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
[2023-03-08 19:25:15] [INFO ] Invariant cache hit.
[2023-03-08 19:25:15] [INFO ] Dead Transitions using invariants and state equation in 88 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 89 ms. Remains : 33/33 places, 312/312 transitions.
[2023-03-08 19:25:15] [INFO ] Flatten gal took : 6 ms
[2023-03-08 19:25:15] [INFO ] Flatten gal took : 7 ms
[2023-03-08 19:25:15] [INFO ] Input system was already deterministic with 312 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 312/312 transitions.
Applied a total of 0 rules in 1 ms. Remains 33 /33 variables (removed 0) and now considering 312/312 (removed 0) transitions.
[2023-03-08 19:25:15] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
[2023-03-08 19:25:15] [INFO ] Invariant cache hit.
[2023-03-08 19:25:15] [INFO ] Dead Transitions using invariants and state equation in 91 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 93 ms. Remains : 33/33 places, 312/312 transitions.
[2023-03-08 19:25:15] [INFO ] Flatten gal took : 6 ms
[2023-03-08 19:25:15] [INFO ] Flatten gal took : 6 ms
[2023-03-08 19:25:15] [INFO ] Input system was already deterministic with 312 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 312/312 transitions.
Applied a total of 0 rules in 1 ms. Remains 33 /33 variables (removed 0) and now considering 312/312 (removed 0) transitions.
[2023-03-08 19:25:15] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
[2023-03-08 19:25:15] [INFO ] Invariant cache hit.
[2023-03-08 19:25:15] [INFO ] Dead Transitions using invariants and state equation in 94 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 95 ms. Remains : 33/33 places, 312/312 transitions.
[2023-03-08 19:25:15] [INFO ] Flatten gal took : 5 ms
[2023-03-08 19:25:15] [INFO ] Flatten gal took : 6 ms
[2023-03-08 19:25:16] [INFO ] Input system was already deterministic with 312 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 312/312 transitions.
Applied a total of 0 rules in 2 ms. Remains 33 /33 variables (removed 0) and now considering 312/312 (removed 0) transitions.
[2023-03-08 19:25:16] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
[2023-03-08 19:25:16] [INFO ] Invariant cache hit.
[2023-03-08 19:25:16] [INFO ] Dead Transitions using invariants and state equation in 84 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 87 ms. Remains : 33/33 places, 312/312 transitions.
[2023-03-08 19:25:16] [INFO ] Flatten gal took : 6 ms
[2023-03-08 19:25:16] [INFO ] Flatten gal took : 7 ms
[2023-03-08 19:25:16] [INFO ] Input system was already deterministic with 312 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 33/33 places, 312/312 transitions.
Applied a total of 0 rules in 5 ms. Remains 33 /33 variables (removed 0) and now considering 312/312 (removed 0) transitions.
[2023-03-08 19:25:16] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
[2023-03-08 19:25:16] [INFO ] Invariant cache hit.
[2023-03-08 19:25:16] [INFO ] Dead Transitions using invariants and state equation in 86 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 93 ms. Remains : 33/33 places, 312/312 transitions.
[2023-03-08 19:25:16] [INFO ] Flatten gal took : 5 ms
[2023-03-08 19:25:16] [INFO ] Flatten gal took : 6 ms
[2023-03-08 19:25:16] [INFO ] Input system was already deterministic with 312 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 312/312 transitions.
Applied a total of 0 rules in 2 ms. Remains 33 /33 variables (removed 0) and now considering 312/312 (removed 0) transitions.
[2023-03-08 19:25:16] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
[2023-03-08 19:25:16] [INFO ] Invariant cache hit.
[2023-03-08 19:25:16] [INFO ] Dead Transitions using invariants and state equation in 86 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 89 ms. Remains : 33/33 places, 312/312 transitions.
[2023-03-08 19:25:16] [INFO ] Flatten gal took : 6 ms
[2023-03-08 19:25:16] [INFO ] Flatten gal took : 6 ms
[2023-03-08 19:25:16] [INFO ] Input system was already deterministic with 312 transitions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 312/312 transitions.
Applied a total of 0 rules in 1 ms. Remains 33 /33 variables (removed 0) and now considering 312/312 (removed 0) transitions.
[2023-03-08 19:25:16] [INFO ] Flow matrix only has 311 transitions (discarded 1 similar events)
[2023-03-08 19:25:16] [INFO ] Invariant cache hit.
[2023-03-08 19:25:16] [INFO ] Dead Transitions using invariants and state equation in 90 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 93 ms. Remains : 33/33 places, 312/312 transitions.
[2023-03-08 19:25:16] [INFO ] Flatten gal took : 6 ms
[2023-03-08 19:25:16] [INFO ] Flatten gal took : 6 ms
[2023-03-08 19:25:16] [INFO ] Input system was already deterministic with 312 transitions.
[2023-03-08 19:25:16] [INFO ] Flatten gal took : 7 ms
[2023-03-08 19:25:16] [INFO ] Flatten gal took : 7 ms
[2023-03-08 19:25:16] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-08 19:25:16] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 33 places, 312 transitions and 916 arcs took 2 ms.
Total runtime 34226 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DNAwalker-PT-15ringRRLarge
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA DNAwalker-PT-15ringRRLarge-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DNAwalker-PT-15ringRRLarge-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DNAwalker-PT-15ringRRLarge-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DNAwalker-PT-15ringRRLarge-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DNAwalker-PT-15ringRRLarge-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DNAwalker-PT-15ringRRLarge-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DNAwalker-PT-15ringRRLarge-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678303812790

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 10 (type EXCL) for 9 DNAwalker-PT-15ringRRLarge-CTLFireability-03
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 10 (type EXCL) for DNAwalker-PT-15ringRRLarge-CTLFireability-03
lola: result : false
lola: markings : 13
lola: fired transitions : 26
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 DNAwalker-PT-15ringRRLarge-CTLFireability-04
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 13 (type EXCL) for DNAwalker-PT-15ringRRLarge-CTLFireability-04
lola: result : false
lola: markings : 773
lola: fired transitions : 3706
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: LAUNCH task # 34 (type EXCL) for 33 DNAwalker-PT-15ringRRLarge-CTLFireability-12
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DNAwalker-PT-15ringRRLarge-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-04: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DNAwalker-PT-15ringRRLarge-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-01: EG 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-11: F 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 5/327 7/32 DNAwalker-PT-15ringRRLarge-CTLFireability-12 1508307 m, 301661 m/sec, 7045871 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-04: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DNAwalker-PT-15ringRRLarge-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-01: EG 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-11: F 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 10/327 12/32 DNAwalker-PT-15ringRRLarge-CTLFireability-12 2896071 m, 277552 m/sec, 13929317 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-04: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DNAwalker-PT-15ringRRLarge-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-01: EG 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-11: F 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 15/327 18/32 DNAwalker-PT-15ringRRLarge-CTLFireability-12 4285968 m, 277979 m/sec, 20996994 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-04: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DNAwalker-PT-15ringRRLarge-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-01: EG 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-11: F 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 20/327 23/32 DNAwalker-PT-15ringRRLarge-CTLFireability-12 5622425 m, 267291 m/sec, 27752308 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-04: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DNAwalker-PT-15ringRRLarge-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-01: EG 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-11: F 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 25/327 29/32 DNAwalker-PT-15ringRRLarge-CTLFireability-12 6876095 m, 250734 m/sec, 34298355 t fired, .

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lola: CANCELED task # 34 (type EXCL) for DNAwalker-PT-15ringRRLarge-CTLFireability-12 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DNAwalker-PT-15ringRRLarge-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-04: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DNAwalker-PT-15ringRRLarge-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-01: EG 0 1 0 0 1 0 0 0
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DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 15/438 9/32 DNAwalker-PT-15ringRRLarge-CTLFireability-08 2089663 m, 131787 m/sec, 14043350 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 20/438 12/32 DNAwalker-PT-15ringRRLarge-CTLFireability-08 2735934 m, 129254 m/sec, 18539406 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 25/438 14/32 DNAwalker-PT-15ringRRLarge-CTLFireability-08 3363761 m, 125565 m/sec, 23008904 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 30/438 17/32 DNAwalker-PT-15ringRRLarge-CTLFireability-08 3998711 m, 126990 m/sec, 27520805 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 35/438 20/32 DNAwalker-PT-15ringRRLarge-CTLFireability-08 4663670 m, 132991 m/sec, 32143326 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 40/438 22/32 DNAwalker-PT-15ringRRLarge-CTLFireability-08 5294271 m, 126120 m/sec, 36571415 t fired, .

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25 CTL EXCL 45/438 25/32 DNAwalker-PT-15ringRRLarge-CTLFireability-08 5933811 m, 127908 m/sec, 41131917 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 50/438 27/32 DNAwalker-PT-15ringRRLarge-CTLFireability-08 6550970 m, 123431 m/sec, 45585209 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 55/438 30/32 DNAwalker-PT-15ringRRLarge-CTLFireability-08 7149070 m, 119620 m/sec, 49975701 t fired, .

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25 CTL EXCL 60/438 32/32 DNAwalker-PT-15ringRRLarge-CTLFireability-08 7753293 m, 120844 m/sec, 54401382 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-11: F 0 1 0 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 25/574 10/32 DNAwalker-PT-15ringRRLarge-CTLFireability-06 2357755 m, 90935 m/sec, 8838437 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 30/574 12/32 DNAwalker-PT-15ringRRLarge-CTLFireability-06 2797423 m, 87933 m/sec, 10569524 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 35/574 13/32 DNAwalker-PT-15ringRRLarge-CTLFireability-06 3175011 m, 75517 m/sec, 12174069 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 40/574 15/32 DNAwalker-PT-15ringRRLarge-CTLFireability-06 3583725 m, 81742 m/sec, 13838025 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 45/574 17/32 DNAwalker-PT-15ringRRLarge-CTLFireability-06 3983355 m, 79926 m/sec, 15463846 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 50/574 19/32 DNAwalker-PT-15ringRRLarge-CTLFireability-06 4414114 m, 86151 m/sec, 17149478 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 55/574 20/32 DNAwalker-PT-15ringRRLarge-CTLFireability-06 4820856 m, 81348 m/sec, 18760609 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 60/574 22/32 DNAwalker-PT-15ringRRLarge-CTLFireability-06 5238143 m, 83457 m/sec, 20449807 t fired, .

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DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 65/574 24/32 DNAwalker-PT-15ringRRLarge-CTLFireability-06 5659112 m, 84193 m/sec, 22209705 t fired, .

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19 CTL EXCL 70/574 25/32 DNAwalker-PT-15ringRRLarge-CTLFireability-06 6056861 m, 79549 m/sec, 23812508 t fired, .

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19 CTL EXCL 75/574 27/32 DNAwalker-PT-15ringRRLarge-CTLFireability-06 6404073 m, 69442 m/sec, 25299924 t fired, .

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19 CTL EXCL 80/574 28/32 DNAwalker-PT-15ringRRLarge-CTLFireability-06 6778662 m, 74917 m/sec, 26852281 t fired, .

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lola: FINISHED task # 7 (type EXCL) for DNAwalker-PT-15ringRRLarge-CTLFireability-02
lola: result : false
lola: markings : 169
lola: fired transitions : 198
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 DNAwalker-PT-15ringRRLarge-CTLFireability-01
lola: time limit : 1116 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for DNAwalker-PT-15ringRRLarge-CTLFireability-01
lola: result : true
lola: markings : 11
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 30 DNAwalker-PT-15ringRRLarge-CTLFireability-11
lola: time limit : 1675 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for DNAwalker-PT-15ringRRLarge-CTLFireability-11
lola: result : true
lola: markings : 9
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 DNAwalker-PT-15ringRRLarge-CTLFireability-00
lola: time limit : 3350 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DNAwalker-PT-15ringRRLarge-CTLFireability-01: EG true state space / EG
DNAwalker-PT-15ringRRLarge-CTLFireability-02: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-04: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-05: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-07: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-11: F false state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DNAwalker-PT-15ringRRLarge-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/3350 4/32 DNAwalker-PT-15ringRRLarge-CTLFireability-00 961599 m, 192319 m/sec, 6366865 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DNAwalker-PT-15ringRRLarge-CTLFireability-01: EG true state space / EG
DNAwalker-PT-15ringRRLarge-CTLFireability-02: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-04: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-05: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-07: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-11: F false state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DNAwalker-PT-15ringRRLarge-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/3350 8/32 DNAwalker-PT-15ringRRLarge-CTLFireability-00 1883696 m, 184419 m/sec, 12677575 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DNAwalker-PT-15ringRRLarge-CTLFireability-01: EG true state space / EG
DNAwalker-PT-15ringRRLarge-CTLFireability-02: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-04: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-05: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-07: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-11: F false state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DNAwalker-PT-15ringRRLarge-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 15/3350 12/32 DNAwalker-PT-15ringRRLarge-CTLFireability-00 2782358 m, 179732 m/sec, 18895828 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DNAwalker-PT-15ringRRLarge-CTLFireability-01: EG true state space / EG
DNAwalker-PT-15ringRRLarge-CTLFireability-02: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-04: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-05: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-07: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-11: F false state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DNAwalker-PT-15ringRRLarge-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/3350 15/32 DNAwalker-PT-15ringRRLarge-CTLFireability-00 3618766 m, 167281 m/sec, 25042908 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DNAwalker-PT-15ringRRLarge-CTLFireability-01: EG true state space / EG
DNAwalker-PT-15ringRRLarge-CTLFireability-02: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-04: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-05: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-07: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-11: F false state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DNAwalker-PT-15ringRRLarge-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 25/3350 19/32 DNAwalker-PT-15ringRRLarge-CTLFireability-00 4506092 m, 177465 m/sec, 31310706 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DNAwalker-PT-15ringRRLarge-CTLFireability-01: EG true state space / EG
DNAwalker-PT-15ringRRLarge-CTLFireability-02: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-04: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-05: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-07: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-11: F false state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DNAwalker-PT-15ringRRLarge-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 30/3350 22/32 DNAwalker-PT-15ringRRLarge-CTLFireability-00 5374132 m, 173608 m/sec, 37462707 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DNAwalker-PT-15ringRRLarge-CTLFireability-01: EG true state space / EG
DNAwalker-PT-15ringRRLarge-CTLFireability-02: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-04: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-05: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-07: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-11: F false state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DNAwalker-PT-15ringRRLarge-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 35/3350 26/32 DNAwalker-PT-15ringRRLarge-CTLFireability-00 6229885 m, 171150 m/sec, 43630662 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DNAwalker-PT-15ringRRLarge-CTLFireability-01: EG true state space / EG
DNAwalker-PT-15ringRRLarge-CTLFireability-02: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-04: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-05: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-07: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-11: F false state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DNAwalker-PT-15ringRRLarge-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
DNAwalker-PT-15ringRRLarge-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 40/3350 29/32 DNAwalker-PT-15ringRRLarge-CTLFireability-00 7055068 m, 165036 m/sec, 49695555 t fired, .

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lola: CANCELED task # 1 (type EXCL) for DNAwalker-PT-15ringRRLarge-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DNAwalker-PT-15ringRRLarge-CTLFireability-01: EG true state space / EG
DNAwalker-PT-15ringRRLarge-CTLFireability-02: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-04: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-05: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-07: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-11: F false state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DNAwalker-PT-15ringRRLarge-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DNAwalker-PT-15ringRRLarge-CTLFireability-00: CTL unknown AGGR
DNAwalker-PT-15ringRRLarge-CTLFireability-01: EG true state space / EG
DNAwalker-PT-15ringRRLarge-CTLFireability-02: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-04: CTL false CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-05: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-06: CTL unknown AGGR
DNAwalker-PT-15ringRRLarge-CTLFireability-07: CTL true CTL model checker
DNAwalker-PT-15ringRRLarge-CTLFireability-08: CTL unknown AGGR
DNAwalker-PT-15ringRRLarge-CTLFireability-10: CTL unknown AGGR
DNAwalker-PT-15ringRRLarge-CTLFireability-11: F false state space / EG
DNAwalker-PT-15ringRRLarge-CTLFireability-12: CTL unknown AGGR
DNAwalker-PT-15ringRRLarge-CTLFireability-14: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DNAwalker-PT-15ringRRLarge"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DNAwalker-PT-15ringRRLarge, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814479000986"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DNAwalker-PT-15ringRRLarge.tgz
mv DNAwalker-PT-15ringRRLarge execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;