About the Execution of LoLa+red for DLCshifumi-PT-3b
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2847.724 | 137042.00 | 210828.00 | 558.30 | TTFTTFFFTTTFFFTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478800822.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCshifumi-PT-3b, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478800822
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.6M
-rw-r--r-- 1 mcc users 5.7K Feb 26 08:03 CTLCardinality.txt
-rw-r--r-- 1 mcc users 54K Feb 26 08:03 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Feb 26 08:03 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 26 08:03 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.9K Feb 26 08:04 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 86K Feb 26 08:04 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.8K Feb 26 08:04 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 54K Feb 26 08:04 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 2.3M Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCshifumi-PT-3b-ReachabilityCardinality-00
FORMULA_NAME DLCshifumi-PT-3b-ReachabilityCardinality-01
FORMULA_NAME DLCshifumi-PT-3b-ReachabilityCardinality-02
FORMULA_NAME DLCshifumi-PT-3b-ReachabilityCardinality-03
FORMULA_NAME DLCshifumi-PT-3b-ReachabilityCardinality-04
FORMULA_NAME DLCshifumi-PT-3b-ReachabilityCardinality-05
FORMULA_NAME DLCshifumi-PT-3b-ReachabilityCardinality-06
FORMULA_NAME DLCshifumi-PT-3b-ReachabilityCardinality-07
FORMULA_NAME DLCshifumi-PT-3b-ReachabilityCardinality-08
FORMULA_NAME DLCshifumi-PT-3b-ReachabilityCardinality-09
FORMULA_NAME DLCshifumi-PT-3b-ReachabilityCardinality-10
FORMULA_NAME DLCshifumi-PT-3b-ReachabilityCardinality-11
FORMULA_NAME DLCshifumi-PT-3b-ReachabilityCardinality-12
FORMULA_NAME DLCshifumi-PT-3b-ReachabilityCardinality-13
FORMULA_NAME DLCshifumi-PT-3b-ReachabilityCardinality-14
FORMULA_NAME DLCshifumi-PT-3b-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1678280899000
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCshifumi-PT-3b
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 13:08:20] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-08 13:08:20] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 13:08:20] [INFO ] Load time of PNML (sax parser for PT used): 272 ms
[2023-03-08 13:08:20] [INFO ] Transformed 7058 places.
[2023-03-08 13:08:20] [INFO ] Transformed 9611 transitions.
[2023-03-08 13:08:20] [INFO ] Found NUPN structural information;
[2023-03-08 13:08:21] [INFO ] Parsed PT model containing 7058 places and 9611 transitions and 24573 arcs in 650 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 31 ms.
Working with output stream class java.io.PrintStream
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 514 ms. (steps per millisecond=19 ) properties (out of 12) seen :5
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-14 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-09 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-05 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
// Phase 1: matrix 9611 rows 7058 cols
[2023-03-08 13:08:22] [INFO ] Computed 282 place invariants in 76 ms
[2023-03-08 13:08:24] [INFO ] [Real]Absence check using 282 positive place invariants in 282 ms returned sat
[2023-03-08 13:08:24] [INFO ] After 2236ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:7
[2023-03-08 13:08:26] [INFO ] [Nat]Absence check using 282 positive place invariants in 287 ms returned sat
[2023-03-08 13:08:35] [INFO ] After 8016ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :7
[2023-03-08 13:08:38] [INFO ] Deduced a trap composed of 102 places in 2929 ms of which 11 ms to minimize.
[2023-03-08 13:08:41] [INFO ] Deduced a trap composed of 73 places in 2759 ms of which 4 ms to minimize.
[2023-03-08 13:08:44] [INFO ] Deduced a trap composed of 109 places in 2733 ms of which 8 ms to minimize.
[2023-03-08 13:08:47] [INFO ] Deduced a trap composed of 105 places in 2706 ms of which 4 ms to minimize.
[2023-03-08 13:08:50] [INFO ] Deduced a trap composed of 87 places in 2617 ms of which 3 ms to minimize.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineWithTraps(DeadlockTester.java:1255)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineResultsWithTraps(DeadlockTester.java:736)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:656)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:902)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-08 13:08:50] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-08 13:08:50] [INFO ] After 25689ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:7
Fused 7 Parikh solutions to 6 different solutions.
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-15 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-06 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-12 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 3 properties in 399 ms.
Support contains 36 out of 7058 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 7058/7058 places, 9611/9611 transitions.
Graph (trivial) has 6728 edges and 7058 vertex of which 740 / 7058 are part of one of the 48 SCC in 19 ms
Free SCC test removed 692 places
Drop transitions removed 781 transitions
Reduce isomorphic transitions removed 781 transitions.
Drop transitions removed 3501 transitions
Trivial Post-agglo rules discarded 3501 transitions
Performed 3501 trivial Post agglomeration. Transition count delta: 3501
Iterating post reduction 0 with 3501 rules applied. Total rules applied 3502 place count 6366 transition count 5329
Reduce places removed 3501 places and 0 transitions.
Ensure Unique test removed 125 transitions
Reduce isomorphic transitions removed 125 transitions.
Drop transitions removed 122 transitions
Trivial Post-agglo rules discarded 122 transitions
Performed 122 trivial Post agglomeration. Transition count delta: 122
Iterating post reduction 1 with 3748 rules applied. Total rules applied 7250 place count 2865 transition count 5082
Reduce places removed 122 places and 0 transitions.
Ensure Unique test removed 38 transitions
Reduce isomorphic transitions removed 38 transitions.
Drop transitions removed 38 transitions
Trivial Post-agglo rules discarded 38 transitions
Performed 38 trivial Post agglomeration. Transition count delta: 38
Iterating post reduction 2 with 198 rules applied. Total rules applied 7448 place count 2743 transition count 5006
Reduce places removed 38 places and 0 transitions.
Performed 15 Post agglomeration using F-continuation condition.Transition count delta: 15
Iterating post reduction 3 with 53 rules applied. Total rules applied 7501 place count 2705 transition count 4991
Reduce places removed 15 places and 0 transitions.
Iterating post reduction 4 with 15 rules applied. Total rules applied 7516 place count 2690 transition count 4991
Performed 52 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 52 Pre rules applied. Total rules applied 7516 place count 2690 transition count 4939
Deduced a syphon composed of 52 places in 31 ms
Reduce places removed 52 places and 0 transitions.
Iterating global reduction 5 with 104 rules applied. Total rules applied 7620 place count 2638 transition count 4939
Discarding 725 places :
Symmetric choice reduction at 5 with 725 rule applications. Total rules 8345 place count 1913 transition count 4214
Iterating global reduction 5 with 725 rules applied. Total rules applied 9070 place count 1913 transition count 4214
Performed 269 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 269 Pre rules applied. Total rules applied 9070 place count 1913 transition count 3945
Deduced a syphon composed of 269 places in 24 ms
Reduce places removed 269 places and 0 transitions.
Iterating global reduction 5 with 538 rules applied. Total rules applied 9608 place count 1644 transition count 3945
Discarding 90 places :
Symmetric choice reduction at 5 with 90 rule applications. Total rules 9698 place count 1554 transition count 2915
Iterating global reduction 5 with 90 rules applied. Total rules applied 9788 place count 1554 transition count 2915
Ensure Unique test removed 76 transitions
Reduce isomorphic transitions removed 76 transitions.
Iterating post reduction 5 with 76 rules applied. Total rules applied 9864 place count 1554 transition count 2839
Performed 384 Post agglomeration using F-continuation condition with reduction of 3 identical transitions.
Deduced a syphon composed of 384 places in 2 ms
Reduce places removed 384 places and 0 transitions.
Iterating global reduction 6 with 768 rules applied. Total rules applied 10632 place count 1170 transition count 2452
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 6 with 3 rules applied. Total rules applied 10635 place count 1170 transition count 2449
Discarding 1 places :
Symmetric choice reduction at 7 with 1 rule applications. Total rules 10636 place count 1169 transition count 2408
Iterating global reduction 7 with 1 rules applied. Total rules applied 10637 place count 1169 transition count 2408
Performed 101 Post agglomeration using F-continuation condition with reduction of 84 identical transitions.
Deduced a syphon composed of 101 places in 5 ms
Reduce places removed 101 places and 0 transitions.
Iterating global reduction 7 with 202 rules applied. Total rules applied 10839 place count 1068 transition count 2614
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 7 with 2 rules applied. Total rules applied 10841 place count 1068 transition count 2612
Discarding 27 places :
Symmetric choice reduction at 8 with 27 rule applications. Total rules 10868 place count 1041 transition count 2450
Iterating global reduction 8 with 27 rules applied. Total rules applied 10895 place count 1041 transition count 2450
Ensure Unique test removed 75 transitions
Reduce isomorphic transitions removed 75 transitions.
Iterating post reduction 8 with 75 rules applied. Total rules applied 10970 place count 1041 transition count 2375
Performed 49 Post agglomeration using F-continuation condition with reduction of 18 identical transitions.
Deduced a syphon composed of 49 places in 1 ms
Reduce places removed 49 places and 0 transitions.
Iterating global reduction 9 with 98 rules applied. Total rules applied 11068 place count 992 transition count 2657
Drop transitions removed 53 transitions
Reduce isomorphic transitions removed 53 transitions.
Iterating post reduction 9 with 53 rules applied. Total rules applied 11121 place count 992 transition count 2604
Discarding 6 places :
Symmetric choice reduction at 10 with 6 rule applications. Total rules 11127 place count 986 transition count 2565
Iterating global reduction 10 with 6 rules applied. Total rules applied 11133 place count 986 transition count 2565
Ensure Unique test removed 20 transitions
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 10 with 20 rules applied. Total rules applied 11153 place count 986 transition count 2545
Drop transitions removed 73 transitions
Redundant transition composition rules discarded 73 transitions
Iterating global reduction 11 with 73 rules applied. Total rules applied 11226 place count 986 transition count 2472
Discarding 5 places :
Symmetric choice reduction at 11 with 5 rule applications. Total rules 11231 place count 981 transition count 2467
Iterating global reduction 11 with 5 rules applied. Total rules applied 11236 place count 981 transition count 2467
Discarding 5 places :
Symmetric choice reduction at 11 with 5 rule applications. Total rules 11241 place count 976 transition count 2236
Iterating global reduction 11 with 5 rules applied. Total rules applied 11246 place count 976 transition count 2236
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 11 with 5 rules applied. Total rules applied 11251 place count 976 transition count 2231
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 1 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 12 with 6 rules applied. Total rules applied 11257 place count 973 transition count 2228
Discarding 3 places :
Symmetric choice reduction at 12 with 3 rule applications. Total rules 11260 place count 970 transition count 2091
Iterating global reduction 12 with 3 rules applied. Total rules applied 11263 place count 970 transition count 2091
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 12 with 3 rules applied. Total rules applied 11266 place count 970 transition count 2088
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -5
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 13 with 4 rules applied. Total rules applied 11270 place count 968 transition count 2093
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 13 with 2 rules applied. Total rules applied 11272 place count 968 transition count 2091
Drop transitions removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 14 with 5 rules applied. Total rules applied 11277 place count 968 transition count 2086
Free-agglomeration rule applied 538 times with reduction of 304 identical transitions.
Iterating global reduction 14 with 538 rules applied. Total rules applied 11815 place count 968 transition count 1244
Reduce places removed 538 places and 0 transitions.
Drop transitions removed 590 transitions
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 594 transitions.
Graph (complete) has 1016 edges and 430 vertex of which 255 are kept as prefixes of interest. Removing 175 places using SCC suffix rule.1 ms
Discarding 175 places :
Also discarding 145 output transitions
Drop transitions removed 145 transitions
Iterating post reduction 14 with 1133 rules applied. Total rules applied 12948 place count 255 transition count 505
Drop transitions removed 45 transitions
Ensure Unique test removed 53 transitions
Reduce isomorphic transitions removed 98 transitions.
Iterating post reduction 15 with 98 rules applied. Total rules applied 13046 place count 255 transition count 407
Discarding 54 places :
Symmetric choice reduction at 16 with 54 rule applications. Total rules 13100 place count 201 transition count 328
Iterating global reduction 16 with 54 rules applied. Total rules applied 13154 place count 201 transition count 328
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 16 with 1 rules applied. Total rules applied 13155 place count 201 transition count 327
Drop transitions removed 12 transitions
Redundant transition composition rules discarded 12 transitions
Iterating global reduction 17 with 12 rules applied. Total rules applied 13167 place count 201 transition count 315
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 17 with 2 rules applied. Total rules applied 13169 place count 199 transition count 315
Discarding 2 places :
Symmetric choice reduction at 18 with 2 rule applications. Total rules 13171 place count 197 transition count 313
Iterating global reduction 18 with 2 rules applied. Total rules applied 13173 place count 197 transition count 313
Free-agglomeration rule applied 1 times.
Iterating global reduction 18 with 1 rules applied. Total rules applied 13174 place count 197 transition count 312
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 18 with 1 rules applied. Total rules applied 13175 place count 196 transition count 312
Partial Free-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 19 with 1 rules applied. Total rules applied 13176 place count 196 transition count 312
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 19 with 1 rules applied. Total rules applied 13177 place count 195 transition count 311
Reduce places removed 2 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 19 with 3 rules applied. Total rules applied 13180 place count 193 transition count 310
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 20 with 1 rules applied. Total rules applied 13181 place count 192 transition count 310
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 21 with 1 Pre rules applied. Total rules applied 13181 place count 192 transition count 309
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 21 with 2 rules applied. Total rules applied 13183 place count 191 transition count 309
Performed 12 Post agglomeration using F-continuation condition with reduction of 16 identical transitions.
Deduced a syphon composed of 12 places in 0 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 21 with 24 rules applied. Total rules applied 13207 place count 179 transition count 281
Drop transitions removed 22 transitions
Ensure Unique test removed 27 transitions
Reduce isomorphic transitions removed 49 transitions.
Iterating post reduction 21 with 49 rules applied. Total rules applied 13256 place count 179 transition count 232
Discarding 12 places :
Symmetric choice reduction at 22 with 12 rule applications. Total rules 13268 place count 167 transition count 209
Iterating global reduction 22 with 12 rules applied. Total rules applied 13280 place count 167 transition count 209
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 22 with 6 rules applied. Total rules applied 13286 place count 163 transition count 207
Drop transitions removed 2 transitions
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 22 with 5 rules applied. Total rules applied 13291 place count 163 transition count 202
Drop transitions removed 18 transitions
Redundant transition composition rules discarded 18 transitions
Iterating global reduction 23 with 18 rules applied. Total rules applied 13309 place count 163 transition count 184
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 23 with 1 rules applied. Total rules applied 13310 place count 162 transition count 184
Discarding 15 places :
Symmetric choice reduction at 24 with 15 rule applications. Total rules 13325 place count 147 transition count 155
Iterating global reduction 24 with 15 rules applied. Total rules applied 13340 place count 147 transition count 155
Free-agglomeration rule applied 3 times.
Iterating global reduction 24 with 3 rules applied. Total rules applied 13343 place count 147 transition count 152
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 24 with 3 rules applied. Total rules applied 13346 place count 144 transition count 152
Applied a total of 13346 rules in 1613 ms. Remains 144 /7058 variables (removed 6914) and now considering 152/9611 (removed 9459) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1614 ms. Remains : 144/7058 places, 152/9611 transitions.
Finished random walk after 4617 steps, including 1 resets, run visited all 4 properties in 29 ms. (steps per millisecond=159 )
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-13 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-02 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
All properties solved without resorting to model-checking.
Total runtime 31900 ms.
starting LoLA
BK_INPUT DLCshifumi-PT-3b
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-3b-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678281036042
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-3b-ReachabilityCardinality-00: AG 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-03: AG 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-04: EF 0 0 0 0 0 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-06: AG 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-08: EF 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-12: AG 0 0 0 0 0 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 79 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-3b-ReachabilityCardinality-00: AG 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-03: AG 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-05: AG 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-06: AG 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-08: EF 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-11: AG 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-12: AG 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-13: AG 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-14: EF 0 0 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-15: AG 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 84 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type EXCL) for 42 DLCshifumi-PT-3b-ReachabilityCardinality-14
lola: time limit : 219 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 48 (type FNDP) for 42 DLCshifumi-PT-3b-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 49 (type EQUN) for 42 DLCshifumi-PT-3b-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SRCH) for 42 DLCshifumi-PT-3b-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 51 (type SRCH) for DLCshifumi-PT-3b-ReachabilityCardinality-14
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 48 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 49 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 52 (type EXCL) for DLCshifumi-PT-3b-ReachabilityCardinality-14 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-49.sara.
lola: FINISHED task # 48 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-14
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 49 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-14
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 59 (type EXCL) for 30 DLCshifumi-PT-3b-ReachabilityCardinality-10
lola: time limit : 234 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 55 (type FNDP) for 30 DLCshifumi-PT-3b-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type EQUN) for 30 DLCshifumi-PT-3b-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 58 (type SRCH) for 30 DLCshifumi-PT-3b-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-56.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 56 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-10
lola: result : false
lola: CANCELED task # 55 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 58 (type SRCH) for DLCshifumi-PT-3b-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 59 (type EXCL) for DLCshifumi-PT-3b-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 121 (type EXCL) for 9 DLCshifumi-PT-3b-ReachabilityCardinality-03
lola: time limit : 251 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 68 (type FNDP) for 6 DLCshifumi-PT-3b-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type EQUN) for 6 DLCshifumi-PT-3b-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type SRCH) for 6 DLCshifumi-PT-3b-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 55 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-10
lola: result : unknown
lola: fired transitions : 19811
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 71 (type SRCH) for DLCshifumi-PT-3b-ReachabilityCardinality-02
lola: result : true
lola: markings : 32
lola: fired transitions : 31
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 68 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 69 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 80 (type FNDP) for 36 DLCshifumi-PT-3b-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type EQUN) for 36 DLCshifumi-PT-3b-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 86 (type SRCH) for 36 DLCshifumi-PT-3b-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 68 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-02
lola: result : true
lola: fired transitions : 30
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 86 (type SRCH) for DLCshifumi-PT-3b-ReachabilityCardinality-12
lola: result : true
lola: markings : 10
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 80 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 81 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 73 (type FNDP) for 21 DLCshifumi-PT-3b-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type EQUN) for 21 DLCshifumi-PT-3b-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-69.sara.
lola: LAUNCH task # 76 (type SRCH) for 21 DLCshifumi-PT-3b-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 80 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-12
lola: result : true
lola: fired transitions : 8
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-81.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-74.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-3b-ReachabilityCardinality-02: AG false tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-10: AG true state equation
DLCshifumi-PT-3b-ReachabilityCardinality-12: AG false tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-14: EF true tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-3b-ReachabilityCardinality-00: AG 0 5 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-01: EF 0 5 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-03: AG 0 4 1 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-06: AG 0 5 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-07: EF 0 2 3 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-11: AG 0 5 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-13: AG 0 5 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-15: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF FNDP 3/217 0/5 DLCshifumi-PT-3b-ReachabilityCardinality-07 9106 t fired, 1 attempts, .
74 EF STEQ 3/217 0/5 DLCshifumi-PT-3b-ReachabilityCardinality-07 sara is running.
76 EF SRCH 3/217 1/5 DLCshifumi-PT-3b-ReachabilityCardinality-07 3495 m, 699 m/sec, 5817 t fired, .
121 EF EXCL 3/292 1/32 DLCshifumi-PT-3b-ReachabilityCardinality-03 835 m, 167 m/sec, 1081 t fired, .
Time elapsed: 89 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
sara: place or transition ordering is non-deterministic
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lola: result : false
lola: CANCELED task # 73 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 76 (type SRCH) for DLCshifumi-PT-3b-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 148 (type FNDP) for 18 DLCshifumi-PT-3b-ReachabilityCardinality-06
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lola: FINISHED task # 73 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 84792
lola: tried executions : 2
lola: time used : 7.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 151 (type SRCH) for DLCshifumi-PT-3b-ReachabilityCardinality-06
lola: result : true
lola: markings : 17
lola: fired transitions : 18
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 148 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 149 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-06 (obsolete)
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lola: LAUNCH task # 131 (type SRCH) for 33 DLCshifumi-PT-3b-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 131 (type SRCH) for DLCshifumi-PT-3b-ReachabilityCardinality-11
lola: result : true
lola: markings : 58
lola: fired transitions : 77
lola: time used : 0.000000
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lola: CANCELED task # 128 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 129 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 98 (type FNDP) for 12 DLCshifumi-PT-3b-ReachabilityCardinality-04
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lola: LAUNCH task # 103 (type SRCH) for 12 DLCshifumi-PT-3b-ReachabilityCardinality-04
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lola: FINISHED task # 128 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 52
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lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 148 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-06
lola: result : true
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lola: tried executions : 1
lola: time used : 0.000000
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lola: FINISHED task # 98 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-04
lola: result : true
lola: tried executions : 1
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lola: memory pages used : 0
lola: CANCELED task # 101 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 103 (type SRCH) for DLCshifumi-PT-3b-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 141 (type FNDP) for 24 DLCshifumi-PT-3b-ReachabilityCardinality-08
lola: time limit : 32000000 sec
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lola: LAUNCH task # 142 (type EQUN) for 24 DLCshifumi-PT-3b-ReachabilityCardinality-08
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lola: LAUNCH task # 144 (type SRCH) for 24 DLCshifumi-PT-3b-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-101.sara.
lola: FINISHED task # 144 (type SRCH) for DLCshifumi-PT-3b-ReachabilityCardinality-08
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 141 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 142 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 115 (type FNDP) for 39 DLCshifumi-PT-3b-ReachabilityCardinality-13
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lola: LAUNCH task # 123 (type SRCH) for 39 DLCshifumi-PT-3b-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 123 (type SRCH) for DLCshifumi-PT-3b-ReachabilityCardinality-13
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 115 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 118 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 61 (type FNDP) for 3 DLCshifumi-PT-3b-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type EQUN) for 3 DLCshifumi-PT-3b-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type SRCH) for 3 DLCshifumi-PT-3b-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-142.sara.
lola: FINISHED task # 141 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-08
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-129.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-3b-ReachabilityCardinality-02: AG false tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-04: EF true findpath
DLCshifumi-PT-3b-ReachabilityCardinality-06: AG false tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-07: EF false state equation
DLCshifumi-PT-3b-ReachabilityCardinality-08: EF true tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-10: AG true state equation
DLCshifumi-PT-3b-ReachabilityCardinality-11: AG false tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-12: AG false tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-13: AG false tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-14: EF true tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-3b-ReachabilityCardinality-00: AG 0 5 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-01: EF 0 2 3 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-03: AG 0 4 1 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-15: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
61 EF FNDP 1/437 0/5 DLCshifumi-PT-3b-ReachabilityCardinality-01 --
62 EF STEQ 1/437 0/5 DLCshifumi-PT-3b-ReachabilityCardinality-01 sara not yet started (preprocessing).
64 EF SRCH 1/437 1/5 DLCshifumi-PT-3b-ReachabilityCardinality-01 --
121 EF EXCL 8/585 1/32 DLCshifumi-PT-3b-ReachabilityCardinality-03 5170 m, 867 m/sec, 7357 t fired, .
Time elapsed: 94 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 115 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-13
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 64 (type SRCH) for DLCshifumi-PT-3b-ReachabilityCardinality-01
lola: result : true
lola: markings : 28
lola: fired transitions : 34
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 61 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 62 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 135 (type FNDP) for 45 DLCshifumi-PT-3b-ReachabilityCardinality-15
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lola: LAUNCH task # 136 (type EQUN) for 45 DLCshifumi-PT-3b-ReachabilityCardinality-15
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lola: LAUNCH task # 138 (type SRCH) for 45 DLCshifumi-PT-3b-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 61 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-01
lola: result : true
lola: fired transitions : 33
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 135 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-15
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 136 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 138 (type SRCH) for DLCshifumi-PT-3b-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 91 (type FNDP) for 0 DLCshifumi-PT-3b-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 92 (type EQUN) for 0 DLCshifumi-PT-3b-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-62.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 94 (type SRCH) for 0 DLCshifumi-PT-3b-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-118.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-136.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 142 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-08
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-92.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 62 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-01
lola: result : true
lola: FINISHED task # 118 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-13
lola: result : true
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 136 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-15
lola: result : true
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 101 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-04
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-3b-ReachabilityCardinality-01: EF true tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-02: AG false tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-04: EF true findpath
DLCshifumi-PT-3b-ReachabilityCardinality-06: AG false tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-07: EF false state equation
DLCshifumi-PT-3b-ReachabilityCardinality-08: EF true tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-10: AG true state equation
DLCshifumi-PT-3b-ReachabilityCardinality-11: AG false tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-12: AG false tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-13: AG false tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-14: EF true tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-3b-ReachabilityCardinality-00: AG 0 2 3 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-03: AG 0 4 1 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DLCshifumi-PT-3b-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 5/579 0/5 DLCshifumi-PT-3b-ReachabilityCardinality-00 124824 t fired, 1 attempts, .
92 EF STEQ 5/696 0/5 DLCshifumi-PT-3b-ReachabilityCardinality-00 sara is running.
94 EF SRCH 5/696 1/5 DLCshifumi-PT-3b-ReachabilityCardinality-00 75035 m, 15007 m/sec, 114896 t fired, .
121 EF EXCL 13/878 1/32 DLCshifumi-PT-3b-ReachabilityCardinality-03 7930 m, 552 m/sec, 11267 t fired, .
Time elapsed: 99 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 92 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-00
lola: result : false
lola: CANCELED task # 91 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 94 (type SRCH) for DLCshifumi-PT-3b-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 83 (type FNDP) for 27 DLCshifumi-PT-3b-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 84 (type EQUN) for 27 DLCshifumi-PT-3b-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 88 (type SRCH) for 27 DLCshifumi-PT-3b-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 91 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 145553
lola: tried executions : 2
lola: time used : 5.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 88 (type SRCH) for DLCshifumi-PT-3b-ReachabilityCardinality-09
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 83 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 84 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 107 (type FNDP) for 15 DLCshifumi-PT-3b-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 108 (type EQUN) for 15 DLCshifumi-PT-3b-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 116 (type SRCH) for 15 DLCshifumi-PT-3b-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 83 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-09
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 107 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 108 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 116 (type SRCH) for DLCshifumi-PT-3b-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 110 (type FNDP) for 9 DLCshifumi-PT-3b-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type EQUN) for 9 DLCshifumi-PT-3b-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 120 (type SRCH) for 9 DLCshifumi-PT-3b-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-84.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-108.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-113.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 84 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-09
lola: result : true
lola: FINISHED task # 108 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-05
lola: result : true
lola: FINISHED task # 113 (type EQUN) for DLCshifumi-PT-3b-ReachabilityCardinality-03
lola: result : false
lola: CANCELED task # 110 (type FNDP) for DLCshifumi-PT-3b-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 120 (type SRCH) for DLCshifumi-PT-3b-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 121 (type EXCL) for DLCshifumi-PT-3b-ReachabilityCardinality-03 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-3b-ReachabilityCardinality-00: AG true state equation
DLCshifumi-PT-3b-ReachabilityCardinality-01: EF true tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-02: AG false tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-03: AG true state equation
DLCshifumi-PT-3b-ReachabilityCardinality-04: EF true findpath
DLCshifumi-PT-3b-ReachabilityCardinality-05: AG false findpath
DLCshifumi-PT-3b-ReachabilityCardinality-06: AG false tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-07: EF false state equation
DLCshifumi-PT-3b-ReachabilityCardinality-08: EF true tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-09: EF true tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-10: AG true state equation
DLCshifumi-PT-3b-ReachabilityCardinality-11: AG false tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-12: AG false tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-13: AG false tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-14: EF true tandem / insertion
DLCshifumi-PT-3b-ReachabilityCardinality-15: AG false findpath
Time elapsed: 102 secs. Pages in use: 3
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCshifumi-PT-3b"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCshifumi-PT-3b, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478800822"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCshifumi-PT-3b.tgz
mv DLCshifumi-PT-3b execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;