fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r103-tall-167814478800798
Last Updated
May 14, 2023

About the Execution of LoLa+red for DLCshifumi-PT-2a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
285.831 5187.00 10792.00 240.90 TFTTTTTTFTTTTTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478800798.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCshifumi-PT-2a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478800798
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 724K
-rw-r--r-- 1 mcc users 6.1K Feb 26 08:04 CTLCardinality.txt
-rw-r--r-- 1 mcc users 63K Feb 26 08:04 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 26 07:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 26 07:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 15:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 15:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 26 08:13 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 168K Feb 26 08:13 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.5K Feb 26 08:08 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 85K Feb 26 08:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 213K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-00
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-01
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-02
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-03
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-04
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-05
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-06
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-07
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-08
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-09
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-10
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-11
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-12
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-13
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-14
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678279946981

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCshifumi-PT-2a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 12:52:28] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-08 12:52:28] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 12:52:28] [INFO ] Load time of PNML (sax parser for PT used): 80 ms
[2023-03-08 12:52:28] [INFO ] Transformed 188 places.
[2023-03-08 12:52:28] [INFO ] Transformed 888 transitions.
[2023-03-08 12:52:28] [INFO ] Found NUPN structural information;
[2023-03-08 12:52:28] [INFO ] Parsed PT model containing 188 places and 888 transitions and 3166 arcs in 148 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 16 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 128 transitions
Reduce redundant transitions removed 128 transitions.
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 451 ms. (steps per millisecond=22 ) properties (out of 7) seen :3
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-15 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 50 ms. (steps per millisecond=200 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 46 ms. (steps per millisecond=217 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
[2023-03-08 12:52:29] [INFO ] Flow matrix only has 184 transitions (discarded 576 similar events)
// Phase 1: matrix 184 rows 188 cols
[2023-03-08 12:52:29] [INFO ] Computed 79 place invariants in 16 ms
[2023-03-08 12:52:29] [INFO ] After 234ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-08 12:52:29] [INFO ] [Nat]Absence check using 79 positive place invariants in 17 ms returned sat
[2023-03-08 12:52:29] [INFO ] After 118ms SMT Verify possible using all constraints in natural domain returned unsat :4 sat :0
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-11 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-08 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-02 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 4 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 1299 ms.
starting LoLA
BK_INPUT DLCshifumi-PT-2a
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678279952168

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 50 (type SKEL/FNDP) for 9 DLCshifumi-PT-2a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/EQUN) for 9 DLCshifumi-PT-2a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type SKEL/SRCH) for 9 DLCshifumi-PT-2a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/SRCH) for 9 DLCshifumi-PT-2a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 54 (type SKEL/SRCH) for DLCshifumi-PT-2a-ReachabilityCardinality-03
lola: result : false
lola: markings : 82
lola: fired transitions : 211
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 50 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 51 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 53 (type SRCH) for DLCshifumi-PT-2a-ReachabilityCardinality-03 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 19 (type CNST) for 18 DLCshifumi-PT-2a-ReachabilityCardinality-06
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 19 (type CNST) for DLCshifumi-PT-2a-ReachabilityCardinality-06
lola: result : true
lola: LAUNCH INITIAL
lola: LAUNCH task # 25 (type CNST) for 24 DLCshifumi-PT-2a-ReachabilityCardinality-08
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 25 (type CNST) for DLCshifumi-PT-2a-ReachabilityCardinality-08
lola: result : false
lola: planning for DLCshifumi-PT-2a-ReachabilityCardinality-03 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 61 (type EXCL) for 15 DLCshifumi-PT-2a-ReachabilityCardinality-05
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 57 (type FNDP) for 15 DLCshifumi-PT-2a-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type EQUN) for 15 DLCshifumi-PT-2a-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SRCH) for 15 DLCshifumi-PT-2a-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
lola: FINISHED task # 60 (type SRCH) for DLCshifumi-PT-2a-ReachabilityCardinality-05
lola: result : false
lola: markings : 5
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 57 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 58 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 61 (type EXCL) for DLCshifumi-PT-2a-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 70 (type EXCL) for 0 DLCshifumi-PT-2a-ReachabilityCardinality-00
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 64 (type FNDP) for 6 DLCshifumi-PT-2a-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic
lola: LAUNCH task # 72 (type EQUN) for 6 DLCshifumi-PT-2a-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type SRCH) for 6 DLCshifumi-PT-2a-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 74 (type SRCH) for DLCshifumi-PT-2a-ReachabilityCardinality-02
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 64 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 72 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 66 (type FNDP) for 0 DLCshifumi-PT-2a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type EQUN) for 0 DLCshifumi-PT-2a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SRCH) for 0 DLCshifumi-PT-2a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 61 (type EXCL) for DLCshifumi-PT-2a-ReachabilityCardinality-05
lola: result : false
lola: markings : 49
lola: fired transitions : 100
lola: time used : 0.000000
lola: memory pages used : 1

lola: FINISHED task # 57 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 5962
lola: tried executions : 1989
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 70 (type EXCL) for DLCshifumi-PT-2a-ReachabilityCardinality-00
lola: result : false
lola: markings : 92
lola: fired transitions : 174
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 66 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 67 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 69 (type SRCH) for DLCshifumi-PT-2a-ReachabilityCardinality-00 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 66 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 1451
lola: tried executions : 727
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-58.sara.
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-72.sara.
sara: place or transition ordering is non-deterministic

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-67.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 51 (type SKEL/EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-03
lola: result : false
lola: FINISHED task # 58 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-05
lola: result : false
lola: FINISHED task # 72 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-02
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 82 (type EXCL) for 33 DLCshifumi-PT-2a-ReachabilityCardinality-11
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 78 (type FNDP) for 33 DLCshifumi-PT-2a-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 79 (type EQUN) for 33 DLCshifumi-PT-2a-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 81 (type SRCH) for 33 DLCshifumi-PT-2a-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 67 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-00
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 81 (type SRCH) for DLCshifumi-PT-2a-ReachabilityCardinality-11
lola: result : false
lola: markings : 7
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 78 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 79 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 82 (type EXCL) for DLCshifumi-PT-2a-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 88 (type EXCL) for 39 DLCshifumi-PT-2a-ReachabilityCardinality-13
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 84 (type FNDP) for 39 DLCshifumi-PT-2a-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type EQUN) for 39 DLCshifumi-PT-2a-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type SRCH) for 39 DLCshifumi-PT-2a-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 84 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-13
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 88 (type EXCL) for DLCshifumi-PT-2a-ReachabilityCardinality-13
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 85 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 87 (type SRCH) for DLCshifumi-PT-2a-ReachabilityCardinality-13 (obsolete)
lola: FINISHED task # 85 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-13
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 94 (type EXCL) for 3 DLCshifumi-PT-2a-ReachabilityCardinality-01
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 90 (type FNDP) for 3 DLCshifumi-PT-2a-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 91 (type EQUN) for 3 DLCshifumi-PT-2a-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 93 (type SRCH) for 3 DLCshifumi-PT-2a-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 94 (type EXCL) for DLCshifumi-PT-2a-ReachabilityCardinality-01
lola: result : false
lola: markings : 48
lola: fired transitions : 103
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 90 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 91 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 93 (type SRCH) for DLCshifumi-PT-2a-ReachabilityCardinality-01 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 101 (type EXCL) for 12 DLCshifumi-PT-2a-ReachabilityCardinality-04
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 97 (type FNDP) for 12 DLCshifumi-PT-2a-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 98 (type EQUN) for 12 DLCshifumi-PT-2a-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 100 (type SRCH) for 12 DLCshifumi-PT-2a-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 101 (type EXCL) for DLCshifumi-PT-2a-ReachabilityCardinality-04
lola: result : false
lola: markings : 114
lola: fired transitions : 228
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 97 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 98 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 100 (type SRCH) for DLCshifumi-PT-2a-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 114 (type EXCL) for 36 DLCshifumi-PT-2a-ReachabilityCardinality-12
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 110 (type FNDP) for 36 DLCshifumi-PT-2a-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 111 (type EQUN) for 36 DLCshifumi-PT-2a-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type SRCH) for 36 DLCshifumi-PT-2a-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-91.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-79.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-98.sara.
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 113 (type SRCH) for DLCshifumi-PT-2a-ReachabilityCardinality-12
lola: result : false
lola: markings : 89
lola: fired transitions : 584
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 110 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 111 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 114 (type EXCL) for DLCshifumi-PT-2a-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 117 (type EXCL) for 30 DLCshifumi-PT-2a-ReachabilityCardinality-10
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 106 (type FNDP) for 30 DLCshifumi-PT-2a-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 108 (type EQUN) for 30 DLCshifumi-PT-2a-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 116 (type SRCH) for 30 DLCshifumi-PT-2a-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 114 (type EXCL) for DLCshifumi-PT-2a-ReachabilityCardinality-12
lola: result : false
lola: markings : 1485
lola: fired transitions : 7492
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 110 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 294
lola: tried executions : 42
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-111.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:787

lola: FINISHED task # 91 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-01
lola: result : false
lola: FINISHED task # 116 (type SRCH) for DLCshifumi-PT-2a-ReachabilityCardinality-10
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 106 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 108 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 117 (type EXCL) for DLCshifumi-PT-2a-ReachabilityCardinality-10 (obsolete)
lola: FINISHED task # 106 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-10
lola: result : unknown
lola: fired transitions : 1073
lola: tried executions : 538
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 98 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-04
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 111 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-12
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 135 (type EXCL) for 42 DLCshifumi-PT-2a-ReachabilityCardinality-14
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 124 (type FNDP) for 42 DLCshifumi-PT-2a-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 129 (type EQUN) for 42 DLCshifumi-PT-2a-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 134 (type SRCH) for 42 DLCshifumi-PT-2a-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 134 (type SRCH) for DLCshifumi-PT-2a-ReachabilityCardinality-14
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 124 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 129 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 135 (type EXCL) for DLCshifumi-PT-2a-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 138 (type EXCL) for 21 DLCshifumi-PT-2a-ReachabilityCardinality-07
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 105 (type FNDP) for 27 DLCshifumi-PT-2a-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 119 (type EQUN) for 27 DLCshifumi-PT-2a-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 131 (type SRCH) for 27 DLCshifumi-PT-2a-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 124 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-14
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-129.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 138 (type EXCL) for DLCshifumi-PT-2a-ReachabilityCardinality-07
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: result : false
lola: markings : 462
lola: fired transitions : 947
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 131 (type SRCH) for DLCshifumi-PT-2a-ReachabilityCardinality-09
lola: result : false
lola: markings : 13
lola: fired transitions : 35
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 105 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 119 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 140 (type EXCL) for 45 DLCshifumi-PT-2a-ReachabilityCardinality-15
lola: time limit : 3598 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 126 (type FNDP) for 45 DLCshifumi-PT-2a-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 127 (type EQUN) for 45 DLCshifumi-PT-2a-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 139 (type SRCH) for 45 DLCshifumi-PT-2a-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 105 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 26526
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 140 (type EXCL) for DLCshifumi-PT-2a-ReachabilityCardinality-15
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 139 (type SRCH) for DLCshifumi-PT-2a-ReachabilityCardinality-15
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 126 (type FNDP) for DLCshifumi-PT-2a-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 127 (type EQUN) for DLCshifumi-PT-2a-ReachabilityCardinality-15 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-2a-ReachabilityCardinality-00: AG true tandem / relaxed
DLCshifumi-PT-2a-ReachabilityCardinality-01: EF false tandem / relaxed
DLCshifumi-PT-2a-ReachabilityCardinality-02: AG true tandem / insertion
DLCshifumi-PT-2a-ReachabilityCardinality-03: AG true skeleton: tandem / relaxed
DLCshifumi-PT-2a-ReachabilityCardinality-04: AG true tandem / relaxed
DLCshifumi-PT-2a-ReachabilityCardinality-05: AG true tandem / insertion
DLCshifumi-PT-2a-ReachabilityCardinality-06: INITIAL true preprocessing
DLCshifumi-PT-2a-ReachabilityCardinality-07: AG true tandem / relaxed
DLCshifumi-PT-2a-ReachabilityCardinality-08: INITIAL false preprocessing
DLCshifumi-PT-2a-ReachabilityCardinality-09: AG true tandem / insertion
DLCshifumi-PT-2a-ReachabilityCardinality-10: AG true tandem / insertion
DLCshifumi-PT-2a-ReachabilityCardinality-11: AG true tandem / insertion
DLCshifumi-PT-2a-ReachabilityCardinality-12: AG true tandem / insertion
DLCshifumi-PT-2a-ReachabilityCardinality-13: EF true findpath
DLCshifumi-PT-2a-ReachabilityCardinality-14: AG false tandem / insertion
DLCshifumi-PT-2a-ReachabilityCardinality-15: AG false tandem / insertion


Time elapsed: 2 secs. Pages in use: 3
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCshifumi-PT-2a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCshifumi-PT-2a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478800798"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCshifumi-PT-2a.tgz
mv DLCshifumi-PT-2a execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;