fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r103-tall-167814478700761
Last Updated
May 14, 2023

About the Execution of LoLa+red for DLCround-PT-12a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16225.279 99304.00 179415.00 8739.00 T????T??F?F??TTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478700761.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCround-PT-12a, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478700761
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.3M
-rw-r--r-- 1 mcc users 6.9K Feb 25 19:40 CTLCardinality.txt
-rw-r--r-- 1 mcc users 76K Feb 25 19:40 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K Feb 25 19:04 CTLFireability.txt
-rw-r--r-- 1 mcc users 61K Feb 25 19:04 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.2K Feb 25 15:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 15:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.3K Feb 25 20:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 98K Feb 25 20:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.4K Feb 25 20:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K Feb 25 20:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 871K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-12a-CTLCardinality-00
FORMULA_NAME DLCround-PT-12a-CTLCardinality-01
FORMULA_NAME DLCround-PT-12a-CTLCardinality-02
FORMULA_NAME DLCround-PT-12a-CTLCardinality-03
FORMULA_NAME DLCround-PT-12a-CTLCardinality-04
FORMULA_NAME DLCround-PT-12a-CTLCardinality-05
FORMULA_NAME DLCround-PT-12a-CTLCardinality-06
FORMULA_NAME DLCround-PT-12a-CTLCardinality-07
FORMULA_NAME DLCround-PT-12a-CTLCardinality-08
FORMULA_NAME DLCround-PT-12a-CTLCardinality-09
FORMULA_NAME DLCround-PT-12a-CTLCardinality-10
FORMULA_NAME DLCround-PT-12a-CTLCardinality-11
FORMULA_NAME DLCround-PT-12a-CTLCardinality-12
FORMULA_NAME DLCround-PT-12a-CTLCardinality-13
FORMULA_NAME DLCround-PT-12a-CTLCardinality-14
FORMULA_NAME DLCround-PT-12a-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678278579799

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-12a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 12:29:41] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-08 12:29:41] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 12:29:41] [INFO ] Load time of PNML (sax parser for PT used): 136 ms
[2023-03-08 12:29:41] [INFO ] Transformed 419 places.
[2023-03-08 12:29:41] [INFO ] Transformed 3407 transitions.
[2023-03-08 12:29:41] [INFO ] Found NUPN structural information;
[2023-03-08 12:29:41] [INFO ] Parsed PT model containing 419 places and 3407 transitions and 13330 arcs in 215 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 9 ms.
Initial state reduction rules removed 1 formulas.
Ensure Unique test removed 315 transitions
Reduce redundant transitions removed 315 transitions.
FORMULA DLCround-PT-12a-CTLCardinality-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 114 out of 419 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 419/419 places, 3092/3092 transitions.
Discarding 17 places :
Symmetric choice reduction at 0 with 17 rule applications. Total rules 17 place count 402 transition count 2806
Iterating global reduction 0 with 17 rules applied. Total rules applied 34 place count 402 transition count 2806
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 36 place count 402 transition count 2804
Drop transitions removed 952 transitions
Redundant transition composition rules discarded 952 transitions
Iterating global reduction 1 with 952 rules applied. Total rules applied 988 place count 402 transition count 1852
Applied a total of 988 rules in 303 ms. Remains 402 /419 variables (removed 17) and now considering 1852/3092 (removed 1240) transitions.
[2023-03-08 12:29:41] [INFO ] Flow matrix only has 231 transitions (discarded 1621 similar events)
// Phase 1: matrix 231 rows 402 cols
[2023-03-08 12:29:41] [INFO ] Computed 277 place invariants in 14 ms
[2023-03-08 12:29:43] [INFO ] Implicit Places using invariants in 1194 ms returned [142, 143, 144, 145, 146, 149, 150, 151, 152, 153, 154, 156, 158, 159, 160, 161, 162, 165, 166, 167, 170, 171, 172, 173, 175, 176, 178, 179, 181, 182, 183, 184, 186, 187, 188, 189, 190, 191, 192, 195, 196, 198, 199, 200, 201, 203, 205, 206, 207, 208, 209, 210, 211, 212, 214, 216, 217, 218, 219, 220, 223, 224, 225, 226, 228, 229, 232, 235, 236, 237, 239, 240, 241, 242, 243, 246, 247, 248, 249, 251, 253, 254, 255, 256, 257, 259, 260, 263, 265, 267, 269, 272, 273, 274, 275, 276, 277, 278, 280, 281, 282, 283, 284, 285, 287, 289, 290, 291, 292, 294, 295, 296, 297, 299, 301, 303, 304, 305, 306, 307, 309, 310, 311, 312, 313, 314, 315, 316, 317, 318, 319, 320, 322, 329, 332, 334, 336, 337, 338, 339, 340, 341, 342, 345, 346, 347, 350, 351, 353, 354, 355, 356, 357, 358, 359, 361, 362, 364, 365, 366, 367, 368, 369, 370, 371, 372, 374, 375, 378, 379, 380, 382, 383, 384, 385, 386, 387, 388, 389, 392, 394, 395, 398, 399, 400, 401]
Discarding 186 places :
Ensure Unique test removed 1070 transitions
Reduce isomorphic transitions removed 1070 transitions.
Implicit Place search using SMT only with invariants took 1235 ms to find 186 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 216/419 places, 782/3092 transitions.
Drop transitions removed 475 transitions
Redundant transition composition rules discarded 475 transitions
Iterating global reduction 0 with 475 rules applied. Total rules applied 475 place count 216 transition count 307
Applied a total of 475 rules in 13 ms. Remains 216 /216 variables (removed 0) and now considering 307/782 (removed 475) transitions.
[2023-03-08 12:29:43] [INFO ] Flow matrix only has 231 transitions (discarded 76 similar events)
// Phase 1: matrix 231 rows 216 cols
[2023-03-08 12:29:43] [INFO ] Computed 91 place invariants in 7 ms
[2023-03-08 12:29:43] [INFO ] Implicit Places using invariants in 199 ms returned []
[2023-03-08 12:29:43] [INFO ] Flow matrix only has 231 transitions (discarded 76 similar events)
[2023-03-08 12:29:43] [INFO ] Invariant cache hit.
[2023-03-08 12:29:43] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-08 12:29:43] [INFO ] Implicit Places using invariants and state equation in 255 ms returned []
Implicit Place search using SMT with State Equation took 456 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 216/419 places, 307/3092 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 2022 ms. Remains : 216/419 places, 307/3092 transitions.
Support contains 114 out of 216 places after structural reductions.
[2023-03-08 12:29:43] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-08 12:29:43] [INFO ] Flatten gal took : 52 ms
FORMULA DLCround-PT-12a-CTLCardinality-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-08 12:29:43] [INFO ] Flatten gal took : 33 ms
[2023-03-08 12:29:43] [INFO ] Input system was already deterministic with 307 transitions.
Support contains 106 out of 216 places (down from 114) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 677 ms. (steps per millisecond=14 ) properties (out of 70) seen :51
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Running SMT prover for 19 properties.
[2023-03-08 12:29:44] [INFO ] Flow matrix only has 231 transitions (discarded 76 similar events)
[2023-03-08 12:29:44] [INFO ] Invariant cache hit.
[2023-03-08 12:29:44] [INFO ] After 185ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:19
[2023-03-08 12:29:45] [INFO ] [Nat]Absence check using 91 positive place invariants in 21 ms returned sat
[2023-03-08 12:29:45] [INFO ] After 165ms SMT Verify possible using all constraints in natural domain returned unsat :19 sat :0
Fused 19 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 19 atomic propositions for a total of 13 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA DLCround-PT-12a-CTLCardinality-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-12a-CTLCardinality-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 12 ms
[2023-03-08 12:29:45] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA DLCround-PT-12a-CTLCardinality-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 13 ms
[2023-03-08 12:29:45] [INFO ] Input system was already deterministic with 307 transitions.
Support contains 28 out of 216 places (down from 47) after GAL structural reductions.
FORMULA DLCround-PT-12a-CTLCardinality-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-12a-CTLCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 75 stabilizing places and 1 stable transitions
Graph (complete) has 397 edges and 216 vertex of which 142 are kept as prefixes of interest. Removing 74 places using SCC suffix rule.3 ms
Starting structural reductions in SI_CTL mode, iteration 0 : 216/216 places, 307/307 transitions.
Graph (trivial) has 300 edges and 216 vertex of which 137 / 216 are part of one of the 17 SCC in 3 ms
Free SCC test removed 120 places
Ensure Unique test removed 281 transitions
Reduce isomorphic transitions removed 281 transitions.
Graph (complete) has 116 edges and 96 vertex of which 23 are kept as prefixes of interest. Removing 73 places using SCC suffix rule.1 ms
Discarding 73 places :
Also discarding 0 output transitions
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 23 transition count 25
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 5 place count 22 transition count 24
Discarding 14 places :
Symmetric choice reduction at 2 with 14 rule applications. Total rules 19 place count 8 transition count 10
Iterating global reduction 2 with 14 rules applied. Total rules applied 33 place count 8 transition count 10
Applied a total of 33 rules in 11 ms. Remains 8 /216 variables (removed 208) and now considering 10/307 (removed 297) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 8/216 places, 10/307 transitions.
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 1 ms
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 1 ms
[2023-03-08 12:29:45] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 216/216 places, 307/307 transitions.
Reduce places removed 69 places and 0 transitions.
Iterating post reduction 0 with 69 rules applied. Total rules applied 69 place count 147 transition count 307
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 85 place count 131 transition count 275
Iterating global reduction 1 with 16 rules applied. Total rules applied 101 place count 131 transition count 275
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 103 place count 131 transition count 273
Applied a total of 103 rules in 13 ms. Remains 131 /216 variables (removed 85) and now considering 273/307 (removed 34) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 131/216 places, 273/307 transitions.
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 8 ms
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:45] [INFO ] Input system was already deterministic with 273 transitions.
Starting structural reductions in LTL mode, iteration 0 : 216/216 places, 307/307 transitions.
Reduce places removed 74 places and 0 transitions.
Iterating post reduction 0 with 74 rules applied. Total rules applied 74 place count 142 transition count 307
Discarding 17 places :
Symmetric choice reduction at 1 with 17 rule applications. Total rules 91 place count 125 transition count 273
Iterating global reduction 1 with 17 rules applied. Total rules applied 108 place count 125 transition count 273
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 110 place count 125 transition count 271
Applied a total of 110 rules in 5 ms. Remains 125 /216 variables (removed 91) and now considering 271/307 (removed 36) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 125/216 places, 271/307 transitions.
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 8 ms
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 8 ms
[2023-03-08 12:29:45] [INFO ] Input system was already deterministic with 271 transitions.
Starting structural reductions in LTL mode, iteration 0 : 216/216 places, 307/307 transitions.
Reduce places removed 72 places and 0 transitions.
Iterating post reduction 0 with 72 rules applied. Total rules applied 72 place count 144 transition count 307
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 88 place count 128 transition count 275
Iterating global reduction 1 with 16 rules applied. Total rules applied 104 place count 128 transition count 275
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 105 place count 128 transition count 274
Applied a total of 105 rules in 5 ms. Remains 128 /216 variables (removed 88) and now considering 274/307 (removed 33) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 128/216 places, 274/307 transitions.
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 8 ms
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 8 ms
[2023-03-08 12:29:45] [INFO ] Input system was already deterministic with 274 transitions.
Starting structural reductions in LTL mode, iteration 0 : 216/216 places, 307/307 transitions.
Reduce places removed 71 places and 0 transitions.
Iterating post reduction 0 with 71 rules applied. Total rules applied 71 place count 145 transition count 307
Discarding 17 places :
Symmetric choice reduction at 1 with 17 rule applications. Total rules 88 place count 128 transition count 273
Iterating global reduction 1 with 17 rules applied. Total rules applied 105 place count 128 transition count 273
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 107 place count 128 transition count 271
Applied a total of 107 rules in 5 ms. Remains 128 /216 variables (removed 88) and now considering 271/307 (removed 36) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 128/216 places, 271/307 transitions.
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:29:45] [INFO ] Input system was already deterministic with 271 transitions.
Starting structural reductions in LTL mode, iteration 0 : 216/216 places, 307/307 transitions.
Reduce places removed 73 places and 0 transitions.
Iterating post reduction 0 with 73 rules applied. Total rules applied 73 place count 143 transition count 307
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 89 place count 127 transition count 275
Iterating global reduction 1 with 16 rules applied. Total rules applied 105 place count 127 transition count 275
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 107 place count 127 transition count 273
Applied a total of 107 rules in 4 ms. Remains 127 /216 variables (removed 89) and now considering 273/307 (removed 34) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 127/216 places, 273/307 transitions.
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:45] [INFO ] Input system was already deterministic with 273 transitions.
Starting structural reductions in LTL mode, iteration 0 : 216/216 places, 307/307 transitions.
Reduce places removed 71 places and 0 transitions.
Iterating post reduction 0 with 71 rules applied. Total rules applied 71 place count 145 transition count 307
Discarding 17 places :
Symmetric choice reduction at 1 with 17 rule applications. Total rules 88 place count 128 transition count 273
Iterating global reduction 1 with 17 rules applied. Total rules applied 105 place count 128 transition count 273
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 107 place count 128 transition count 271
Applied a total of 107 rules in 7 ms. Remains 128 /216 variables (removed 88) and now considering 271/307 (removed 36) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 128/216 places, 271/307 transitions.
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:45] [INFO ] Input system was already deterministic with 271 transitions.
Starting structural reductions in LTL mode, iteration 0 : 216/216 places, 307/307 transitions.
Reduce places removed 72 places and 0 transitions.
Iterating post reduction 0 with 72 rules applied. Total rules applied 72 place count 144 transition count 307
Discarding 17 places :
Symmetric choice reduction at 1 with 17 rule applications. Total rules 89 place count 127 transition count 273
Iterating global reduction 1 with 17 rules applied. Total rules applied 106 place count 127 transition count 273
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 108 place count 127 transition count 271
Applied a total of 108 rules in 4 ms. Remains 127 /216 variables (removed 89) and now considering 271/307 (removed 36) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 127/216 places, 271/307 transitions.
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:45] [INFO ] Input system was already deterministic with 271 transitions.
Starting structural reductions in LTL mode, iteration 0 : 216/216 places, 307/307 transitions.
Reduce places removed 73 places and 0 transitions.
Iterating post reduction 0 with 73 rules applied. Total rules applied 73 place count 143 transition count 307
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 89 place count 127 transition count 275
Iterating global reduction 1 with 16 rules applied. Total rules applied 105 place count 127 transition count 275
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 107 place count 127 transition count 273
Applied a total of 107 rules in 3 ms. Remains 127 /216 variables (removed 89) and now considering 273/307 (removed 34) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 127/216 places, 273/307 transitions.
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:45] [INFO ] Input system was already deterministic with 273 transitions.
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 9 ms
[2023-03-08 12:29:45] [INFO ] Flatten gal took : 8 ms
[2023-03-08 12:29:45] [INFO ] Export to MCC of 9 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 1 ms.
[2023-03-08 12:29:45] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 216 places, 307 transitions and 704 arcs took 2 ms.
Total runtime 4305 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DLCround-PT-12a
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/362

BK_STOP 1678278679103

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/362/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/362/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/362/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:199
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:287
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
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lola: Rule S: 0 transitions removed,0 places removed
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lola: LAUNCH task # 31 (type EXCL) for 6 DLCround-PT-12a-CTLCardinality-03
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 32 (type FNDP) for 6 DLCround-PT-12a-CTLCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
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31 EF DL EXCL 5/360 1/32 DLCround-PT-12a-CTLCardinality-03 34093932 m, 6818786 m/sec, 34093931 t fired, .
32 EF DL FNDP 5/3600 0/5 DLCround-PT-12a-CTLCardinality-03 105006438 t fired, 106 attempts, .

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31 EF DL EXCL 10/360 1/32 DLCround-PT-12a-CTLCardinality-03 67829458 m, 6747105 m/sec, 67829457 t fired, .
32 EF DL FNDP 10/3600 0/5 DLCround-PT-12a-CTLCardinality-03 212728022 t fired, 213 attempts, .

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31 EF DL EXCL 15/360 1/32 DLCround-PT-12a-CTLCardinality-03 101407505 m, 6715609 m/sec, 101407504 t fired, .
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31 EF DL EXCL 25/360 1/32 DLCround-PT-12a-CTLCardinality-03 169469074 m, 6772279 m/sec, 169469073 t fired, .
32 EF DL FNDP 25/3600 0/5 DLCround-PT-12a-CTLCardinality-03 535654595 t fired, 536 attempts, .

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31 EF DL EXCL 30/360 1/32 DLCround-PT-12a-CTLCardinality-03 202798922 m, 6665969 m/sec, 202798921 t fired, .
32 EF DL FNDP 30/3600 0/5 DLCround-PT-12a-CTLCardinality-03 643405346 t fired, 644 attempts, .

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31 EF DL EXCL 45/360 1/32 DLCround-PT-12a-CTLCardinality-03 305348179 m, 6766268 m/sec, 305348178 t fired, .
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31 EF DL EXCL 50/360 1/32 DLCround-PT-12a-CTLCardinality-03 339252004 m, 6780765 m/sec, 339252003 t fired, .
32 EF DL FNDP 50/3600 0/5 DLCround-PT-12a-CTLCardinality-03 1067499112 t fired, 1068 attempts, .

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31 EF DL EXCL 80/360 1/32 DLCround-PT-12a-CTLCardinality-03 409978327 m, 2777627 m/sec, 409978326 t fired, .
32 EF DL FNDP 80/3600 0/5 DLCround-PT-12a-CTLCardinality-03 1629121882 t fired, 1630 attempts, .

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DLCround-PT-12a-CTLCardinality-12: LTL/CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 EF DL EXCL 85/360 1/32 DLCround-PT-12a-CTLCardinality-03 419868232 m, 1977981 m/sec, 419868232 t fired, .
32 EF DL FNDP 85/3600 0/5 DLCround-PT-12a-CTLCardinality-03 1725170805 t fired, 1726 attempts, .

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DLCround-PT-12a-CTLCardinality-12: LTL/CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 EF DL EXCL 91/360 1/32 DLCround-PT-12a-CTLCardinality-03 431653626 m, 2357078 m/sec, 431653626 t fired, .
32 EF DL FNDP 91/3600 0/5 DLCround-PT-12a-CTLCardinality-03 1857786710 t fired, 1858 attempts, .

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/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 456 Killed lola --conf=$BIN_DIR/configfiles/ctlcardinalityconf --formula=$DIR/CTLCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-12a"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCround-PT-12a, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478700761"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-12a.tgz
mv DLCround-PT-12a execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;