fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r103-tall-167814478600666
Last Updated
May 14, 2023

About the Execution of LoLa+red for DLCround-PT-06a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15435.035 647996.00 641129.00 2129.00 T??F?F????TF?T?F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478600666.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCround-PT-06a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478600666
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 796K
-rw-r--r-- 1 mcc users 6.8K Feb 25 18:46 CTLCardinality.txt
-rw-r--r-- 1 mcc users 72K Feb 25 18:46 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 25 18:37 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 25 18:37 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 15:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 19:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 127K Feb 25 19:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.5K Feb 25 18:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 73K Feb 25 18:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 325K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-06a-CTLFireability-00
FORMULA_NAME DLCround-PT-06a-CTLFireability-01
FORMULA_NAME DLCround-PT-06a-CTLFireability-02
FORMULA_NAME DLCround-PT-06a-CTLFireability-03
FORMULA_NAME DLCround-PT-06a-CTLFireability-04
FORMULA_NAME DLCround-PT-06a-CTLFireability-05
FORMULA_NAME DLCround-PT-06a-CTLFireability-06
FORMULA_NAME DLCround-PT-06a-CTLFireability-07
FORMULA_NAME DLCround-PT-06a-CTLFireability-08
FORMULA_NAME DLCround-PT-06a-CTLFireability-09
FORMULA_NAME DLCround-PT-06a-CTLFireability-10
FORMULA_NAME DLCround-PT-06a-CTLFireability-11
FORMULA_NAME DLCround-PT-06a-CTLFireability-12
FORMULA_NAME DLCround-PT-06a-CTLFireability-13
FORMULA_NAME DLCround-PT-06a-CTLFireability-14
FORMULA_NAME DLCround-PT-06a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678273126951

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-06a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 10:58:48] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 10:58:48] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 10:58:48] [INFO ] Load time of PNML (sax parser for PT used): 85 ms
[2023-03-08 10:58:48] [INFO ] Transformed 197 places.
[2023-03-08 10:58:48] [INFO ] Transformed 1313 transitions.
[2023-03-08 10:58:48] [INFO ] Found NUPN structural information;
[2023-03-08 10:58:48] [INFO ] Parsed PT model containing 197 places and 1313 transitions and 5002 arcs in 149 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Ensure Unique test removed 135 transitions
Reduce redundant transitions removed 135 transitions.
Support contains 122 out of 197 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 197/197 places, 1178/1178 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 193 transition count 1142
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 193 transition count 1142
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 9 place count 193 transition count 1141
Drop transitions removed 396 transitions
Redundant transition composition rules discarded 396 transitions
Iterating global reduction 1 with 396 rules applied. Total rules applied 405 place count 193 transition count 745
Applied a total of 405 rules in 47 ms. Remains 193 /197 variables (removed 4) and now considering 745/1178 (removed 433) transitions.
[2023-03-08 10:58:48] [INFO ] Flow matrix only has 149 transitions (discarded 596 similar events)
// Phase 1: matrix 149 rows 193 cols
[2023-03-08 10:58:48] [INFO ] Computed 109 place invariants in 18 ms
[2023-03-08 10:58:49] [INFO ] Implicit Places using invariants in 437 ms returned []
[2023-03-08 10:58:49] [INFO ] Flow matrix only has 149 transitions (discarded 596 similar events)
[2023-03-08 10:58:49] [INFO ] Invariant cache hit.
[2023-03-08 10:58:49] [INFO ] State equation strengthened by 51 read => feed constraints.
[2023-03-08 10:58:49] [INFO ] Implicit Places using invariants and state equation in 320 ms returned [95, 100, 101, 105, 107, 109, 111, 115, 117, 119, 121, 122, 123, 128, 130, 131, 133, 137, 139, 140, 141, 143, 145, 147, 151, 156, 166, 168, 173, 177, 183, 184, 185, 191]
Discarding 34 places :
Ensure Unique test removed 126 transitions
Reduce isomorphic transitions removed 126 transitions.
Implicit Place search using SMT with State Equation took 781 ms to find 34 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 159/197 places, 619/1178 transitions.
Drop transitions removed 360 transitions
Redundant transition composition rules discarded 360 transitions
Iterating global reduction 0 with 360 rules applied. Total rules applied 360 place count 159 transition count 259
Applied a total of 360 rules in 8 ms. Remains 159 /159 variables (removed 0) and now considering 259/619 (removed 360) transitions.
[2023-03-08 10:58:49] [INFO ] Flow matrix only has 149 transitions (discarded 110 similar events)
// Phase 1: matrix 149 rows 159 cols
[2023-03-08 10:58:49] [INFO ] Computed 75 place invariants in 1 ms
[2023-03-08 10:58:49] [INFO ] Implicit Places using invariants in 47 ms returned []
[2023-03-08 10:58:49] [INFO ] Flow matrix only has 149 transitions (discarded 110 similar events)
[2023-03-08 10:58:49] [INFO ] Invariant cache hit.
[2023-03-08 10:58:49] [INFO ] State equation strengthened by 8 read => feed constraints.
[2023-03-08 10:58:49] [INFO ] Implicit Places using invariants and state equation in 94 ms returned []
Implicit Place search using SMT with State Equation took 142 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 159/197 places, 259/1178 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 978 ms. Remains : 159/197 places, 259/1178 transitions.
Support contains 122 out of 159 places after structural reductions.
[2023-03-08 10:58:49] [INFO ] Flatten gal took : 42 ms
[2023-03-08 10:58:49] [INFO ] Flatten gal took : 16 ms
[2023-03-08 10:58:49] [INFO ] Input system was already deterministic with 259 transitions.
Finished random walk after 2806 steps, including 0 resets, run visited all 100 properties in 86 ms. (steps per millisecond=32 )
[2023-03-08 10:58:49] [INFO ] Flatten gal took : 12 ms
[2023-03-08 10:58:49] [INFO ] Flatten gal took : 13 ms
[2023-03-08 10:58:50] [INFO ] Input system was already deterministic with 259 transitions.
Computed a total of 65 stabilizing places and 1 stable transitions
Graph (complete) has 403 edges and 159 vertex of which 111 are kept as prefixes of interest. Removing 48 places using SCC suffix rule.2 ms
Starting structural reductions in LTL mode, iteration 0 : 159/159 places, 259/259 transitions.
Reduce places removed 41 places and 0 transitions.
Iterating post reduction 0 with 41 rules applied. Total rules applied 41 place count 118 transition count 259
Discarding 21 places :
Symmetric choice reduction at 1 with 21 rule applications. Total rules 62 place count 97 transition count 199
Iterating global reduction 1 with 21 rules applied. Total rules applied 83 place count 97 transition count 199
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 85 place count 97 transition count 197
Applied a total of 85 rules in 5 ms. Remains 97 /159 variables (removed 62) and now considering 197/259 (removed 62) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 97/159 places, 197/259 transitions.
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 7 ms
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 6 ms
[2023-03-08 10:58:50] [INFO ] Input system was already deterministic with 197 transitions.
Starting structural reductions in LTL mode, iteration 0 : 159/159 places, 259/259 transitions.
Reduce places removed 43 places and 0 transitions.
Iterating post reduction 0 with 43 rules applied. Total rules applied 43 place count 116 transition count 259
Discarding 28 places :
Symmetric choice reduction at 1 with 28 rule applications. Total rules 71 place count 88 transition count 182
Iterating global reduction 1 with 28 rules applied. Total rules applied 99 place count 88 transition count 182
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 102 place count 88 transition count 179
Applied a total of 102 rules in 4 ms. Remains 88 /159 variables (removed 71) and now considering 179/259 (removed 80) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 88/159 places, 179/259 transitions.
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 6 ms
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 12 ms
[2023-03-08 10:58:50] [INFO ] Input system was already deterministic with 179 transitions.
Starting structural reductions in LTL mode, iteration 0 : 159/159 places, 259/259 transitions.
Reduce places removed 44 places and 0 transitions.
Iterating post reduction 0 with 44 rules applied. Total rules applied 44 place count 115 transition count 259
Discarding 28 places :
Symmetric choice reduction at 1 with 28 rule applications. Total rules 72 place count 87 transition count 185
Iterating global reduction 1 with 28 rules applied. Total rules applied 100 place count 87 transition count 185
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 103 place count 87 transition count 182
Applied a total of 103 rules in 5 ms. Remains 87 /159 variables (removed 72) and now considering 182/259 (removed 77) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 87/159 places, 182/259 transitions.
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 5 ms
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 6 ms
[2023-03-08 10:58:50] [INFO ] Input system was already deterministic with 182 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 159/159 places, 259/259 transitions.
Graph (trivial) has 182 edges and 159 vertex of which 76 / 159 are part of one of the 10 SCC in 2 ms
Free SCC test removed 66 places
Ensure Unique test removed 154 transitions
Reduce isomorphic transitions removed 154 transitions.
Graph (complete) has 249 edges and 93 vertex of which 47 are kept as prefixes of interest. Removing 46 places using SCC suffix rule.1 ms
Discarding 46 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 47 transition count 104
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 4 place count 46 transition count 104
Discarding 21 places :
Symmetric choice reduction at 2 with 21 rule applications. Total rules 25 place count 25 transition count 44
Iterating global reduction 2 with 21 rules applied. Total rules applied 46 place count 25 transition count 44
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 50 place count 23 transition count 42
Drop transitions removed 4 transitions
Redundant transition composition rules discarded 4 transitions
Iterating global reduction 2 with 4 rules applied. Total rules applied 54 place count 23 transition count 38
Applied a total of 54 rules in 14 ms. Remains 23 /159 variables (removed 136) and now considering 38/259 (removed 221) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 23/159 places, 38/259 transitions.
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:58:50] [INFO ] Input system was already deterministic with 38 transitions.
Starting structural reductions in LTL mode, iteration 0 : 159/159 places, 259/259 transitions.
Reduce places removed 42 places and 0 transitions.
Iterating post reduction 0 with 42 rules applied. Total rules applied 42 place count 117 transition count 259
Discarding 23 places :
Symmetric choice reduction at 1 with 23 rule applications. Total rules 65 place count 94 transition count 198
Iterating global reduction 1 with 23 rules applied. Total rules applied 88 place count 94 transition count 198
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 90 place count 94 transition count 196
Applied a total of 90 rules in 4 ms. Remains 94 /159 variables (removed 65) and now considering 196/259 (removed 63) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 94/159 places, 196/259 transitions.
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 5 ms
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 6 ms
[2023-03-08 10:58:50] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 159/159 places, 259/259 transitions.
Reduce places removed 45 places and 0 transitions.
Iterating post reduction 0 with 45 rules applied. Total rules applied 45 place count 114 transition count 259
Discarding 31 places :
Symmetric choice reduction at 1 with 31 rule applications. Total rules 76 place count 83 transition count 173
Iterating global reduction 1 with 31 rules applied. Total rules applied 107 place count 83 transition count 173
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 110 place count 83 transition count 170
Applied a total of 110 rules in 4 ms. Remains 83 /159 variables (removed 76) and now considering 170/259 (removed 89) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 83/159 places, 170/259 transitions.
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 5 ms
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 5 ms
[2023-03-08 10:58:50] [INFO ] Input system was already deterministic with 170 transitions.
Starting structural reductions in LTL mode, iteration 0 : 159/159 places, 259/259 transitions.
Reduce places removed 43 places and 0 transitions.
Iterating post reduction 0 with 43 rules applied. Total rules applied 43 place count 116 transition count 259
Discarding 30 places :
Symmetric choice reduction at 1 with 30 rule applications. Total rules 73 place count 86 transition count 175
Iterating global reduction 1 with 30 rules applied. Total rules applied 103 place count 86 transition count 175
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 106 place count 86 transition count 172
Applied a total of 106 rules in 4 ms. Remains 86 /159 variables (removed 73) and now considering 172/259 (removed 87) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 86/159 places, 172/259 transitions.
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 5 ms
[2023-03-08 10:58:50] [INFO ] Input system was already deterministic with 172 transitions.
Starting structural reductions in LTL mode, iteration 0 : 159/159 places, 259/259 transitions.
Reduce places removed 37 places and 0 transitions.
Iterating post reduction 0 with 37 rules applied. Total rules applied 37 place count 122 transition count 259
Discarding 18 places :
Symmetric choice reduction at 1 with 18 rule applications. Total rules 55 place count 104 transition count 211
Iterating global reduction 1 with 18 rules applied. Total rules applied 73 place count 104 transition count 211
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 76 place count 104 transition count 208
Applied a total of 76 rules in 3 ms. Remains 104 /159 variables (removed 55) and now considering 208/259 (removed 51) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 104/159 places, 208/259 transitions.
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 5 ms
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 6 ms
[2023-03-08 10:58:50] [INFO ] Input system was already deterministic with 208 transitions.
Starting structural reductions in LTL mode, iteration 0 : 159/159 places, 259/259 transitions.
Reduce places removed 38 places and 0 transitions.
Iterating post reduction 0 with 38 rules applied. Total rules applied 38 place count 121 transition count 259
Discarding 23 places :
Symmetric choice reduction at 1 with 23 rule applications. Total rules 61 place count 98 transition count 189
Iterating global reduction 1 with 23 rules applied. Total rules applied 84 place count 98 transition count 189
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 86 place count 98 transition count 187
Applied a total of 86 rules in 4 ms. Remains 98 /159 variables (removed 61) and now considering 187/259 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 98/159 places, 187/259 transitions.
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 5 ms
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 5 ms
[2023-03-08 10:58:50] [INFO ] Input system was already deterministic with 187 transitions.
Starting structural reductions in LTL mode, iteration 0 : 159/159 places, 259/259 transitions.
Reduce places removed 40 places and 0 transitions.
Iterating post reduction 0 with 40 rules applied. Total rules applied 40 place count 119 transition count 259
Discarding 27 places :
Symmetric choice reduction at 1 with 27 rule applications. Total rules 67 place count 92 transition count 184
Iterating global reduction 1 with 27 rules applied. Total rules applied 94 place count 92 transition count 184
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 96 place count 92 transition count 182
Applied a total of 96 rules in 2 ms. Remains 92 /159 variables (removed 67) and now considering 182/259 (removed 77) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 92/159 places, 182/259 transitions.
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 5 ms
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 5 ms
[2023-03-08 10:58:50] [INFO ] Input system was already deterministic with 182 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 159/159 places, 259/259 transitions.
Graph (trivial) has 177 edges and 159 vertex of which 73 / 159 are part of one of the 11 SCC in 1 ms
Free SCC test removed 62 places
Ensure Unique test removed 142 transitions
Reduce isomorphic transitions removed 142 transitions.
Graph (complete) has 240 edges and 97 vertex of which 52 are kept as prefixes of interest. Removing 45 places using SCC suffix rule.1 ms
Discarding 45 places :
Also discarding 0 output transitions
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 52 transition count 115
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 6 place count 50 transition count 115
Discarding 20 places :
Symmetric choice reduction at 2 with 20 rule applications. Total rules 26 place count 30 transition count 55
Iterating global reduction 2 with 20 rules applied. Total rules applied 46 place count 30 transition count 55
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 48 place count 30 transition count 53
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 52 place count 28 transition count 51
Drop transitions removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 3 with 5 rules applied. Total rules applied 57 place count 28 transition count 46
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 58 place count 28 transition count 46
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 59 place count 27 transition count 45
Iterating global reduction 3 with 1 rules applied. Total rules applied 60 place count 27 transition count 45
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 61 place count 27 transition count 44
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 4 with 1 rules applied. Total rules applied 62 place count 27 transition count 43
Applied a total of 62 rules in 10 ms. Remains 27 /159 variables (removed 132) and now considering 43/259 (removed 216) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 27/159 places, 43/259 transitions.
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 2 ms
[2023-03-08 10:58:50] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 159/159 places, 259/259 transitions.
Graph (trivial) has 179 edges and 159 vertex of which 74 / 159 are part of one of the 10 SCC in 0 ms
Free SCC test removed 64 places
Ensure Unique test removed 148 transitions
Reduce isomorphic transitions removed 148 transitions.
Graph (complete) has 255 edges and 95 vertex of which 48 are kept as prefixes of interest. Removing 47 places using SCC suffix rule.0 ms
Discarding 47 places :
Also discarding 0 output transitions
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 48 transition count 109
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 6 place count 46 transition count 109
Discarding 22 places :
Symmetric choice reduction at 2 with 22 rule applications. Total rules 28 place count 24 transition count 47
Iterating global reduction 2 with 22 rules applied. Total rules applied 50 place count 24 transition count 47
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 54 place count 22 transition count 45
Drop transitions removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 2 with 5 rules applied. Total rules applied 59 place count 22 transition count 40
Applied a total of 59 rules in 11 ms. Remains 22 /159 variables (removed 137) and now considering 40/259 (removed 219) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 22/159 places, 40/259 transitions.
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:58:50] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 159/159 places, 259/259 transitions.
Reduce places removed 46 places and 0 transitions.
Iterating post reduction 0 with 46 rules applied. Total rules applied 46 place count 113 transition count 259
Discarding 28 places :
Symmetric choice reduction at 1 with 28 rule applications. Total rules 74 place count 85 transition count 179
Iterating global reduction 1 with 28 rules applied. Total rules applied 102 place count 85 transition count 179
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 105 place count 85 transition count 176
Applied a total of 105 rules in 2 ms. Remains 85 /159 variables (removed 74) and now considering 176/259 (removed 83) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 85/159 places, 176/259 transitions.
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:58:50] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 159/159 places, 259/259 transitions.
Graph (trivial) has 165 edges and 159 vertex of which 65 / 159 are part of one of the 11 SCC in 0 ms
Free SCC test removed 54 places
Ensure Unique test removed 124 transitions
Reduce isomorphic transitions removed 124 transitions.
Graph (complete) has 258 edges and 105 vertex of which 62 are kept as prefixes of interest. Removing 43 places using SCC suffix rule.0 ms
Discarding 43 places :
Also discarding 0 output transitions
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 62 transition count 133
Reduce places removed 2 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 3 rules applied. Total rules applied 7 place count 60 transition count 132
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 8 place count 59 transition count 132
Discarding 18 places :
Symmetric choice reduction at 3 with 18 rule applications. Total rules 26 place count 41 transition count 79
Iterating global reduction 3 with 18 rules applied. Total rules applied 44 place count 41 transition count 79
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 3 with 2 rules applied. Total rules applied 46 place count 41 transition count 77
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 2 rules applied. Total rules applied 48 place count 40 transition count 76
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 5 with 4 rules applied. Total rules applied 52 place count 38 transition count 74
Drop transitions removed 9 transitions
Redundant transition composition rules discarded 9 transitions
Iterating global reduction 5 with 9 rules applied. Total rules applied 61 place count 38 transition count 65
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 5 with 1 rules applied. Total rules applied 62 place count 38 transition count 65
Discarding 1 places :
Symmetric choice reduction at 5 with 1 rule applications. Total rules 63 place count 37 transition count 64
Iterating global reduction 5 with 1 rules applied. Total rules applied 64 place count 37 transition count 64
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 65 place count 37 transition count 63
Applied a total of 65 rules in 11 ms. Remains 37 /159 variables (removed 122) and now considering 63/259 (removed 196) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 37/159 places, 63/259 transitions.
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 2 ms
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:58:50] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 159/159 places, 259/259 transitions.
Reduce places removed 39 places and 0 transitions.
Iterating post reduction 0 with 39 rules applied. Total rules applied 39 place count 120 transition count 259
Discarding 26 places :
Symmetric choice reduction at 1 with 26 rule applications. Total rules 65 place count 94 transition count 183
Iterating global reduction 1 with 26 rules applied. Total rules applied 91 place count 94 transition count 183
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 92 place count 94 transition count 182
Applied a total of 92 rules in 2 ms. Remains 94 /159 variables (removed 65) and now considering 182/259 (removed 77) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 94/159 places, 182/259 transitions.
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:58:50] [INFO ] Input system was already deterministic with 182 transitions.
Starting structural reductions in LTL mode, iteration 0 : 159/159 places, 259/259 transitions.
Reduce places removed 47 places and 0 transitions.
Iterating post reduction 0 with 47 rules applied. Total rules applied 47 place count 112 transition count 259
Discarding 28 places :
Symmetric choice reduction at 1 with 28 rule applications. Total rules 75 place count 84 transition count 182
Iterating global reduction 1 with 28 rules applied. Total rules applied 103 place count 84 transition count 182
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 106 place count 84 transition count 179
Applied a total of 106 rules in 2 ms. Remains 84 /159 variables (removed 75) and now considering 179/259 (removed 80) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 84/159 places, 179/259 transitions.
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:58:50] [INFO ] Input system was already deterministic with 179 transitions.
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 8 ms
[2023-03-08 10:58:50] [INFO ] Flatten gal took : 9 ms
[2023-03-08 10:58:50] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-08 10:58:50] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 159 places, 259 transitions and 720 arcs took 3 ms.
Total runtime 2225 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DLCround-PT-06a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
CTLFireability

FORMULA DLCround-PT-06a-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-06a-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678273774947

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 7 (type EXCL) for 6 DLCround-PT-06a-CTLFireability-02
lola: time limit : 128 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 57 (type FNDP) for 9 DLCround-PT-06a-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type EQUN) for 9 DLCround-PT-06a-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SRCH) for 9 DLCround-PT-06a-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 60 (type SRCH) for DLCround-PT-06a-CTLFireability-03
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 57 (type FNDP) for DLCround-PT-06a-CTLFireability-03
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 58 (type EQUN) for DLCround-PT-06a-CTLFireability-03 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
sara: try reading problem file /home/mcc/execution/372/CTLFireability-58.sara.

lola: FINISHED task # 58 (type EQUN) for DLCround-PT-06a-CTLFireability-03
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:736
lola: rewrite Frontend/Parser/formula_rewrite.k:696
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 61 (type FNDP) for 34 DLCround-PT-06a-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type EQUN) for 34 DLCround-PT-06a-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type SRCH) for 34 DLCround-PT-06a-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 64 (type SRCH) for DLCround-PT-06a-CTLFireability-10
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
sara: try reading problem file /home/mcc/execution/372/CTLFireability-62.sara.

lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 62 (type EQUN) for DLCround-PT-06a-CTLFireability-10
lola: result : true
lola: CANCELED task # 61 (type FNDP) for DLCround-PT-06a-CTLFireability-10 (obsolete)
lola: FINISHED task # 61 (type FNDP) for DLCround-PT-06a-CTLFireability-10
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
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DLCround-PT-06a-CTLFireability-10: CONJ 0 1 0 0 5 0 0 1
DLCround-PT-06a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DLCround-PT-06a-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DLCround-PT-06a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DLCround-PT-06a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 65/758 25/32 DLCround-PT-06a-CTLFireability-00 5677267 m, 81092 m/sec, 42669765 t fired, .

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# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-06a-CTLFireability-03: CONJ false findpath
DLCround-PT-06a-CTLFireability-05: CTL false CTL model checker
DLCround-PT-06a-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-06a-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
DLCround-PT-06a-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DLCround-PT-06a-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DLCround-PT-06a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DLCround-PT-06a-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
DLCround-PT-06a-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
DLCround-PT-06a-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
DLCround-PT-06a-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
DLCround-PT-06a-CTLFireability-10: CONJ 0 1 0 0 5 0 0 1
DLCround-PT-06a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DLCround-PT-06a-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DLCround-PT-06a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DLCround-PT-06a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 70/758 26/32 DLCround-PT-06a-CTLFireability-00 6041392 m, 72825 m/sec, 45709111 t fired, .

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# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-06a-CTLFireability-03: CONJ false findpath
DLCround-PT-06a-CTLFireability-05: CTL false CTL model checker
DLCround-PT-06a-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-06a-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
DLCround-PT-06a-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DLCround-PT-06a-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DLCround-PT-06a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DLCround-PT-06a-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
DLCround-PT-06a-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
DLCround-PT-06a-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
DLCround-PT-06a-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
DLCround-PT-06a-CTLFireability-10: CONJ 0 1 0 0 5 0 0 1
DLCround-PT-06a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DLCround-PT-06a-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DLCround-PT-06a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DLCround-PT-06a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 75/758 28/32 DLCround-PT-06a-CTLFireability-00 6371775 m, 66076 m/sec, 48472347 t fired, .

Time elapsed: 641 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 1 (type EXCL) for DLCround-PT-06a-CTLFireability-00
lola: result : true
lola: markings : 6528788
lola: fired transitions : 49149920
lola: time used : 77.000000
lola: memory pages used : 28
lola: LAUNCH task # 37 (type EXCL) for 34 DLCround-PT-06a-CTLFireability-10
lola: time limit : 985 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for DLCround-PT-06a-CTLFireability-10
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 42 (type EXCL) for 41 DLCround-PT-06a-CTLFireability-11
lola: time limit : 1478 sec
lola: memory limit: 32 pages
lola: FINISHED task # 42 (type EXCL) for DLCround-PT-06a-CTLFireability-11
lola: result : false
lola: markings : 19
lola: fired transitions : 235
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 47 DLCround-PT-06a-CTLFireability-13
lola: time limit : 2957 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for DLCround-PT-06a-CTLFireability-13
lola: result : true
lola: markings : 486
lola: fired transitions : 5221
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-06a-CTLFireability-00: CTL true CTL model checker
DLCround-PT-06a-CTLFireability-01: CTL unknown AGGR
DLCround-PT-06a-CTLFireability-02: CTL unknown AGGR
DLCround-PT-06a-CTLFireability-03: CONJ false findpath
DLCround-PT-06a-CTLFireability-04: CTL unknown AGGR
DLCround-PT-06a-CTLFireability-05: CTL false CTL model checker
DLCround-PT-06a-CTLFireability-06: CTL unknown AGGR
DLCround-PT-06a-CTLFireability-07: CTL unknown AGGR
DLCround-PT-06a-CTLFireability-08: CTL unknown AGGR
DLCround-PT-06a-CTLFireability-09: CTL unknown AGGR
DLCround-PT-06a-CTLFireability-10: CONJ true CONJ
DLCround-PT-06a-CTLFireability-11: CTL false CTL model checker
DLCround-PT-06a-CTLFireability-12: CTL unknown AGGR
DLCround-PT-06a-CTLFireability-13: CTL true CTL model checker
DLCround-PT-06a-CTLFireability-14: CTL unknown AGGR
DLCround-PT-06a-CTLFireability-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-06a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCround-PT-06a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478600666"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-06a.tgz
mv DLCround-PT-06a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;