About the Execution of LoLa+red for DLCround-PT-04a
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2952.516 | 164700.00 | 166950.00 | 694.40 | FFF?TF?FFFT?FTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478600633.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCround-PT-04a, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478600633
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 704K
-rw-r--r-- 1 mcc users 8.2K Feb 25 18:37 CTLCardinality.txt
-rw-r--r-- 1 mcc users 93K Feb 25 18:37 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Feb 25 18:32 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 25 18:32 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 15:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 15:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 15:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 18:44 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 128K Feb 25 18:44 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 10K Feb 25 18:41 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 90K Feb 25 18:41 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 200K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-04a-CTLCardinality-00
FORMULA_NAME DLCround-PT-04a-CTLCardinality-01
FORMULA_NAME DLCround-PT-04a-CTLCardinality-02
FORMULA_NAME DLCround-PT-04a-CTLCardinality-03
FORMULA_NAME DLCround-PT-04a-CTLCardinality-04
FORMULA_NAME DLCround-PT-04a-CTLCardinality-05
FORMULA_NAME DLCround-PT-04a-CTLCardinality-06
FORMULA_NAME DLCround-PT-04a-CTLCardinality-07
FORMULA_NAME DLCround-PT-04a-CTLCardinality-08
FORMULA_NAME DLCround-PT-04a-CTLCardinality-09
FORMULA_NAME DLCround-PT-04a-CTLCardinality-10
FORMULA_NAME DLCround-PT-04a-CTLCardinality-11
FORMULA_NAME DLCround-PT-04a-CTLCardinality-12
FORMULA_NAME DLCround-PT-04a-CTLCardinality-13
FORMULA_NAME DLCround-PT-04a-CTLCardinality-14
FORMULA_NAME DLCround-PT-04a-CTLCardinality-15
=== Now, execution of the tool begins
BK_START 1678270948942
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-04a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 10:22:30] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-08 10:22:30] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 10:22:30] [INFO ] Load time of PNML (sax parser for PT used): 72 ms
[2023-03-08 10:22:30] [INFO ] Transformed 139 places.
[2023-03-08 10:22:30] [INFO ] Transformed 823 transitions.
[2023-03-08 10:22:30] [INFO ] Found NUPN structural information;
[2023-03-08 10:22:30] [INFO ] Parsed PT model containing 139 places and 823 transitions and 3074 arcs in 136 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 11 ms.
Ensure Unique test removed 91 transitions
Reduce redundant transitions removed 91 transitions.
FORMULA DLCround-PT-04a-CTLCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-04a-CTLCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 92 out of 139 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 139/139 places, 732/732 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 137 transition count 716
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 137 transition count 716
Drop transitions removed 232 transitions
Redundant transition composition rules discarded 232 transitions
Iterating global reduction 0 with 232 rules applied. Total rules applied 236 place count 137 transition count 484
Applied a total of 236 rules in 33 ms. Remains 137 /139 variables (removed 2) and now considering 484/732 (removed 248) transitions.
[2023-03-08 10:22:30] [INFO ] Flow matrix only has 120 transitions (discarded 364 similar events)
// Phase 1: matrix 120 rows 137 cols
[2023-03-08 10:22:30] [INFO ] Computed 69 place invariants in 10 ms
[2023-03-08 10:22:30] [INFO ] Implicit Places using invariants in 256 ms returned [79, 80, 81, 86, 88, 89, 90, 91, 92, 93, 97, 98, 99, 102, 105, 106, 111, 112, 119, 120, 122, 123, 136]
Discarding 23 places :
Ensure Unique test removed 87 transitions
Reduce isomorphic transitions removed 87 transitions.
Implicit Place search using SMT only with invariants took 285 ms to find 23 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 114/139 places, 397/732 transitions.
Drop transitions removed 234 transitions
Redundant transition composition rules discarded 234 transitions
Iterating global reduction 0 with 234 rules applied. Total rules applied 234 place count 114 transition count 163
Applied a total of 234 rules in 4 ms. Remains 114 /114 variables (removed 0) and now considering 163/397 (removed 234) transitions.
[2023-03-08 10:22:30] [INFO ] Flow matrix only has 120 transitions (discarded 43 similar events)
// Phase 1: matrix 120 rows 114 cols
[2023-03-08 10:22:30] [INFO ] Computed 46 place invariants in 2 ms
[2023-03-08 10:22:30] [INFO ] Implicit Places using invariants in 40 ms returned []
[2023-03-08 10:22:30] [INFO ] Flow matrix only has 120 transitions (discarded 43 similar events)
[2023-03-08 10:22:30] [INFO ] Invariant cache hit.
[2023-03-08 10:22:30] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-08 10:22:30] [INFO ] Implicit Places using invariants and state equation in 87 ms returned []
Implicit Place search using SMT with State Equation took 128 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 114/139 places, 163/732 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 450 ms. Remains : 114/139 places, 163/732 transitions.
Support contains 92 out of 114 places after structural reductions.
[2023-03-08 10:22:31] [INFO ] Flatten gal took : 33 ms
[2023-03-08 10:22:31] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA DLCround-PT-04a-CTLCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-08 10:22:31] [INFO ] Flatten gal took : 11 ms
[2023-03-08 10:22:31] [INFO ] Input system was already deterministic with 163 transitions.
Support contains 86 out of 114 places (down from 92) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 490 ms. (steps per millisecond=20 ) properties (out of 60) seen :49
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 11) seen :0
Running SMT prover for 11 properties.
[2023-03-08 10:22:31] [INFO ] Flow matrix only has 120 transitions (discarded 43 similar events)
[2023-03-08 10:22:31] [INFO ] Invariant cache hit.
[2023-03-08 10:22:32] [INFO ] After 92ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2023-03-08 10:22:32] [INFO ] [Nat]Absence check using 46 positive place invariants in 7 ms returned sat
[2023-03-08 10:22:32] [INFO ] After 75ms SMT Verify possible using all constraints in natural domain returned unsat :11 sat :0
Fused 11 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 11 atomic propositions for a total of 13 simplifications.
[2023-03-08 10:22:32] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 9 ms
[2023-03-08 10:22:32] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA DLCround-PT-04a-CTLCardinality-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-04a-CTLCardinality-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 7 ms
[2023-03-08 10:22:32] [INFO ] Input system was already deterministic with 163 transitions.
Computed a total of 38 stabilizing places and 1 stable transitions
Graph (complete) has 208 edges and 114 vertex of which 77 are kept as prefixes of interest. Removing 37 places using SCC suffix rule.2 ms
Starting structural reductions in SI_CTL mode, iteration 0 : 114/114 places, 163/163 transitions.
Graph (trivial) has 131 edges and 114 vertex of which 53 / 114 are part of one of the 9 SCC in 2 ms
Free SCC test removed 44 places
Ensure Unique test removed 98 transitions
Reduce isomorphic transitions removed 98 transitions.
Graph (complete) has 110 edges and 70 vertex of which 38 are kept as prefixes of interest. Removing 32 places using SCC suffix rule.0 ms
Discarding 32 places :
Also discarding 0 output transitions
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 38 transition count 63
Reduce places removed 2 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 3 rules applied. Total rules applied 7 place count 36 transition count 62
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 8 place count 35 transition count 62
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 12 place count 31 transition count 57
Iterating global reduction 3 with 4 rules applied. Total rules applied 16 place count 31 transition count 57
Drop transitions removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 3 with 5 rules applied. Total rules applied 21 place count 31 transition count 52
Applied a total of 21 rules in 13 ms. Remains 31 /114 variables (removed 83) and now considering 52/163 (removed 111) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 31/114 places, 52/163 transitions.
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:22:32] [INFO ] Input system was already deterministic with 52 transitions.
Starting structural reductions in LTL mode, iteration 0 : 114/114 places, 163/163 transitions.
Reduce places removed 36 places and 0 transitions.
Iterating post reduction 0 with 36 rules applied. Total rules applied 36 place count 78 transition count 163
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 46 place count 68 transition count 143
Iterating global reduction 1 with 10 rules applied. Total rules applied 56 place count 68 transition count 143
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 58 place count 68 transition count 141
Applied a total of 58 rules in 2 ms. Remains 68 /114 variables (removed 46) and now considering 141/163 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 68/114 places, 141/163 transitions.
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 5 ms
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:22:32] [INFO ] Input system was already deterministic with 141 transitions.
Starting structural reductions in LTL mode, iteration 0 : 114/114 places, 163/163 transitions.
Reduce places removed 35 places and 0 transitions.
Iterating post reduction 0 with 35 rules applied. Total rules applied 35 place count 79 transition count 163
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 49 place count 65 transition count 135
Iterating global reduction 1 with 14 rules applied. Total rules applied 63 place count 65 transition count 135
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 66 place count 65 transition count 132
Applied a total of 66 rules in 3 ms. Remains 65 /114 variables (removed 49) and now considering 132/163 (removed 31) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 65/114 places, 132/163 transitions.
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:22:32] [INFO ] Input system was already deterministic with 132 transitions.
Starting structural reductions in LTL mode, iteration 0 : 114/114 places, 163/163 transitions.
Reduce places removed 36 places and 0 transitions.
Iterating post reduction 0 with 36 rules applied. Total rules applied 36 place count 78 transition count 163
Discarding 15 places :
Symmetric choice reduction at 1 with 15 rule applications. Total rules 51 place count 63 transition count 133
Iterating global reduction 1 with 15 rules applied. Total rules applied 66 place count 63 transition count 133
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 70 place count 63 transition count 129
Applied a total of 70 rules in 3 ms. Remains 63 /114 variables (removed 51) and now considering 129/163 (removed 34) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 63/114 places, 129/163 transitions.
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:22:32] [INFO ] Input system was already deterministic with 129 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 114/114 places, 163/163 transitions.
Graph (trivial) has 154 edges and 114 vertex of which 69 / 114 are part of one of the 8 SCC in 1 ms
Free SCC test removed 61 places
Ensure Unique test removed 140 transitions
Reduce isomorphic transitions removed 140 transitions.
Graph (complete) has 68 edges and 53 vertex of which 17 are kept as prefixes of interest. Removing 36 places using SCC suffix rule.0 ms
Discarding 36 places :
Also discarding 0 output transitions
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 17 transition count 22
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 4 place count 16 transition count 22
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 13 place count 7 transition count 11
Iterating global reduction 2 with 9 rules applied. Total rules applied 22 place count 7 transition count 11
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 2 rules applied. Total rules applied 24 place count 7 transition count 9
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 26 place count 6 transition count 8
Applied a total of 26 rules in 3 ms. Remains 6 /114 variables (removed 108) and now considering 8/163 (removed 155) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 6/114 places, 8/163 transitions.
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 0 ms
[2023-03-08 10:22:32] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 114/114 places, 163/163 transitions.
Reduce places removed 35 places and 0 transitions.
Iterating post reduction 0 with 35 rules applied. Total rules applied 35 place count 79 transition count 163
Discarding 15 places :
Symmetric choice reduction at 1 with 15 rule applications. Total rules 50 place count 64 transition count 133
Iterating global reduction 1 with 15 rules applied. Total rules applied 65 place count 64 transition count 133
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 68 place count 64 transition count 130
Applied a total of 68 rules in 3 ms. Remains 64 /114 variables (removed 50) and now considering 130/163 (removed 33) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 64/114 places, 130/163 transitions.
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:22:32] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in LTL mode, iteration 0 : 114/114 places, 163/163 transitions.
Reduce places removed 33 places and 0 transitions.
Iterating post reduction 0 with 33 rules applied. Total rules applied 33 place count 81 transition count 163
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 47 place count 67 transition count 135
Iterating global reduction 1 with 14 rules applied. Total rules applied 61 place count 67 transition count 135
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 65 place count 67 transition count 131
Applied a total of 65 rules in 3 ms. Remains 67 /114 variables (removed 47) and now considering 131/163 (removed 32) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 67/114 places, 131/163 transitions.
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:22:32] [INFO ] Input system was already deterministic with 131 transitions.
Starting structural reductions in LTL mode, iteration 0 : 114/114 places, 163/163 transitions.
Reduce places removed 35 places and 0 transitions.
Iterating post reduction 0 with 35 rules applied. Total rules applied 35 place count 79 transition count 163
Discarding 15 places :
Symmetric choice reduction at 1 with 15 rule applications. Total rules 50 place count 64 transition count 133
Iterating global reduction 1 with 15 rules applied. Total rules applied 65 place count 64 transition count 133
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 69 place count 64 transition count 129
Applied a total of 69 rules in 2 ms. Remains 64 /114 variables (removed 50) and now considering 129/163 (removed 34) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 64/114 places, 129/163 transitions.
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:22:32] [INFO ] Input system was already deterministic with 129 transitions.
Starting structural reductions in LTL mode, iteration 0 : 114/114 places, 163/163 transitions.
Reduce places removed 34 places and 0 transitions.
Iterating post reduction 0 with 34 rules applied. Total rules applied 34 place count 80 transition count 163
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 48 place count 66 transition count 135
Iterating global reduction 1 with 14 rules applied. Total rules applied 62 place count 66 transition count 135
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 66 place count 66 transition count 131
Applied a total of 66 rules in 3 ms. Remains 66 /114 variables (removed 48) and now considering 131/163 (removed 32) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 66/114 places, 131/163 transitions.
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:22:32] [INFO ] Input system was already deterministic with 131 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 114/114 places, 163/163 transitions.
Graph (trivial) has 162 edges and 114 vertex of which 76 / 114 are part of one of the 9 SCC in 1 ms
Free SCC test removed 67 places
Ensure Unique test removed 153 transitions
Reduce isomorphic transitions removed 153 transitions.
Graph (complete) has 55 edges and 47 vertex of which 11 are kept as prefixes of interest. Removing 36 places using SCC suffix rule.0 ms
Discarding 36 places :
Also discarding 0 output transitions
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 10 place count 3 transition count 2
Iterating global reduction 0 with 8 rules applied. Total rules applied 18 place count 3 transition count 2
Applied a total of 18 rules in 2 ms. Remains 3 /114 variables (removed 111) and now considering 2/163 (removed 161) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 3/114 places, 2/163 transitions.
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 0 ms
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 0 ms
[2023-03-08 10:22:32] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in LTL mode, iteration 0 : 114/114 places, 163/163 transitions.
Reduce places removed 30 places and 0 transitions.
Iterating post reduction 0 with 30 rules applied. Total rules applied 30 place count 84 transition count 163
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 44 place count 70 transition count 135
Iterating global reduction 1 with 14 rules applied. Total rules applied 58 place count 70 transition count 135
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 61 place count 70 transition count 132
Applied a total of 61 rules in 2 ms. Remains 70 /114 variables (removed 44) and now considering 132/163 (removed 31) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 70/114 places, 132/163 transitions.
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:22:32] [INFO ] Input system was already deterministic with 132 transitions.
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 6 ms
[2023-03-08 10:22:32] [INFO ] Flatten gal took : 6 ms
[2023-03-08 10:22:32] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 2 ms.
[2023-03-08 10:22:32] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 114 places, 163 transitions and 371 arcs took 1 ms.
Total runtime 2108 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DLCround-PT-04a
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/363
FORMULA DLCround-PT-04a-CTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04a-CTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04a-CTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04a-CTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04a-CTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04a-CTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04a-CTLCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04a-CTLCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678271113642
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/363/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/363/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/363/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 1 (type EXCL) for 0 DLCround-PT-04a-CTLCardinality-01
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 45 (type FNDP) for 9 DLCround-PT-04a-CTLCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 46 (type EQUN) for 9 DLCround-PT-04a-CTLCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 49 (type SRCH) for 9 DLCround-PT-04a-CTLCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 49 (type SRCH) for DLCround-PT-04a-CTLCardinality-06
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 1 (type EXCL) for DLCround-PT-04a-CTLCardinality-01
lola: result : false
lola: markings : 1921
lola: fired transitions : 37870
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 29 (type EXCL) for 28 DLCround-PT-04a-CTLCardinality-12
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for DLCround-PT-04a-CTLCardinality-12
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 DLCround-PT-04a-CTLCardinality-11
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/363/CTLCardinality-46.sara.
lola: FINISHED task # 45 (type FNDP) for DLCround-PT-04a-CTLCardinality-06
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: CANCELED task # 46 (type EQUN) for DLCround-PT-04a-CTLCardinality-06 (obsolete)
lola: FINISHED task # 46 (type EQUN) for DLCround-PT-04a-CTLCardinality-06
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 50 (type FNDP) for 34 DLCround-PT-04a-CTLCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type EQUN) for 34 DLCround-PT-04a-CTLCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SRCH) for 34 DLCround-PT-04a-CTLCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 53 (type SRCH) for DLCround-PT-04a-CTLCardinality-15
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 50 (type FNDP) for DLCround-PT-04a-CTLCardinality-15
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 51 (type EQUN) for DLCround-PT-04a-CTLCardinality-15 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 51 (type EQUN) for DLCround-PT-04a-CTLCardinality-15
lola: result : unknown
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-04a-CTLCardinality-01: CTL false CTL model checker
DLCround-PT-04a-CTLCardinality-12: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-04a-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-06: CONJ 0 1 0 0 5 0 0 1
DLCround-PT-04a-CTLCardinality-07: EFAG 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-14: EG 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-15: CONJ 0 2 0 0 6 0 0 1
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 5/360 5/32 DLCround-PT-04a-CTLCardinality-11 1008632 m, 201726 m/sec, 5530701 t fired, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-04a-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-06: CONJ 0 1 0 0 5 0 0 1
DLCround-PT-04a-CTLCardinality-07: EFAG 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-14: EG 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-15: CONJ 0 2 0 0 6 0 0 1
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 10/360 9/32 DLCround-PT-04a-CTLCardinality-11 1928150 m, 183903 m/sec, 10574385 t fired, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DLCround-PT-04a-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-06: CONJ 0 1 0 0 5 0 0 1
DLCround-PT-04a-CTLCardinality-07: EFAG 0 1 0 0 1 0 0 0
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DLCround-PT-04a-CTLCardinality-14: EG 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-15: CONJ 0 2 0 0 6 0 0 1
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 15/360 13/32 DLCround-PT-04a-CTLCardinality-11 2852297 m, 184829 m/sec, 15649512 t fired, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DLCround-PT-04a-CTLCardinality-06: CONJ 0 1 0 0 5 0 0 1
DLCround-PT-04a-CTLCardinality-07: EFAG 0 1 0 0 1 0 0 0
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DLCround-PT-04a-CTLCardinality-14: EG 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-15: CONJ 0 2 0 0 6 0 0 1
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 20/360 16/32 DLCround-PT-04a-CTLCardinality-11 3709042 m, 171349 m/sec, 20438076 t fired, .
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DLCround-PT-04a-CTLCardinality-15: CONJ 0 2 0 0 6 0 0 1
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 25/360 20/32 DLCround-PT-04a-CTLCardinality-11 4561111 m, 170413 m/sec, 25202446 t fired, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DLCround-PT-04a-CTLCardinality-14: EG 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-15: CONJ 0 2 0 0 6 0 0 1
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 30/360 23/32 DLCround-PT-04a-CTLCardinality-11 5407541 m, 169286 m/sec, 29832299 t fired, .
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DLCround-PT-04a-CTLCardinality-06: CONJ 0 1 0 0 5 0 0 1
DLCround-PT-04a-CTLCardinality-07: EFAG 0 1 0 0 1 0 0 0
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DLCround-PT-04a-CTLCardinality-14: EG 0 1 0 0 1 0 0 0
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26 CTL EXCL 35/360 27/32 DLCround-PT-04a-CTLCardinality-11 6229398 m, 164371 m/sec, 34327190 t fired, .
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26 CTL EXCL 40/360 30/32 DLCround-PT-04a-CTLCardinality-11 7022465 m, 158613 m/sec, 38673024 t fired, .
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lola: CANCELED task # 26 (type EXCL) for DLCround-PT-04a-CTLCardinality-11 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-04a-CTLCardinality-01: CTL false CTL model checker
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DLCround-PT-04a-CTLCardinality-14: EG 0 1 0 0 1 0 0 0
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lola: time limit : 395 sec
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lola: FINISHED task # 43 (type EXCL) for DLCround-PT-04a-CTLCardinality-15
lola: result : false
lola: markings : 1
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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12 CTL EXCL 5/711 4/32 DLCround-PT-04a-CTLCardinality-06 862668 m, 172533 m/sec, 4712527 t fired, .
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12 CTL EXCL 55/711 31/32 DLCround-PT-04a-CTLCardinality-06 7221438 m, 127809 m/sec, 43359623 t fired, .
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DLCround-PT-04a-CTLCardinality-06: CONJ 0 0 0 0 5 0 1 1
DLCround-PT-04a-CTLCardinality-07: EFAG 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
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7 CTL EXCL 30/873 19/32 DLCround-PT-04a-CTLCardinality-03 4326461 m, 136376 m/sec, 27703289 t fired, .
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DLCround-PT-04a-CTLCardinality-07: EFAG 0 1 0 0 1 0 0 0
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DLCround-PT-04a-CTLCardinality-09: CTL false CTL model checker
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DLCround-PT-04a-CTLCardinality-07: EFAG 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
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DLCround-PT-04a-CTLCardinality-06: CONJ 0 0 0 0 5 0 1 1
DLCround-PT-04a-CTLCardinality-07: EFAG 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
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DLCround-PT-04a-CTLCardinality-01: CTL false CTL model checker
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DLCround-PT-04a-CTLCardinality-09: CTL false CTL model checker
DLCround-PT-04a-CTLCardinality-12: CTL false CTL model checker
DLCround-PT-04a-CTLCardinality-15: CONJ false CTL model checker
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DLCround-PT-04a-CTLCardinality-06: CONJ 0 0 0 0 5 0 1 1
DLCround-PT-04a-CTLCardinality-07: EFAG 0 1 0 0 1 0 0 0
DLCround-PT-04a-CTLCardinality-11: CTL 0 0 0 0 1 0 1 0
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lola: LAUNCH task # 4 (type EXCL) for 3 DLCround-PT-04a-CTLCardinality-02
lola: time limit : 1146 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for DLCround-PT-04a-CTLCardinality-02
lola: result : false
lola: markings : 1
lola: time used : 0.000000
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lola: result : false
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lola: result : true
lola: markings : 7
lola: fired transitions : 53
lola: time used : 0.000000
lola: memory pages used : 1
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-04a-CTLCardinality-01: CTL false CTL model checker
DLCround-PT-04a-CTLCardinality-02: CTL false CTL model checker
DLCround-PT-04a-CTLCardinality-03: CTL unknown AGGR
DLCround-PT-04a-CTLCardinality-06: CONJ unknown CONJ
DLCround-PT-04a-CTLCardinality-07: EFAG false tscc_search
DLCround-PT-04a-CTLCardinality-08: CTL false CTL model checker
DLCround-PT-04a-CTLCardinality-09: CTL false CTL model checker
DLCround-PT-04a-CTLCardinality-11: CTL unknown AGGR
DLCround-PT-04a-CTLCardinality-12: CTL false CTL model checker
DLCround-PT-04a-CTLCardinality-14: EG false state space / EG
DLCround-PT-04a-CTLCardinality-15: CONJ false CTL model checker
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-04a"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCround-PT-04a, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478600633"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-04a.tgz
mv DLCround-PT-04a execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;