Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478500622.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCround-PT-03a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478500622
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 580K
-rw-r--r-- 1 mcc users 6.2K Feb 25 18:27 CTLCardinality.txt
-rw-r--r-- 1 mcc users 69K Feb 25 18:27 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.7K Feb 25 18:23 CTLFireability.txt
-rw-r--r-- 1 mcc users 40K Feb 25 18:23 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 15:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 15:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 15:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.1K Feb 25 18:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 83K Feb 25 18:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 25 18:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 108K Feb 25 18:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 148K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-03a-ReachabilityCardinality-00
FORMULA_NAME DLCround-PT-03a-ReachabilityCardinality-01
FORMULA_NAME DLCround-PT-03a-ReachabilityCardinality-02
FORMULA_NAME DLCround-PT-03a-ReachabilityCardinality-03
FORMULA_NAME DLCround-PT-03a-ReachabilityCardinality-04
FORMULA_NAME DLCround-PT-03a-ReachabilityCardinality-05
FORMULA_NAME DLCround-PT-03a-ReachabilityCardinality-06
FORMULA_NAME DLCround-PT-03a-ReachabilityCardinality-07
FORMULA_NAME DLCround-PT-03a-ReachabilityCardinality-08
FORMULA_NAME DLCround-PT-03a-ReachabilityCardinality-09
FORMULA_NAME DLCround-PT-03a-ReachabilityCardinality-10
FORMULA_NAME DLCround-PT-03a-ReachabilityCardinality-11
FORMULA_NAME DLCround-PT-03a-ReachabilityCardinality-12
FORMULA_NAME DLCround-PT-03a-ReachabilityCardinality-13
FORMULA_NAME DLCround-PT-03a-ReachabilityCardinality-14
FORMULA_NAME DLCround-PT-03a-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678270310971

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-03a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 10:11:52] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-08 10:11:52] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 10:11:52] [INFO ] Load time of PNML (sax parser for PT used): 114 ms
[2023-03-08 10:11:52] [INFO ] Transformed 113 places.
[2023-03-08 10:11:52] [INFO ] Transformed 617 transitions.
[2023-03-08 10:11:52] [INFO ] Found NUPN structural information;
[2023-03-08 10:11:52] [INFO ] Parsed PT model containing 113 places and 617 transitions and 2269 arcs in 204 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 25 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 1 formulas.
Ensure Unique test removed 72 transitions
Reduce redundant transitions removed 72 transitions.
FORMULA DLCround-PT-03a-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-03a-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-03a-ReachabilityCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-03a-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-03a-ReachabilityCardinality-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-03a-ReachabilityCardinality-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-03a-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-03a-ReachabilityCardinality-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 362 ms. (steps per millisecond=27 ) properties (out of 8) seen :2
FORMULA DLCround-PT-03a-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-03a-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 75 ms. (steps per millisecond=133 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
[2023-03-08 10:11:53] [INFO ] Flow matrix only has 106 transitions (discarded 439 similar events)
// Phase 1: matrix 106 rows 113 cols
[2023-03-08 10:11:53] [INFO ] Computed 52 place invariants in 13 ms
[2023-03-08 10:11:53] [INFO ] After 168ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:6
[2023-03-08 10:11:53] [INFO ] [Nat]Absence check using 52 positive place invariants in 11 ms returned sat
[2023-03-08 10:11:53] [INFO ] After 45ms SMT Verify possible using state equation in natural domain returned unsat :5 sat :1
[2023-03-08 10:11:53] [INFO ] State equation strengthened by 33 read => feed constraints.
[2023-03-08 10:11:53] [INFO ] After 20ms SMT Verify possible using 33 Read/Feed constraints in natural domain returned unsat :5 sat :1
[2023-03-08 10:11:53] [INFO ] After 56ms SMT Verify possible using trap constraints in natural domain returned unsat :5 sat :1
Attempting to minimize the solution found.
Minimization took 39 ms.
[2023-03-08 10:11:53] [INFO ] After 260ms SMT Verify possible using all constraints in natural domain returned unsat :5 sat :1
FORMULA DLCround-PT-03a-ReachabilityCardinality-13 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-03a-ReachabilityCardinality-12 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-03a-ReachabilityCardinality-11 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-03a-ReachabilityCardinality-05 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-03a-ReachabilityCardinality-02 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 6 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 3 ms.
Support contains 24 out of 113 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 113/113 places, 545/545 transitions.
Graph (trivial) has 54 edges and 113 vertex of which 8 / 113 are part of one of the 3 SCC in 2 ms
Free SCC test removed 5 places
Drop transitions removed 266 transitions
Reduce isomorphic transitions removed 266 transitions.
Drop transitions removed 6 transitions
Trivial Post-agglo rules discarded 6 transitions
Performed 6 trivial Post agglomeration. Transition count delta: 6
Iterating post reduction 0 with 6 rules applied. Total rules applied 7 place count 108 transition count 273
Reduce places removed 6 places and 0 transitions.
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 15 place count 102 transition count 271
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 15 place count 102 transition count 269
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 19 place count 100 transition count 269
Discarding 20 places :
Symmetric choice reduction at 2 with 20 rule applications. Total rules 39 place count 80 transition count 242
Iterating global reduction 2 with 20 rules applied. Total rules applied 59 place count 80 transition count 242
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 2 with 9 rules applied. Total rules applied 68 place count 80 transition count 233
Performed 7 Post agglomeration using F-continuation condition.Transition count delta: 7
Deduced a syphon composed of 7 places in 0 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 3 with 14 rules applied. Total rules applied 82 place count 73 transition count 226
Drop transitions removed 38 transitions
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 46 transitions.
Iterating post reduction 3 with 46 rules applied. Total rules applied 128 place count 73 transition count 180
Drop transitions removed 43 transitions
Redundant transition composition rules discarded 43 transitions
Iterating global reduction 4 with 43 rules applied. Total rules applied 171 place count 73 transition count 137
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 4 with 2 rules applied. Total rules applied 173 place count 71 transition count 137
Discarding 8 places :
Symmetric choice reduction at 5 with 8 rule applications. Total rules 181 place count 63 transition count 114
Iterating global reduction 5 with 8 rules applied. Total rules applied 189 place count 63 transition count 114
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 5 with 4 rules applied. Total rules applied 193 place count 61 transition count 112
Free-agglomeration rule applied 4 times.
Iterating global reduction 5 with 4 rules applied. Total rules applied 197 place count 61 transition count 108
Reduce places removed 4 places and 0 transitions.
Drop transitions removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 5 with 15 rules applied. Total rules applied 212 place count 57 transition count 97
Applied a total of 212 rules in 73 ms. Remains 57 /113 variables (removed 56) and now considering 97/545 (removed 448) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 73 ms. Remains : 57/113 places, 97/545 transitions.
Finished random walk after 893 steps, including 0 resets, run visited all 1 properties in 4 ms. (steps per millisecond=223 )
FORMULA DLCround-PT-03a-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
All properties solved without resorting to model-checking.
Total runtime 1477 ms.
starting LoLA
BK_INPUT DLCround-PT-03a
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA DLCround-PT-03a-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03a-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03a-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03a-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03a-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03a-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03a-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03a-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03a-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03a-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03a-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03a-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03a-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03a-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03a-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-03a-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678270315324

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 50 (type SKEL/FNDP) for 0 DLCround-PT-03a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/EQUN) for 0 DLCround-PT-03a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 0 DLCround-PT-03a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/SRCH) for 0 DLCround-PT-03a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 53 (type SKEL/SRCH) for DLCround-PT-03a-ReachabilityCardinality-00
lola: result : false
lola: markings : 11
lola: fired transitions : 40
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 50 (type FNDP) for DLCround-PT-03a-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 51 (type EQUN) for DLCround-PT-03a-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 54 (type SRCH) for DLCround-PT-03a-ReachabilityCardinality-00 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 58 (type SKEL/FNDP) for 12 DLCround-PT-03a-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/EQUN) for 12 DLCround-PT-03a-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SKEL/SRCH) for 12 DLCround-PT-03a-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SKEL/SRCH) for 12 DLCround-PT-03a-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 62 (type SKEL/SRCH) for DLCround-PT-03a-ReachabilityCardinality-04
lola: result : false
lola: markings : 65
lola: fired transitions : 148
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 61 (type SKEL/SRCH) for DLCround-PT-03a-ReachabilityCardinality-04
lola: result : false
lola: markings : 8
lola: fired transitions : 17
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 58 (type FNDP) for DLCround-PT-03a-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 59 (type EQUN) for DLCround-PT-03a-ReachabilityCardinality-04 (obsolete)
lola: FINISHED task # 58 (type SKEL/FNDP) for DLCround-PT-03a-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 3101
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: planning for DLCround-PT-03a-ReachabilityCardinality-00 stopped (result already fixed).
lola: planning for DLCround-PT-03a-ReachabilityCardinality-04 stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 34 (type CNST) for 33 DLCround-PT-03a-ReachabilityCardinality-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 34 (type CNST) for DLCround-PT-03a-ReachabilityCardinality-11
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH INITIAL
lola: LAUNCH task # 16 (type CNST) for 15 DLCround-PT-03a-ReachabilityCardinality-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 77 (type EXCL) for 30 DLCround-PT-03a-ReachabilityCardinality-10
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 73 (type FNDP) for 30 DLCround-PT-03a-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type EQUN) for 30 DLCround-PT-03a-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 77 (type EXCL) for DLCround-PT-03a-ReachabilityCardinality-10
lola: result : false
lola: markings : 3
lola: fired transitions : 16
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 73 (type FNDP) for DLCround-PT-03a-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 74 (type EQUN) for DLCround-PT-03a-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 66 (type SKEL/FNDP) for 18 DLCround-PT-03a-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SKEL/EQUN) for 18 DLCround-PT-03a-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SKEL/SRCH) for 18 DLCround-PT-03a-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 16 (type CNST) for DLCround-PT-03a-ReachabilityCardinality-05
lola: result : false
lola: LAUNCH task # 70 (type SKEL/SRCH) for 18 DLCround-PT-03a-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-59.sara.
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic


lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-74.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 69 (type SKEL/SRCH) for DLCround-PT-03a-ReachabilityCardinality-06
lola: result : false
lola: markings : 11
lola: fired transitions : 40
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 66 (type FNDP) for DLCround-PT-03a-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 67 (type EQUN) for DLCround-PT-03a-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 70 (type SRCH) for DLCround-PT-03a-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 84 (type EXCL) for 36 DLCround-PT-03a-ReachabilityCardinality-12
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 80 (type FNDP) for 36 DLCround-PT-03a-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type EQUN) for 36 DLCround-PT-03a-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type SRCH) for 36 DLCround-PT-03a-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 51 (type SKEL/EQUN) for DLCround-PT-03a-ReachabilityCardinality-00
lola: result : false
lola: FINISHED task # 59 (type SKEL/EQUN) for DLCround-PT-03a-ReachabilityCardinality-04
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-67.sara.
lola: FINISHED task # 83 (type SRCH) for DLCround-PT-03a-ReachabilityCardinality-12
lola: result : false
lola: markings : 5
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 80 (type FNDP) for DLCround-PT-03a-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 81 (type EQUN) for DLCround-PT-03a-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 84 (type EXCL) for DLCround-PT-03a-ReachabilityCardinality-12 (obsolete)

lola: FINISHED task # 74 (type EQUN) for DLCround-PT-03a-ReachabilityCardinality-10
lola: result : false
lola: planning for DLCround-PT-03a-ReachabilityCardinality-06 stopped (result already fixed).
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-81.sara.
sara: place or transition ordering is non-deterministic

lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 90 (type EXCL) for 6 DLCround-PT-03a-ReachabilityCardinality-02
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 86 (type FNDP) for 6 DLCround-PT-03a-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type EQUN) for 6 DLCround-PT-03a-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SRCH) for 6 DLCround-PT-03a-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 67 (type SKEL/EQUN) for DLCround-PT-03a-ReachabilityCardinality-06
lola: result : false
lola: FINISHED task # 90 (type EXCL) for DLCround-PT-03a-ReachabilityCardinality-02
lola: result : false
lola: markings : 12
lola: fired transitions : 35
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 86 (type FNDP) for DLCround-PT-03a-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 87 (type EQUN) for DLCround-PT-03a-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 89 (type SRCH) for DLCround-PT-03a-ReachabilityCardinality-02 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 112 (type EXCL) for 9 DLCround-PT-03a-ReachabilityCardinality-03
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 96 (type FNDP) for 42 DLCround-PT-03a-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 97 (type EQUN) for 42 DLCround-PT-03a-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 99 (type SRCH) for 42 DLCround-PT-03a-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 112 (type EXCL) for DLCround-PT-03a-ReachabilityCardinality-03
lola: result : false
lola: markings : 9
lola: fired transitions : 45
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 100 (type EXCL) for 42 DLCround-PT-03a-ReachabilityCardinality-14
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 81 (type EQUN) for DLCround-PT-03a-ReachabilityCardinality-12
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 100 (type EXCL) for DLCround-PT-03a-ReachabilityCardinality-14
lola: result : true
lola: markings : 73
lola: fired transitions : 326
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 96 (type FNDP) for DLCround-PT-03a-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 97 (type EQUN) for DLCround-PT-03a-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 99 (type SRCH) for DLCround-PT-03a-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 118 (type EXCL) for 21 DLCround-PT-03a-ReachabilityCardinality-07
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 95 (type SKEL/FNDP) for 3 DLCround-PT-03a-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 102 (type SKEL/EQUN) for 3 DLCround-PT-03a-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 104 (type SKEL/SRCH) for 3 DLCround-PT-03a-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-97.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 96 (type FNDP) for DLCround-PT-03a-ReachabilityCardinality-14
lola: result : true
lola: fired transitions : 31
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 118 (type EXCL) for DLCround-PT-03a-ReachabilityCardinality-07
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 124 (type EXCL) for 39 DLCround-PT-03a-ReachabilityCardinality-13
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 104 (type SKEL/SRCH) for DLCround-PT-03a-ReachabilityCardinality-01
lola: result : false
lola: markings : 11
lola: fired transitions : 40
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 124 (type EXCL) for DLCround-PT-03a-ReachabilityCardinality-13
lola: result : false
lola: markings : 3
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-102.sara.
lola: CANCELED task # 95 (type FNDP) for DLCround-PT-03a-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 102 (type EQUN) for DLCround-PT-03a-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 146 (type EXCL) for 45 DLCround-PT-03a-ReachabilityCardinality-15
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 137 (type FNDP) for 24 DLCround-PT-03a-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 141 (type EQUN) for 24 DLCround-PT-03a-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 149 (type SRCH) for 24 DLCround-PT-03a-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 102 (type SKEL/EQUN) for DLCround-PT-03a-ReachabilityCardinality-01
lola: result : unknown
lola: sara: place or transition ordering is non-deterministic
FINISHED task # 149 (type SRCH) for DLCround-PT-03a-ReachabilityCardinality-08
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 95 (type SKEL/FNDP) for DLCround-PT-03a-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 54
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 146 (type EXCL) for DLCround-PT-03a-ReachabilityCardinality-15
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 137 (type FNDP) for DLCround-PT-03a-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 141 (type EQUN) for DLCround-PT-03a-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 135 (type EXCL) for 27 DLCround-PT-03a-ReachabilityCardinality-09
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 131 (type FNDP) for 27 DLCround-PT-03a-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 132 (type EQUN) for 27 DLCround-PT-03a-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 134 (type SRCH) for 27 DLCround-PT-03a-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 135 (type EXCL) for DLCround-PT-03a-ReachabilityCardinality-09
lola: result : false
lola: markings : 118
lola: fired transitions : 600
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 131 (type FNDP) for DLCround-PT-03a-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 132 (type EQUN) for DLCround-PT-03a-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 134 (type SRCH) for DLCround-PT-03a-ReachabilityCardinality-09 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-03a-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
DLCround-PT-03a-ReachabilityCardinality-01: AG true skeleton: tandem / insertion
DLCround-PT-03a-ReachabilityCardinality-02: EF false tandem / relaxed
DLCround-PT-03a-ReachabilityCardinality-03: AG true tandem / relaxed
DLCround-PT-03a-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
DLCround-PT-03a-ReachabilityCardinality-05: INITIAL false preprocessing
DLCround-PT-03a-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
DLCround-PT-03a-ReachabilityCardinality-07: EF true tandem / relaxed
DLCround-PT-03a-ReachabilityCardinality-08: EF true tandem / insertion
DLCround-PT-03a-ReachabilityCardinality-09: AG true tandem / relaxed
DLCround-PT-03a-ReachabilityCardinality-10: AG true tandem / relaxed
DLCround-PT-03a-ReachabilityCardinality-11: INITIAL true preprocessing
DLCround-PT-03a-ReachabilityCardinality-12: AG true tandem / insertion
DLCround-PT-03a-ReachabilityCardinality-13: EF false tandem / relaxed
DLCround-PT-03a-ReachabilityCardinality-14: AG false tandem / relaxed
DLCround-PT-03a-ReachabilityCardinality-15: EF true tandem / relaxed


Time elapsed: 1 secs. Pages in use: 3
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-03a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCround-PT-03a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478500622"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-03a.tgz
mv DLCround-PT-03a execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;