About the Execution of LoLa+red for DLCround-PT-03a
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2313.300 | 87448.00 | 91661.00 | 668.60 | FTFFFFTTTTTFFTT? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478500618.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCround-PT-03a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478500618
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 580K
-rw-r--r-- 1 mcc users 6.2K Feb 25 18:27 CTLCardinality.txt
-rw-r--r-- 1 mcc users 69K Feb 25 18:27 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.7K Feb 25 18:23 CTLFireability.txt
-rw-r--r-- 1 mcc users 40K Feb 25 18:23 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 15:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 15:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 15:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.1K Feb 25 18:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 83K Feb 25 18:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 25 18:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 108K Feb 25 18:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 148K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-03a-CTLFireability-00
FORMULA_NAME DLCround-PT-03a-CTLFireability-01
FORMULA_NAME DLCround-PT-03a-CTLFireability-02
FORMULA_NAME DLCround-PT-03a-CTLFireability-03
FORMULA_NAME DLCround-PT-03a-CTLFireability-04
FORMULA_NAME DLCround-PT-03a-CTLFireability-05
FORMULA_NAME DLCround-PT-03a-CTLFireability-06
FORMULA_NAME DLCround-PT-03a-CTLFireability-07
FORMULA_NAME DLCround-PT-03a-CTLFireability-08
FORMULA_NAME DLCround-PT-03a-CTLFireability-09
FORMULA_NAME DLCround-PT-03a-CTLFireability-10
FORMULA_NAME DLCround-PT-03a-CTLFireability-11
FORMULA_NAME DLCround-PT-03a-CTLFireability-12
FORMULA_NAME DLCround-PT-03a-CTLFireability-13
FORMULA_NAME DLCround-PT-03a-CTLFireability-14
FORMULA_NAME DLCround-PT-03a-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678270169951
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-03a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 10:09:31] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 10:09:31] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 10:09:31] [INFO ] Load time of PNML (sax parser for PT used): 65 ms
[2023-03-08 10:09:31] [INFO ] Transformed 113 places.
[2023-03-08 10:09:31] [INFO ] Transformed 617 transitions.
[2023-03-08 10:09:31] [INFO ] Found NUPN structural information;
[2023-03-08 10:09:31] [INFO ] Parsed PT model containing 113 places and 617 transitions and 2269 arcs in 128 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 8 ms.
Initial state reduction rules removed 3 formulas.
Ensure Unique test removed 72 transitions
Reduce redundant transitions removed 72 transitions.
FORMULA DLCround-PT-03a-CTLFireability-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-03a-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-03a-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 64 out of 113 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 113/113 places, 545/545 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 109 transition count 517
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 109 transition count 517
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 9 place count 109 transition count 516
Drop transitions removed 158 transitions
Redundant transition composition rules discarded 158 transitions
Iterating global reduction 1 with 158 rules applied. Total rules applied 167 place count 109 transition count 358
Applied a total of 167 rules in 28 ms. Remains 109 /113 variables (removed 4) and now considering 358/545 (removed 187) transitions.
[2023-03-08 10:09:31] [INFO ] Flow matrix only has 101 transitions (discarded 257 similar events)
// Phase 1: matrix 101 rows 109 cols
[2023-03-08 10:09:31] [INFO ] Computed 52 place invariants in 7 ms
[2023-03-08 10:09:31] [INFO ] Implicit Places using invariants in 212 ms returned [66, 70, 71, 75, 79, 80, 82, 86, 89, 92, 99, 100, 105, 107, 108]
Discarding 15 places :
Ensure Unique test removed 52 transitions
Reduce isomorphic transitions removed 52 transitions.
Implicit Place search using SMT only with invariants took 235 ms to find 15 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 94/113 places, 306/545 transitions.
Drop transitions removed 167 transitions
Redundant transition composition rules discarded 167 transitions
Iterating global reduction 0 with 167 rules applied. Total rules applied 167 place count 94 transition count 139
Applied a total of 167 rules in 4 ms. Remains 94 /94 variables (removed 0) and now considering 139/306 (removed 167) transitions.
[2023-03-08 10:09:31] [INFO ] Flow matrix only has 101 transitions (discarded 38 similar events)
// Phase 1: matrix 101 rows 94 cols
[2023-03-08 10:09:31] [INFO ] Computed 37 place invariants in 2 ms
[2023-03-08 10:09:31] [INFO ] Implicit Places using invariants in 39 ms returned []
[2023-03-08 10:09:31] [INFO ] Flow matrix only has 101 transitions (discarded 38 similar events)
[2023-03-08 10:09:31] [INFO ] Invariant cache hit.
[2023-03-08 10:09:31] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-08 10:09:31] [INFO ] Implicit Places using invariants and state equation in 57 ms returned []
Implicit Place search using SMT with State Equation took 97 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 94/113 places, 139/545 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 365 ms. Remains : 94/113 places, 139/545 transitions.
Support contains 64 out of 94 places after structural reductions.
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 26 ms
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 10 ms
[2023-03-08 10:09:32] [INFO ] Input system was already deterministic with 139 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 254 ms. (steps per millisecond=39 ) properties (out of 45) seen :43
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 2) seen :1
Finished Best-First random walk after 4621 steps, including 1 resets, run visited all 1 properties in 14 ms. (steps per millisecond=330 )
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 6 ms
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 6 ms
[2023-03-08 10:09:32] [INFO ] Input system was already deterministic with 139 transitions.
Computed a total of 30 stabilizing places and 1 stable transitions
Graph (complete) has 184 edges and 94 vertex of which 69 are kept as prefixes of interest. Removing 25 places using SCC suffix rule.1 ms
Starting structural reductions in SI_CTL mode, iteration 0 : 94/94 places, 139/139 transitions.
Graph (trivial) has 72 edges and 94 vertex of which 24 / 94 are part of one of the 5 SCC in 3 ms
Free SCC test removed 19 places
Ensure Unique test removed 40 transitions
Reduce isomorphic transitions removed 40 transitions.
Graph (complete) has 144 edges and 75 vertex of which 59 are kept as prefixes of interest. Removing 16 places using SCC suffix rule.0 ms
Discarding 16 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 59 transition count 98
Reduce places removed 1 places and 0 transitions.
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Iterating post reduction 1 with 6 rules applied. Total rules applied 9 place count 58 transition count 93
Reduce places removed 5 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 6 rules applied. Total rules applied 15 place count 53 transition count 92
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 21 place count 47 transition count 82
Iterating global reduction 3 with 6 rules applied. Total rules applied 27 place count 47 transition count 82
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 3 with 2 rules applied. Total rules applied 29 place count 47 transition count 80
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 2 rules applied. Total rules applied 31 place count 46 transition count 79
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 5 with 3 rules applied. Total rules applied 34 place count 46 transition count 76
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 5 with 1 rules applied. Total rules applied 35 place count 46 transition count 76
Discarding 1 places :
Symmetric choice reduction at 5 with 1 rule applications. Total rules 36 place count 45 transition count 75
Iterating global reduction 5 with 1 rules applied. Total rules applied 37 place count 45 transition count 75
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 38 place count 45 transition count 74
Applied a total of 38 rules in 31 ms. Remains 45 /94 variables (removed 49) and now considering 74/139 (removed 65) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 31 ms. Remains : 45/94 places, 74/139 transitions.
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 2 ms
[2023-03-08 10:09:32] [INFO ] Input system was already deterministic with 74 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 94/94 places, 139/139 transitions.
Graph (trivial) has 109 edges and 94 vertex of which 48 / 94 are part of one of the 7 SCC in 0 ms
Free SCC test removed 41 places
Ensure Unique test removed 92 transitions
Reduce isomorphic transitions removed 92 transitions.
Graph (complete) has 91 edges and 53 vertex of which 32 are kept as prefixes of interest. Removing 21 places using SCC suffix rule.1 ms
Discarding 21 places :
Also discarding 0 output transitions
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 32 transition count 45
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 6 place count 30 transition count 45
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 13 place count 23 transition count 37
Iterating global reduction 2 with 7 rules applied. Total rules applied 20 place count 23 transition count 37
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 2 with 2 rules applied. Total rules applied 22 place count 23 transition count 35
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 23 place count 22 transition count 35
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 24 place count 21 transition count 34
Iterating global reduction 3 with 1 rules applied. Total rules applied 25 place count 21 transition count 34
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 26 place count 21 transition count 34
Applied a total of 26 rules in 14 ms. Remains 21 /94 variables (removed 73) and now considering 34/139 (removed 105) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 21/94 places, 34/139 transitions.
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 2 ms
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:09:32] [INFO ] Input system was already deterministic with 34 transitions.
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 139/139 transitions.
Reduce places removed 23 places and 0 transitions.
Iterating post reduction 0 with 23 rules applied. Total rules applied 23 place count 71 transition count 139
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 37 place count 57 transition count 113
Iterating global reduction 1 with 14 rules applied. Total rules applied 51 place count 57 transition count 113
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 54 place count 57 transition count 110
Applied a total of 54 rules in 4 ms. Remains 57 /94 variables (removed 37) and now considering 110/139 (removed 29) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 57/94 places, 110/139 transitions.
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:09:32] [INFO ] Input system was already deterministic with 110 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 94/94 places, 139/139 transitions.
Graph (trivial) has 128 edges and 94 vertex of which 60 / 94 are part of one of the 8 SCC in 0 ms
Free SCC test removed 52 places
Ensure Unique test removed 117 transitions
Reduce isomorphic transitions removed 117 transitions.
Graph (complete) has 66 edges and 42 vertex of which 18 are kept as prefixes of interest. Removing 24 places using SCC suffix rule.0 ms
Discarding 24 places :
Also discarding 0 output transitions
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 18 transition count 21
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 4 place count 17 transition count 21
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 11 place count 10 transition count 14
Iterating global reduction 2 with 7 rules applied. Total rules applied 18 place count 10 transition count 14
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 2 with 2 rules applied. Total rules applied 20 place count 10 transition count 12
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 21 place count 9 transition count 12
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 22 place count 8 transition count 11
Iterating global reduction 3 with 1 rules applied. Total rules applied 23 place count 8 transition count 11
Applied a total of 23 rules in 3 ms. Remains 8 /94 variables (removed 86) and now considering 11/139 (removed 128) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 8/94 places, 11/139 transitions.
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 0 ms
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 0 ms
[2023-03-08 10:09:32] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 139/139 transitions.
Reduce places removed 23 places and 0 transitions.
Iterating post reduction 0 with 23 rules applied. Total rules applied 23 place count 71 transition count 139
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 37 place count 57 transition count 114
Iterating global reduction 1 with 14 rules applied. Total rules applied 51 place count 57 transition count 114
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 53 place count 57 transition count 112
Applied a total of 53 rules in 3 ms. Remains 57 /94 variables (removed 37) and now considering 112/139 (removed 27) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 57/94 places, 112/139 transitions.
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:09:32] [INFO ] Input system was already deterministic with 112 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 94/94 places, 139/139 transitions.
Graph (trivial) has 122 edges and 94 vertex of which 58 / 94 are part of one of the 8 SCC in 1 ms
Free SCC test removed 50 places
Ensure Unique test removed 112 transitions
Reduce isomorphic transitions removed 112 transitions.
Graph (complete) has 71 edges and 44 vertex of which 23 are kept as prefixes of interest. Removing 21 places using SCC suffix rule.1 ms
Discarding 21 places :
Also discarding 0 output transitions
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 8 place count 17 transition count 21
Iterating global reduction 0 with 6 rules applied. Total rules applied 14 place count 17 transition count 21
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 15 place count 17 transition count 20
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 16 place count 16 transition count 20
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 17 place count 15 transition count 19
Iterating global reduction 1 with 1 rules applied. Total rules applied 18 place count 15 transition count 19
Applied a total of 18 rules in 4 ms. Remains 15 /94 variables (removed 79) and now considering 19/139 (removed 120) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 15/94 places, 19/139 transitions.
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:09:32] [INFO ] Input system was already deterministic with 19 transitions.
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 139/139 transitions.
Reduce places removed 21 places and 0 transitions.
Iterating post reduction 0 with 21 rules applied. Total rules applied 21 place count 73 transition count 139
Discarding 13 places :
Symmetric choice reduction at 1 with 13 rule applications. Total rules 34 place count 60 transition count 116
Iterating global reduction 1 with 13 rules applied. Total rules applied 47 place count 60 transition count 116
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 49 place count 60 transition count 114
Applied a total of 49 rules in 3 ms. Remains 60 /94 variables (removed 34) and now considering 114/139 (removed 25) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 60/94 places, 114/139 transitions.
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:09:32] [INFO ] Input system was already deterministic with 114 transitions.
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 139/139 transitions.
Reduce places removed 24 places and 0 transitions.
Iterating post reduction 0 with 24 rules applied. Total rules applied 24 place count 70 transition count 139
Discarding 13 places :
Symmetric choice reduction at 1 with 13 rule applications. Total rules 37 place count 57 transition count 115
Iterating global reduction 1 with 13 rules applied. Total rules applied 50 place count 57 transition count 115
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 53 place count 57 transition count 112
Applied a total of 53 rules in 3 ms. Remains 57 /94 variables (removed 37) and now considering 112/139 (removed 27) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 57/94 places, 112/139 transitions.
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:09:32] [INFO ] Input system was already deterministic with 112 transitions.
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 139/139 transitions.
Reduce places removed 22 places and 0 transitions.
Iterating post reduction 0 with 22 rules applied. Total rules applied 22 place count 72 transition count 139
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 36 place count 58 transition count 114
Iterating global reduction 1 with 14 rules applied. Total rules applied 50 place count 58 transition count 114
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 53 place count 58 transition count 111
Applied a total of 53 rules in 3 ms. Remains 58 /94 variables (removed 36) and now considering 111/139 (removed 28) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 58/94 places, 111/139 transitions.
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:09:32] [INFO ] Input system was already deterministic with 111 transitions.
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 139/139 transitions.
Reduce places removed 25 places and 0 transitions.
Iterating post reduction 0 with 25 rules applied. Total rules applied 25 place count 69 transition count 139
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 39 place count 55 transition count 114
Iterating global reduction 1 with 14 rules applied. Total rules applied 53 place count 55 transition count 114
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 56 place count 55 transition count 111
Applied a total of 56 rules in 3 ms. Remains 55 /94 variables (removed 39) and now considering 111/139 (removed 28) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 55/94 places, 111/139 transitions.
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 2 ms
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:09:32] [INFO ] Input system was already deterministic with 111 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 94/94 places, 139/139 transitions.
Graph (trivial) has 75 edges and 94 vertex of which 25 / 94 are part of one of the 4 SCC in 0 ms
Free SCC test removed 21 places
Ensure Unique test removed 47 transitions
Reduce isomorphic transitions removed 47 transitions.
Graph (complete) has 137 edges and 73 vertex of which 57 are kept as prefixes of interest. Removing 16 places using SCC suffix rule.1 ms
Discarding 16 places :
Also discarding 0 output transitions
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 5 place count 57 transition count 89
Reduce places removed 3 places and 0 transitions.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Iterating post reduction 1 with 6 rules applied. Total rules applied 11 place count 54 transition count 86
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 15 place count 51 transition count 85
Discarding 7 places :
Symmetric choice reduction at 3 with 7 rule applications. Total rules 22 place count 44 transition count 75
Iterating global reduction 3 with 7 rules applied. Total rules applied 29 place count 44 transition count 75
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 3 with 2 rules applied. Total rules applied 31 place count 44 transition count 73
Partial Post-agglomeration rule applied 4 times.
Drop transitions removed 4 transitions
Iterating global reduction 3 with 4 rules applied. Total rules applied 35 place count 44 transition count 73
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 37 place count 42 transition count 71
Iterating global reduction 3 with 2 rules applied. Total rules applied 39 place count 42 transition count 71
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 41 place count 42 transition count 69
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 4 with 2 rules applied. Total rules applied 43 place count 42 transition count 67
Applied a total of 43 rules in 12 ms. Remains 42 /94 variables (removed 52) and now considering 67/139 (removed 72) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 42/94 places, 67/139 transitions.
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 2 ms
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 2 ms
[2023-03-08 10:09:32] [INFO ] Input system was already deterministic with 67 transitions.
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 139/139 transitions.
Reduce places removed 22 places and 0 transitions.
Iterating post reduction 0 with 22 rules applied. Total rules applied 22 place count 72 transition count 139
Discarding 13 places :
Symmetric choice reduction at 1 with 13 rule applications. Total rules 35 place count 59 transition count 116
Iterating global reduction 1 with 13 rules applied. Total rules applied 48 place count 59 transition count 116
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 50 place count 59 transition count 114
Applied a total of 50 rules in 2 ms. Remains 59 /94 variables (removed 35) and now considering 114/139 (removed 25) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 59/94 places, 114/139 transitions.
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:09:32] [INFO ] Input system was already deterministic with 114 transitions.
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 139/139 transitions.
Reduce places removed 18 places and 0 transitions.
Iterating post reduction 0 with 18 rules applied. Total rules applied 18 place count 76 transition count 139
Discarding 13 places :
Symmetric choice reduction at 1 with 13 rule applications. Total rules 31 place count 63 transition count 116
Iterating global reduction 1 with 13 rules applied. Total rules applied 44 place count 63 transition count 116
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 46 place count 63 transition count 114
Applied a total of 46 rules in 3 ms. Remains 63 /94 variables (removed 31) and now considering 114/139 (removed 25) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 63/94 places, 114/139 transitions.
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:09:32] [INFO ] Input system was already deterministic with 114 transitions.
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 5 ms
[2023-03-08 10:09:32] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:09:32] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-08 10:09:32] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 94 places, 139 transitions and 322 arcs took 1 ms.
Total runtime 1493 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DLCround-PT-03a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/366
CTLFireability
FORMULA DLCround-PT-03a-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-03a-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-03a-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-03a-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-03a-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-03a-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-03a-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-03a-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-03a-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-03a-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-03a-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-03a-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678270257399
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/366/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/366/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/366/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 11 (type EXCL) for 6 DLCround-PT-03a-CTLFireability-02
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 11 (type EXCL) for DLCround-PT-03a-CTLFireability-02
lola: result : false
lola: markings : 6
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 36 (type EXCL) for 35 DLCround-PT-03a-CTLFireability-11
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 36 (type EXCL) for DLCround-PT-03a-CTLFireability-11
lola: result : false
lola: markings : 16824
lola: fired transitions : 75268
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 45 (type EXCL) for 44 DLCround-PT-03a-CTLFireability-15
lola: time limit : 276 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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FINAL RESULTS
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-03a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCround-PT-03a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478500618"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-03a.tgz
mv DLCround-PT-03a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;