About the Execution of LoLa+red for DLCflexbar-PT-7a
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 3243.216 | 216147.00 | 335022.00 | 502.30 | FTFFFFFTFTTFFTFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478500590.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCflexbar-PT-7a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478500590
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 6.7M
-rw-r--r-- 1 mcc users 7.8K Feb 25 20:42 CTLCardinality.txt
-rw-r--r-- 1 mcc users 89K Feb 25 20:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 25 18:50 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 25 18:50 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 15:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 15:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Feb 26 03:33 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 175K Feb 26 03:33 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 00:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 91K Feb 26 00:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 6.2M Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-7a-ReachabilityCardinality-00
FORMULA_NAME DLCflexbar-PT-7a-ReachabilityCardinality-01
FORMULA_NAME DLCflexbar-PT-7a-ReachabilityCardinality-02
FORMULA_NAME DLCflexbar-PT-7a-ReachabilityCardinality-03
FORMULA_NAME DLCflexbar-PT-7a-ReachabilityCardinality-04
FORMULA_NAME DLCflexbar-PT-7a-ReachabilityCardinality-05
FORMULA_NAME DLCflexbar-PT-7a-ReachabilityCardinality-06
FORMULA_NAME DLCflexbar-PT-7a-ReachabilityCardinality-07
FORMULA_NAME DLCflexbar-PT-7a-ReachabilityCardinality-08
FORMULA_NAME DLCflexbar-PT-7a-ReachabilityCardinality-09
FORMULA_NAME DLCflexbar-PT-7a-ReachabilityCardinality-10
FORMULA_NAME DLCflexbar-PT-7a-ReachabilityCardinality-11
FORMULA_NAME DLCflexbar-PT-7a-ReachabilityCardinality-12
FORMULA_NAME DLCflexbar-PT-7a-ReachabilityCardinality-13
FORMULA_NAME DLCflexbar-PT-7a-ReachabilityCardinality-14
FORMULA_NAME DLCflexbar-PT-7a-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1678265515184
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCflexbar-PT-7a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 08:51:56] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-08 08:51:56] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 08:51:57] [INFO ] Load time of PNML (sax parser for PT used): 831 ms
[2023-03-08 08:51:57] [INFO ] Transformed 2913 places.
[2023-03-08 08:51:57] [INFO ] Transformed 23319 transitions.
[2023-03-08 08:51:57] [INFO ] Found NUPN structural information;
[2023-03-08 08:51:57] [INFO ] Parsed PT model containing 2913 places and 23319 transitions and 92260 arcs in 992 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 22 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 2519 transitions
Reduce redundant transitions removed 2519 transitions.
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 931 ms. (steps per millisecond=10 ) properties (out of 14) seen :3
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-09 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-03 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 336 ms. (steps per millisecond=29 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 335 ms. (steps per millisecond=29 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 351 ms. (steps per millisecond=28 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 326 ms. (steps per millisecond=30 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 330 ms. (steps per millisecond=30 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 325 ms. (steps per millisecond=30 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 321 ms. (steps per millisecond=31 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 339 ms. (steps per millisecond=29 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 363 ms. (steps per millisecond=27 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 345 ms. (steps per millisecond=28 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 328 ms. (steps per millisecond=30 ) properties (out of 11) seen :0
Running SMT prover for 11 properties.
[2023-03-08 08:52:02] [INFO ] Flow matrix only has 1246 transitions (discarded 19554 similar events)
// Phase 1: matrix 1246 rows 2913 cols
[2023-03-08 08:52:02] [INFO ] Computed 2171 place invariants in 30 ms
[2023-03-08 08:52:05] [INFO ] [Real]Absence check using 2171 positive place invariants in 763 ms returned sat
[2023-03-08 08:52:05] [INFO ] After 1945ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:10
[2023-03-08 08:52:06] [INFO ] [Nat]Absence check using 2171 positive place invariants in 826 ms returned sat
[2023-03-08 08:52:06] [INFO ] After 1779ms SMT Verify possible using all constraints in natural domain returned unsat :11 sat :0
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-15 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-14 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-13 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-11 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-08 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-05 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-04 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-01 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-00 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 11 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 10167 ms.
starting LoLA
BK_INPUT DLCflexbar-PT-7a
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-7a-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678265731331
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 49 (type SKEL/FNDP) for 0 DLCflexbar-PT-7a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type SKEL/EQUN) for 0 DLCflexbar-PT-7a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SKEL/SRCH) for 0 DLCflexbar-PT-7a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 0 DLCflexbar-PT-7a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 52 (type SKEL/SRCH) for DLCflexbar-PT-7a-ReachabilityCardinality-00
lola: result : false
lola: markings : 7
lola: fired transitions : 26
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for DLCflexbar-PT-7a-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 50 (type EQUN) for DLCflexbar-PT-7a-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 53 (type SRCH) for DLCflexbar-PT-7a-ReachabilityCardinality-00 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 50 (type SKEL/EQUN) for DLCflexbar-PT-7a-ReachabilityCardinality-00
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 37 (type CNST) for 36 DLCflexbar-PT-7a-ReachabilityCardinality-12
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 40 (type CNST) for 39 DLCflexbar-PT-7a-ReachabilityCardinality-13
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: Rule S: 0 transitions removed,0 places removed
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 40 (type CNST) for DLCflexbar-PT-7a-ReachabilityCardinality-13
lola: result : true
lola: FINISHED task # 37 (type CNST) for DLCflexbar-PT-7a-ReachabilityCardinality-12
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 57 (type SKEL/FNDP) for 3 DLCflexbar-PT-7a-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN) for 3 DLCflexbar-PT-7a-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/SRCH) for 3 DLCflexbar-PT-7a-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SKEL/SRCH) for 3 DLCflexbar-PT-7a-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 60 (type SKEL/SRCH) for DLCflexbar-PT-7a-ReachabilityCardinality-01
lola: result : false
lola: markings : 7
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 57 (type FNDP) for DLCflexbar-PT-7a-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 58 (type EQUN) for DLCflexbar-PT-7a-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 61 (type SRCH) for DLCflexbar-PT-7a-ReachabilityCardinality-01 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-58.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 58 (type SKEL/EQUN) for DLCflexbar-PT-7a-ReachabilityCardinality-01
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 65 (type SKEL/FNDP) for 21 DLCflexbar-PT-7a-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SKEL/EQUN) for 21 DLCflexbar-PT-7a-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 68 (type SKEL/SRCH) for 21 DLCflexbar-PT-7a-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SKEL/SRCH) for 21 DLCflexbar-PT-7a-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 68 (type SKEL/SRCH) for DLCflexbar-PT-7a-ReachabilityCardinality-07
lola: result : false
lola: markings : 325
lola: fired transitions : 6583
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 65 (type FNDP) for DLCflexbar-PT-7a-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 66 (type EQUN) for DLCflexbar-PT-7a-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 69 (type SRCH) for DLCflexbar-PT-7a-ReachabilityCardinality-07 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-66.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-7a-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
DLCflexbar-PT-7a-ReachabilityCardinality-01: AG true skeleton: tandem / insertion
DLCflexbar-PT-7a-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
DLCflexbar-PT-7a-ReachabilityCardinality-12: INITIAL false preprocessing
DLCflexbar-PT-7a-ReachabilityCardinality-13: INITIAL true preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-7a-ReachabilityCardinality-02: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-7a-ReachabilityCardinality-03: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-7a-ReachabilityCardinality-04: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-7a-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-7a-ReachabilityCardinality-06: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-7a-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-7a-ReachabilityCardinality-09: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-7a-ReachabilityCardinality-10: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-7a-ReachabilityCardinality-11: INITIAL 0 0 0 0 0 0 0 0
DLCflexbar-PT-7a-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-7a-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 171 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-7a-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-87.sara.
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
121 EF FNDP 0/1702 0/5 DLCflexbar-PT-7a-ReachabilityCardinality-10 --
122 EF STEQ 0/3404 0/5 DLCflexbar-PT-7a-ReachabilityCardinality-10 sara not yet started (preprocessing).
124 EF SRCH 0/3404 0/5 DLCflexbar-PT-7a-ReachabilityCardinality-10 --
125 EF SRCH 0/3404 0/5 DLCflexbar-PT-7a-ReachabilityCardinality-10 --
Time elapsed: 196 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 121 (type SKEL/FNDP) for DLCflexbar-PT-7a-ReachabilityCardinality-10
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 122 (type EQUN) for DLCflexbar-PT-7a-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 124 (type SRCH) for DLCflexbar-PT-7a-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 125 (type SRCH) for DLCflexbar-PT-7a-ReachabilityCardinality-10 (obsolete)
lola: FINISHED task # 102 (type SKEL/EQUN) for DLCflexbar-PT-7a-ReachabilityCardinality-04
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-122.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 131 (type EXCL) for 42 DLCflexbar-PT-7a-ReachabilityCardinality-14
lola: time limit : 680 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 127 (type FNDP) for 42 DLCflexbar-PT-7a-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 128 (type EQUN) for 42 DLCflexbar-PT-7a-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 130 (type SRCH) for 42 DLCflexbar-PT-7a-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 130 (type SRCH) for DLCflexbar-PT-7a-ReachabilityCardinality-14
lola: result : false
lola: markings : 343
lola: fired transitions : 3154
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 127 (type FNDP) for DLCflexbar-PT-7a-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 128 (type EQUN) for DLCflexbar-PT-7a-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 131 (type EXCL) for DLCflexbar-PT-7a-ReachabilityCardinality-14 (obsolete)
lola: FINISHED task # 127 (type FNDP) for DLCflexbar-PT-7a-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 673
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-128.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 128 (type EQUN) for DLCflexbar-PT-7a-ReachabilityCardinality-14
lola: result : false
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-7a-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
DLCflexbar-PT-7a-ReachabilityCardinality-01: AG true skeleton: tandem / insertion
DLCflexbar-PT-7a-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
DLCflexbar-PT-7a-ReachabilityCardinality-04: EF false skeleton: tandem / relaxed
DLCflexbar-PT-7a-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
DLCflexbar-PT-7a-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
DLCflexbar-PT-7a-ReachabilityCardinality-08: EF false skeleton: tandem / relaxed
DLCflexbar-PT-7a-ReachabilityCardinality-09: EF true tandem / insertion
DLCflexbar-PT-7a-ReachabilityCardinality-11: INITIAL false preprocessing
DLCflexbar-PT-7a-ReachabilityCardinality-12: INITIAL false preprocessing
DLCflexbar-PT-7a-ReachabilityCardinality-13: INITIAL true preprocessing
DLCflexbar-PT-7a-ReachabilityCardinality-14: EF false tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-7a-ReachabilityCardinality-03: AG 0 0 0 0 2 0 0 3
DLCflexbar-PT-7a-ReachabilityCardinality-06: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-7a-ReachabilityCardinality-10: EF 0 0 0 0 1 0 0 4
DLCflexbar-PT-7a-ReachabilityCardinality-15: AG 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 201 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 138 (type EXCL) for 9 DLCflexbar-PT-7a-ReachabilityCardinality-03
lola: time limit : 849 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 134 (type FNDP) for 9 DLCflexbar-PT-7a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 135 (type EQUN) for 9 DLCflexbar-PT-7a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 137 (type SRCH) for 9 DLCflexbar-PT-7a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 137 (type SRCH) for DLCflexbar-PT-7a-ReachabilityCardinality-03
lola: result : true
lola: markings : 7
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 134 (type FNDP) for DLCflexbar-PT-7a-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 135 (type EQUN) for DLCflexbar-PT-7a-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 138 (type EXCL) for DLCflexbar-PT-7a-ReachabilityCardinality-03 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 134 (type FNDP) for DLCflexbar-PT-7a-ReachabilityCardinality-03
lola: result : true
lola: fired transitions : 7
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-135.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
lola: planning for DLCflexbar-PT-7a-ReachabilityCardinality-05 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 144 (type EXCL) for 30 DLCflexbar-PT-7a-ReachabilityCardinality-10
lola: time limit : 1132 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 140 (type FNDP) for 30 DLCflexbar-PT-7a-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 141 (type EQUN) for 30 DLCflexbar-PT-7a-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 143 (type SRCH) for 30 DLCflexbar-PT-7a-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 143 (type SRCH) for DLCflexbar-PT-7a-ReachabilityCardinality-10
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 140 (type FNDP) for DLCflexbar-PT-7a-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 141 (type EQUN) for DLCflexbar-PT-7a-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 144 (type EXCL) for DLCflexbar-PT-7a-ReachabilityCardinality-10 (obsolete)
lola: FINISHED task # 140 (type FNDP) for DLCflexbar-PT-7a-ReachabilityCardinality-10
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: planning for DLCflexbar-PT-7a-ReachabilityCardinality-08 stopped (result already fixed).
lola: planning for DLCflexbar-PT-7a-ReachabilityCardinality-04 stopped (result already fixed).
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-141.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 151 (type EXCL) for 45 DLCflexbar-PT-7a-ReachabilityCardinality-15
lola: time limit : 1698 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 147 (type FNDP) for 45 DLCflexbar-PT-7a-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 148 (type EQUN) for 45 DLCflexbar-PT-7a-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 150 (type SRCH) for 45 DLCflexbar-PT-7a-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 150 (type SRCH) for DLCflexbar-PT-7a-ReachabilityCardinality-15
lola: result : false
lola: markings : 3
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 147 (type FNDP) for DLCflexbar-PT-7a-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 148 (type EQUN) for DLCflexbar-PT-7a-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 151 (type EXCL) for DLCflexbar-PT-7a-ReachabilityCardinality-15 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 157 (type EXCL) for 18 DLCflexbar-PT-7a-ReachabilityCardinality-06
lola: time limit : 3396 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 153 (type FNDP) for 18 DLCflexbar-PT-7a-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 154 (type EQUN) for 18 DLCflexbar-PT-7a-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 156 (type SRCH) for 18 DLCflexbar-PT-7a-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 156 (type SRCH) for DLCflexbar-PT-7a-ReachabilityCardinality-06
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 153 (type FNDP) for DLCflexbar-PT-7a-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 154 (type EQUN) for DLCflexbar-PT-7a-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 157 (type EXCL) for DLCflexbar-PT-7a-ReachabilityCardinality-06 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-7a-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
DLCflexbar-PT-7a-ReachabilityCardinality-01: AG true skeleton: tandem / insertion
DLCflexbar-PT-7a-ReachabilityCardinality-02: EF false skeleton: tandem / relaxed
DLCflexbar-PT-7a-ReachabilityCardinality-03: AG false tandem / insertion
DLCflexbar-PT-7a-ReachabilityCardinality-04: EF false skeleton: tandem / relaxed
DLCflexbar-PT-7a-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
DLCflexbar-PT-7a-ReachabilityCardinality-06: EF false tandem / insertion
DLCflexbar-PT-7a-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
DLCflexbar-PT-7a-ReachabilityCardinality-08: EF false skeleton: tandem / relaxed
DLCflexbar-PT-7a-ReachabilityCardinality-09: EF true tandem / insertion
DLCflexbar-PT-7a-ReachabilityCardinality-10: EF true tandem / insertion
DLCflexbar-PT-7a-ReachabilityCardinality-11: INITIAL false preprocessing
DLCflexbar-PT-7a-ReachabilityCardinality-12: INITIAL false preprocessing
DLCflexbar-PT-7a-ReachabilityCardinality-13: INITIAL true preprocessing
DLCflexbar-PT-7a-ReachabilityCardinality-14: EF false tandem / insertion
DLCflexbar-PT-7a-ReachabilityCardinality-15: AG true tandem / insertion
Time elapsed: 204 secs. Pages in use: 3
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-7a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCflexbar-PT-7a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478500590"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-7a.tgz
mv DLCflexbar-PT-7a execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;