About the Execution of LoLa+red for DLCflexbar-PT-6a
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 6444.747 | 835292.00 | 845139.00 | 3242.90 | F?T?TFFT??FTT?FT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478500570.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCflexbar-PT-6a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478500570
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 4.6M
-rw-r--r-- 1 mcc users 6.2K Feb 25 17:21 CTLCardinality.txt
-rw-r--r-- 1 mcc users 66K Feb 25 17:21 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.6K Feb 25 16:41 CTLFireability.txt
-rw-r--r-- 1 mcc users 38K Feb 25 16:41 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 15:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Feb 25 15:51 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 15:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:51 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.8K Feb 25 20:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 88K Feb 25 20:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.5K Feb 25 18:33 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 71K Feb 25 18:33 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:51 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:51 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 4.2M Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-6a-CTLFireability-00
FORMULA_NAME DLCflexbar-PT-6a-CTLFireability-01
FORMULA_NAME DLCflexbar-PT-6a-CTLFireability-02
FORMULA_NAME DLCflexbar-PT-6a-CTLFireability-03
FORMULA_NAME DLCflexbar-PT-6a-CTLFireability-04
FORMULA_NAME DLCflexbar-PT-6a-CTLFireability-05
FORMULA_NAME DLCflexbar-PT-6a-CTLFireability-06
FORMULA_NAME DLCflexbar-PT-6a-CTLFireability-07
FORMULA_NAME DLCflexbar-PT-6a-CTLFireability-08
FORMULA_NAME DLCflexbar-PT-6a-CTLFireability-09
FORMULA_NAME DLCflexbar-PT-6a-CTLFireability-10
FORMULA_NAME DLCflexbar-PT-6a-CTLFireability-11
FORMULA_NAME DLCflexbar-PT-6a-CTLFireability-12
FORMULA_NAME DLCflexbar-PT-6a-CTLFireability-13
FORMULA_NAME DLCflexbar-PT-6a-CTLFireability-14
FORMULA_NAME DLCflexbar-PT-6a-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678261916600
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCflexbar-PT-6a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 07:51:58] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 07:51:58] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 07:51:58] [INFO ] Load time of PNML (sax parser for PT used): 376 ms
[2023-03-08 07:51:58] [INFO ] Transformed 2069 places.
[2023-03-08 07:51:58] [INFO ] Transformed 16077 transitions.
[2023-03-08 07:51:58] [INFO ] Found NUPN structural information;
[2023-03-08 07:51:58] [INFO ] Parsed PT model containing 2069 places and 16077 transitions and 63325 arcs in 496 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 22 ms.
Ensure Unique test removed 1760 transitions
Reduce redundant transitions removed 1760 transitions.
Support contains 144 out of 2069 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2069/2069 places, 14317/14317 transitions.
Discarding 163 places :
Symmetric choice reduction at 0 with 163 rule applications. Total rules 163 place count 1906 transition count 12262
Iterating global reduction 0 with 163 rules applied. Total rules applied 326 place count 1906 transition count 12262
Ensure Unique test removed 74 transitions
Reduce isomorphic transitions removed 74 transitions.
Iterating post reduction 0 with 74 rules applied. Total rules applied 400 place count 1906 transition count 12188
Drop transitions removed 4347 transitions
Redundant transition composition rules discarded 4347 transitions
Iterating global reduction 1 with 4347 rules applied. Total rules applied 4747 place count 1906 transition count 7841
Applied a total of 4747 rules in 1060 ms. Remains 1906 /2069 variables (removed 163) and now considering 7841/14317 (removed 6476) transitions.
[2023-03-08 07:52:00] [INFO ] Flow matrix only has 733 transitions (discarded 7108 similar events)
// Phase 1: matrix 733 rows 1906 cols
[2023-03-08 07:52:00] [INFO ] Computed 1492 place invariants in 26 ms
[2023-03-08 07:52:16] [INFO ] Implicit Places using invariants in 16745 ms returned [506, 507, 509, 510, 511, 512, 513, 514, 515, 516, 517, 518, 519, 520, 521, 522, 523, 524, 525, 526, 527, 531, 532, 533, 534, 535, 536, 537, 538, 539, 540, 541, 542, 543, 544, 545, 546, 547, 548, 549, 550, 551, 552, 553, 554, 555, 556, 557, 558, 559, 560, 561, 562, 563, 564, 565, 566, 567, 568, 570, 571, 572, 573, 574, 575, 576, 578, 579, 580, 581, 582, 583, 584, 585, 586, 587, 588, 589, 590, 591, 592, 593, 594, 595, 596, 597, 598, 599, 600, 601, 602, 603, 604, 605, 606, 607, 608, 609, 610, 611, 612, 613, 614, 615, 616, 617, 618, 619, 620, 621, 622, 623, 624, 625, 626, 627, 629, 630, 631, 632, 633, 634, 635, 636, 637, 638, 639, 640, 641, 642, 643, 644, 645, 646, 648, 649, 650, 651, 652, 653, 654, 655, 656, 657, 658, 659, 660, 661, 662, 663, 665, 666, 667, 668, 669, 670, 671, 672, 673, 674, 675, 676, 677, 678, 679, 680, 681, 682, 683, 684, 685, 686, 687, 688, 690, 691, 692, 693, 694, 695, 696, 697, 698, 700, 701, 702, 703, 704, 705, 706, 707, 708, 709, 710, 711, 712, 713, 714, 715, 716, 717, 718, 719, 720, 721, 722, 723, 724, 726, 727, 728, 729, 730, 731, 732, 733, 734, 736, 737, 738, 739, 740, 741, 742, 743, 744, 745, 746, 747, 748, 749, 750, 751, 752, 753, 754, 756, 757, 758, 760, 761, 762, 763, 765, 766, 767, 768, 769, 770, 771, 772, 773, 774, 775, 776, 777, 778, 779, 780, 781, 782, 783, 784, 785, 786, 788, 789, 790, 791, 792, 793, 794, 795, 796, 797, 798, 799, 800, 801, 802, 803, 804, 805, 806, 808, 809, 810, 811, 812, 813, 814, 815, 816, 817, 818, 819, 820, 821, 822, 823, 824, 825, 827, 828, 829, 830, 831, 832, 833, 834, 835, 836, 837, 838, 839, 840, 841, 842, 843, 844, 845, 846, 847, 848, 849, 850, 851, 852, 853, 854, 855, 856, 857, 858, 859, 860, 861, 862, 863, 864, 865, 866, 867, 868, 869, 870, 871, 872, 873, 874, 875, 876, 877, 878, 879, 880, 881, 882, 883, 884, 885, 886, 887, 888, 889, 890, 891, 892, 893, 894, 895, 896, 897, 898, 899, 900, 901, 902, 903, 904, 905, 906, 907, 908, 909, 910, 911, 912, 913, 914, 915, 916, 917, 918, 919, 920, 921, 922, 923, 924, 925, 926, 927, 928, 929, 930, 931, 932, 934, 935, 936, 937, 938, 939, 940, 941, 942, 943, 944, 945, 946, 947, 948, 949, 950, 951, 953, 954, 955, 956, 957, 958, 959, 960, 961, 962, 963, 964, 966, 968, 969, 970, 971, 972, 973, 974, 975, 976, 977, 978, 979, 980, 981, 982, 984, 985, 986, 987, 988, 989, 990, 991, 992, 993, 994, 995, 996, 997, 998, 999, 1000, 1001, 1002, 1003, 1004, 1005, 1006, 1007, 1008, 1009, 1010, 1011, 1012, 1013, 1014, 1015, 1016, 1017, 1018, 1019, 1020, 1021, 1022, 1023, 1025, 1026, 1027, 1028, 1029, 1030, 1031, 1032, 1033, 1034, 1035, 1036, 1037, 1038, 1039, 1040, 1041, 1042, 1043, 1044, 1045, 1046, 1047, 1048, 1049, 1050, 1051, 1052, 1053, 1054, 1055, 1056, 1057, 1058, 1060, 1061, 1062, 1063, 1064, 1065, 1066, 1067, 1068, 1069, 1070, 1071, 1072, 1073, 1074, 1075, 1076, 1077, 1078, 1079, 1080, 1081, 1082, 1083, 1084, 1085, 1086, 1087, 1088, 1089, 1090, 1092, 1093, 1094, 1095, 1096, 1097, 1098, 1099, 1100, 1101, 1102, 1103, 1104, 1107, 1109, 1110, 1111, 1112, 1114, 1115, 1116, 1117, 1118, 1119, 1120, 1121, 1122, 1123, 1124, 1125, 1126, 1127, 1128, 1130, 1131, 1132, 1133, 1134, 1135, 1136, 1137, 1138, 1139, 1140, 1141, 1142, 1143, 1144, 1145, 1146, 1147, 1148, 1149, 1150, 1151, 1152, 1153, 1154, 1156, 1157, 1158, 1159, 1160, 1161, 1162, 1163, 1164, 1166, 1167, 1168, 1169, 1170, 1171, 1172, 1173, 1176, 1177, 1178, 1179, 1180, 1181, 1182, 1183, 1184, 1185, 1186, 1187, 1188, 1190, 1191, 1192, 1193, 1194, 1195, 1196, 1197, 1198, 1199, 1200, 1201, 1202, 1203, 1204, 1206, 1207, 1208, 1210, 1211, 1212, 1213, 1214, 1215, 1216, 1217, 1218, 1219, 1220, 1221, 1222, 1223, 1224, 1225, 1226, 1227, 1228, 1230, 1231, 1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240, 1241, 1242, 1243, 1244, 1245, 1246, 1247, 1248, 1249, 1250, 1251, 1252, 1253, 1254, 1255, 1257, 1258, 1259, 1260, 1261, 1262, 1263, 1264, 1265, 1266, 1267, 1268, 1269, 1270, 1271, 1272, 1273, 1274, 1275, 1276, 1277, 1278, 1279, 1280, 1281, 1282, 1283, 1284, 1285, 1286, 1287, 1288, 1289, 1291, 1292, 1293, 1294, 1295, 1296, 1297, 1298, 1299, 1300, 1301, 1302, 1303, 1304, 1305, 1306, 1307, 1308, 1309, 1310, 1311, 1312, 1313, 1314, 1315, 1316, 1317, 1318, 1319, 1320, 1321, 1322, 1323, 1324, 1325, 1326, 1327, 1328, 1329, 1330, 1331, 1332, 1333, 1334, 1335, 1336, 1337, 1338, 1339, 1340, 1342, 1343, 1344, 1345, 1346, 1347, 1348, 1349, 1350, 1351, 1353, 1354, 1355, 1356, 1357, 1358, 1359, 1360, 1361, 1362, 1363, 1364, 1365, 1366, 1367, 1368, 1369, 1370, 1372, 1373, 1374, 1375, 1376, 1377, 1378, 1379, 1380, 1381, 1382, 1383, 1384, 1385, 1386, 1388, 1389, 1390, 1391, 1392, 1393, 1394, 1395, 1396, 1397, 1398, 1399, 1400, 1401, 1402, 1403, 1404, 1405, 1406, 1407, 1408, 1409, 1410, 1411, 1412, 1413, 1414, 1415, 1416, 1417, 1419, 1420, 1421, 1422, 1423, 1424, 1425, 1426, 1427, 1428, 1429, 1430, 1431, 1432, 1433, 1435, 1436, 1437, 1438, 1439, 1440, 1441, 1442, 1443, 1444, 1445, 1446, 1447, 1448, 1449, 1450, 1451, 1452, 1453, 1454, 1455, 1456, 1457, 1458, 1459, 1460, 1461, 1462, 1464, 1465, 1466, 1467, 1468, 1469, 1470, 1471, 1472, 1474, 1475, 1476, 1477, 1478, 1479, 1480, 1481, 1482, 1483, 1484, 1485, 1486, 1487, 1488, 1489, 1490, 1491, 1493, 1494, 1495, 1496, 1497, 1498, 1499, 1500, 1501, 1502, 1503, 1504, 1505, 1506, 1507, 1508, 1509, 1510, 1511, 1512, 1513, 1514, 1515, 1516, 1517, 1518, 1519, 1520, 1521, 1522, 1523, 1524, 1526, 1527, 1529, 1530, 1531, 1532, 1533, 1534, 1535, 1536, 1537, 1538, 1539, 1540, 1541, 1542, 1543, 1544, 1545, 1546, 1547, 1548, 1549, 1550, 1551, 1552, 1553, 1554, 1555, 1556, 1557, 1558, 1559, 1560, 1561, 1562, 1563, 1564, 1565, 1566, 1567, 1568, 1569, 1570, 1571, 1572, 1573, 1574, 1575, 1576, 1577, 1578, 1579, 1580, 1581, 1582, 1583, 1584, 1585, 1586, 1587, 1588, 1589, 1590, 1591, 1592, 1593, 1594, 1595, 1596, 1597, 1598, 1599, 1600, 1601, 1602, 1603, 1604, 1605, 1606, 1607, 1609, 1610, 1611, 1612, 1614, 1615, 1616, 1617, 1618, 1619, 1620, 1621, 1622, 1623, 1625, 1626, 1627, 1628, 1629, 1631, 1632, 1633, 1634, 1635, 1636, 1637, 1638, 1639, 1640, 1641, 1642, 1643, 1644, 1645, 1646, 1647, 1648, 1649, 1650, 1651, 1652, 1653, 1654, 1655, 1656, 1657, 1658, 1659, 1660, 1661, 1662, 1663, 1664, 1665, 1666, 1667, 1668, 1669, 1670, 1671, 1672, 1673, 1674, 1675, 1676, 1677, 1678, 1679, 1680, 1681, 1682, 1684, 1685, 1686, 1687, 1688, 1689, 1690, 1692, 1693, 1694, 1695, 1696, 1697, 1698, 1699, 1700, 1701, 1702, 1703, 1704, 1707, 1708, 1709, 1710, 1711, 1712, 1713, 1714, 1716, 1717, 1718, 1719, 1720, 1721, 1722, 1723, 1724, 1725, 1726, 1727, 1728, 1729, 1730, 1731, 1732, 1733, 1734, 1736, 1737, 1738, 1739, 1741, 1742, 1743, 1744, 1745, 1746, 1747, 1748, 1749, 1750, 1751, 1752, 1753, 1754, 1756, 1757, 1758, 1759, 1760, 1761, 1762, 1763, 1764, 1765, 1766, 1767, 1768, 1769, 1770, 1772, 1773, 1774, 1775, 1776, 1777, 1778, 1779, 1780, 1781, 1782, 1783, 1784, 1785, 1786, 1787, 1788, 1789, 1790, 1791, 1792, 1793, 1794, 1795, 1796, 1797, 1798, 1799, 1800, 1801, 1802, 1803, 1804, 1806, 1807, 1808, 1810, 1811, 1812, 1813, 1814, 1815, 1816, 1817, 1818, 1819, 1820, 1821, 1822, 1823, 1824, 1825, 1826, 1827, 1828, 1829, 1830, 1831, 1832, 1833, 1834, 1835, 1836, 1837, 1838, 1839, 1840, 1841, 1842, 1843, 1844, 1846, 1847, 1848, 1849, 1850, 1851, 1852, 1853, 1854, 1855, 1857, 1858, 1859, 1860, 1861, 1862, 1863, 1864, 1865, 1866, 1867, 1868, 1869, 1870, 1872, 1873, 1875, 1876, 1877, 1878, 1879, 1880, 1882, 1883, 1884, 1885, 1886, 1887, 1888, 1889, 1890, 1891, 1892, 1893, 1894, 1895, 1896, 1897, 1898, 1899, 1900, 1901, 1902, 1903, 1904, 1905]
Discarding 1326 places :
Ensure Unique test removed 6456 transitions
Reduce isomorphic transitions removed 6456 transitions.
Implicit Place search using SMT only with invariants took 16819 ms to find 1326 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 580/2069 places, 1385/14317 transitions.
Drop transitions removed 432 transitions
Redundant transition composition rules discarded 432 transitions
Iterating global reduction 0 with 432 rules applied. Total rules applied 432 place count 580 transition count 953
Applied a total of 432 rules in 25 ms. Remains 580 /580 variables (removed 0) and now considering 953/1385 (removed 432) transitions.
[2023-03-08 07:52:16] [INFO ] Flow matrix only has 733 transitions (discarded 220 similar events)
// Phase 1: matrix 733 rows 580 cols
[2023-03-08 07:52:16] [INFO ] Computed 166 place invariants in 6 ms
[2023-03-08 07:52:16] [INFO ] Implicit Places using invariants in 108 ms returned []
[2023-03-08 07:52:16] [INFO ] Flow matrix only has 733 transitions (discarded 220 similar events)
[2023-03-08 07:52:16] [INFO ] Invariant cache hit.
[2023-03-08 07:52:17] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-08 07:52:17] [INFO ] Implicit Places using invariants and state equation in 251 ms returned []
Implicit Place search using SMT with State Equation took 362 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 580/2069 places, 953/14317 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 18269 ms. Remains : 580/2069 places, 953/14317 transitions.
Support contains 144 out of 580 places after structural reductions.
[2023-03-08 07:52:17] [INFO ] Flatten gal took : 96 ms
[2023-03-08 07:52:17] [INFO ] Flatten gal took : 42 ms
[2023-03-08 07:52:17] [INFO ] Input system was already deterministic with 953 transitions.
Support contains 127 out of 580 places (down from 144) after GAL structural reductions.
Finished random walk after 9333 steps, including 2 resets, run visited all 61 properties in 346 ms. (steps per millisecond=26 )
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 33 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 30 ms
[2023-03-08 07:52:18] [INFO ] Input system was already deterministic with 953 transitions.
Computed a total of 75 stabilizing places and 1 stable transitions
Graph (complete) has 1118 edges and 580 vertex of which 506 are kept as prefixes of interest. Removing 74 places using SCC suffix rule.6 ms
Starting structural reductions in SI_CTL mode, iteration 0 : 580/580 places, 953/953 transitions.
Graph (trivial) has 905 edges and 580 vertex of which 472 / 580 are part of one of the 88 SCC in 4 ms
Free SCC test removed 384 places
Ensure Unique test removed 796 transitions
Reduce isomorphic transitions removed 796 transitions.
Graph (complete) has 322 edges and 196 vertex of which 132 are kept as prefixes of interest. Removing 64 places using SCC suffix rule.0 ms
Discarding 64 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 132 transition count 156
Reduce places removed 1 places and 0 transitions.
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Iterating post reduction 1 with 9 rules applied. Total rules applied 12 place count 131 transition count 148
Reduce places removed 8 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 2 with 12 rules applied. Total rules applied 24 place count 123 transition count 144
Discarding 81 places :
Symmetric choice reduction at 3 with 81 rule applications. Total rules 105 place count 42 transition count 63
Iterating global reduction 3 with 81 rules applied. Total rules applied 186 place count 42 transition count 63
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 3 with 2 rules applied. Total rules applied 188 place count 42 transition count 61
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 189 place count 42 transition count 61
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 190 place count 41 transition count 60
Iterating global reduction 3 with 1 rules applied. Total rules applied 191 place count 41 transition count 60
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 192 place count 41 transition count 59
Applied a total of 192 rules in 27 ms. Remains 41 /580 variables (removed 539) and now considering 59/953 (removed 894) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 27 ms. Remains : 41/580 places, 59/953 transitions.
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 2 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 2 ms
[2023-03-08 07:52:18] [INFO ] Input system was already deterministic with 59 transitions.
Starting structural reductions in LTL mode, iteration 0 : 580/580 places, 953/953 transitions.
Reduce places removed 73 places and 0 transitions.
Iterating post reduction 0 with 73 rules applied. Total rules applied 73 place count 507 transition count 953
Discarding 21 places :
Symmetric choice reduction at 1 with 21 rule applications. Total rules 94 place count 486 transition count 911
Iterating global reduction 1 with 21 rules applied. Total rules applied 115 place count 486 transition count 911
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 125 place count 486 transition count 901
Applied a total of 125 rules in 27 ms. Remains 486 /580 variables (removed 94) and now considering 901/953 (removed 52) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 486/580 places, 901/953 transitions.
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 21 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 21 ms
[2023-03-08 07:52:18] [INFO ] Input system was already deterministic with 901 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 580/580 places, 953/953 transitions.
Graph (trivial) has 949 edges and 580 vertex of which 504 / 580 are part of one of the 92 SCC in 2 ms
Free SCC test removed 412 places
Ensure Unique test removed 857 transitions
Reduce isomorphic transitions removed 857 transitions.
Graph (complete) has 261 edges and 168 vertex of which 95 are kept as prefixes of interest. Removing 73 places using SCC suffix rule.1 ms
Discarding 73 places :
Also discarding 0 output transitions
Discarding 90 places :
Symmetric choice reduction at 0 with 90 rule applications. Total rules 92 place count 5 transition count 6
Iterating global reduction 0 with 90 rules applied. Total rules applied 182 place count 5 transition count 6
Applied a total of 182 rules in 6 ms. Remains 5 /580 variables (removed 575) and now considering 6/953 (removed 947) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 5/580 places, 6/953 transitions.
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 1 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 0 ms
[2023-03-08 07:52:18] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 580/580 places, 953/953 transitions.
Reduce places removed 69 places and 0 transitions.
Iterating post reduction 0 with 69 rules applied. Total rules applied 69 place count 511 transition count 953
Discarding 19 places :
Symmetric choice reduction at 1 with 19 rule applications. Total rules 88 place count 492 transition count 915
Iterating global reduction 1 with 19 rules applied. Total rules applied 107 place count 492 transition count 915
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 115 place count 492 transition count 907
Applied a total of 115 rules in 26 ms. Remains 492 /580 variables (removed 88) and now considering 907/953 (removed 46) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 492/580 places, 907/953 transitions.
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 17 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 17 ms
[2023-03-08 07:52:18] [INFO ] Input system was already deterministic with 907 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 580/580 places, 953/953 transitions.
Graph (trivial) has 940 edges and 580 vertex of which 496 / 580 are part of one of the 91 SCC in 2 ms
Free SCC test removed 405 places
Ensure Unique test removed 843 transitions
Reduce isomorphic transitions removed 843 transitions.
Graph (complete) has 275 edges and 175 vertex of which 103 are kept as prefixes of interest. Removing 72 places using SCC suffix rule.1 ms
Discarding 72 places :
Also discarding 0 output transitions
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 5 place count 103 transition count 107
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 9 place count 100 transition count 106
Discarding 88 places :
Symmetric choice reduction at 2 with 88 rule applications. Total rules 97 place count 12 transition count 18
Iterating global reduction 2 with 88 rules applied. Total rules applied 185 place count 12 transition count 18
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 186 place count 12 transition count 17
Applied a total of 186 rules in 8 ms. Remains 12 /580 variables (removed 568) and now considering 17/953 (removed 936) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 12/580 places, 17/953 transitions.
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 0 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 0 ms
[2023-03-08 07:52:18] [INFO ] Input system was already deterministic with 17 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 580/580 places, 953/953 transitions.
Graph (trivial) has 949 edges and 580 vertex of which 504 / 580 are part of one of the 92 SCC in 2 ms
Free SCC test removed 412 places
Ensure Unique test removed 857 transitions
Reduce isomorphic transitions removed 857 transitions.
Graph (complete) has 261 edges and 168 vertex of which 95 are kept as prefixes of interest. Removing 73 places using SCC suffix rule.1 ms
Discarding 73 places :
Also discarding 0 output transitions
Discarding 90 places :
Symmetric choice reduction at 0 with 90 rule applications. Total rules 92 place count 5 transition count 6
Iterating global reduction 0 with 90 rules applied. Total rules applied 182 place count 5 transition count 6
Applied a total of 182 rules in 5 ms. Remains 5 /580 variables (removed 575) and now considering 6/953 (removed 947) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 5/580 places, 6/953 transitions.
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 0 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 0 ms
[2023-03-08 07:52:18] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 580/580 places, 953/953 transitions.
Graph (trivial) has 911 edges and 580 vertex of which 475 / 580 are part of one of the 89 SCC in 1 ms
Free SCC test removed 386 places
Ensure Unique test removed 799 transitions
Reduce isomorphic transitions removed 799 transitions.
Graph (complete) has 319 edges and 194 vertex of which 128 are kept as prefixes of interest. Removing 66 places using SCC suffix rule.1 ms
Discarding 66 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 128 transition count 153
Reduce places removed 1 places and 0 transitions.
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Iterating post reduction 1 with 7 rules applied. Total rules applied 10 place count 127 transition count 147
Reduce places removed 6 places and 0 transitions.
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 2 with 8 rules applied. Total rules applied 18 place count 121 transition count 145
Discarding 86 places :
Symmetric choice reduction at 3 with 86 rule applications. Total rules 104 place count 35 transition count 57
Iterating global reduction 3 with 86 rules applied. Total rules applied 190 place count 35 transition count 57
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 3 with 2 rules applied. Total rules applied 192 place count 35 transition count 55
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 2 rules applied. Total rules applied 194 place count 34 transition count 54
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 5 with 2 rules applied. Total rules applied 196 place count 34 transition count 52
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 5 with 1 rules applied. Total rules applied 197 place count 34 transition count 52
Discarding 1 places :
Symmetric choice reduction at 5 with 1 rule applications. Total rules 198 place count 33 transition count 51
Iterating global reduction 5 with 1 rules applied. Total rules applied 199 place count 33 transition count 51
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 200 place count 33 transition count 50
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 6 with 1 rules applied. Total rules applied 201 place count 33 transition count 49
Applied a total of 201 rules in 13 ms. Remains 33 /580 variables (removed 547) and now considering 49/953 (removed 904) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 33/580 places, 49/953 transitions.
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 5 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 1 ms
[2023-03-08 07:52:18] [INFO ] Input system was already deterministic with 49 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 580/580 places, 953/953 transitions.
Graph (trivial) has 942 edges and 580 vertex of which 497 / 580 are part of one of the 92 SCC in 1 ms
Free SCC test removed 405 places
Ensure Unique test removed 841 transitions
Reduce isomorphic transitions removed 841 transitions.
Graph (complete) has 277 edges and 175 vertex of which 102 are kept as prefixes of interest. Removing 73 places using SCC suffix rule.0 ms
Discarding 73 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 102 transition count 111
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 4 place count 101 transition count 111
Discarding 91 places :
Symmetric choice reduction at 2 with 91 rule applications. Total rules 95 place count 10 transition count 19
Iterating global reduction 2 with 91 rules applied. Total rules applied 186 place count 10 transition count 19
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 187 place count 10 transition count 18
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 188 place count 10 transition count 18
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 189 place count 9 transition count 17
Iterating global reduction 2 with 1 rules applied. Total rules applied 190 place count 9 transition count 17
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 191 place count 9 transition count 16
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 192 place count 9 transition count 15
Applied a total of 192 rules in 9 ms. Remains 9 /580 variables (removed 571) and now considering 15/953 (removed 938) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 9/580 places, 15/953 transitions.
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 0 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 0 ms
[2023-03-08 07:52:18] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 580/580 places, 953/953 transitions.
Reduce places removed 62 places and 0 transitions.
Iterating post reduction 0 with 62 rules applied. Total rules applied 62 place count 518 transition count 953
Discarding 19 places :
Symmetric choice reduction at 1 with 19 rule applications. Total rules 81 place count 499 transition count 915
Iterating global reduction 1 with 19 rules applied. Total rules applied 100 place count 499 transition count 915
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 109 place count 499 transition count 906
Applied a total of 109 rules in 23 ms. Remains 499 /580 variables (removed 81) and now considering 906/953 (removed 47) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 23 ms. Remains : 499/580 places, 906/953 transitions.
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 17 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 17 ms
[2023-03-08 07:52:18] [INFO ] Input system was already deterministic with 906 transitions.
Starting structural reductions in LTL mode, iteration 0 : 580/580 places, 953/953 transitions.
Reduce places removed 68 places and 0 transitions.
Iterating post reduction 0 with 68 rules applied. Total rules applied 68 place count 512 transition count 953
Discarding 18 places :
Symmetric choice reduction at 1 with 18 rule applications. Total rules 86 place count 494 transition count 917
Iterating global reduction 1 with 18 rules applied. Total rules applied 104 place count 494 transition count 917
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 113 place count 494 transition count 908
Applied a total of 113 rules in 24 ms. Remains 494 /580 variables (removed 86) and now considering 908/953 (removed 45) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24 ms. Remains : 494/580 places, 908/953 transitions.
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 16 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 16 ms
[2023-03-08 07:52:18] [INFO ] Input system was already deterministic with 908 transitions.
Starting structural reductions in LTL mode, iteration 0 : 580/580 places, 953/953 transitions.
Reduce places removed 69 places and 0 transitions.
Iterating post reduction 0 with 69 rules applied. Total rules applied 69 place count 511 transition count 953
Discarding 19 places :
Symmetric choice reduction at 1 with 19 rule applications. Total rules 88 place count 492 transition count 915
Iterating global reduction 1 with 19 rules applied. Total rules applied 107 place count 492 transition count 915
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 116 place count 492 transition count 906
Applied a total of 116 rules in 21 ms. Remains 492 /580 variables (removed 88) and now considering 906/953 (removed 47) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 21 ms. Remains : 492/580 places, 906/953 transitions.
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 25 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 17 ms
[2023-03-08 07:52:18] [INFO ] Input system was already deterministic with 906 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 580/580 places, 953/953 transitions.
Graph (trivial) has 942 edges and 580 vertex of which 497 / 580 are part of one of the 92 SCC in 2 ms
Free SCC test removed 405 places
Ensure Unique test removed 841 transitions
Reduce isomorphic transitions removed 841 transitions.
Graph (complete) has 277 edges and 175 vertex of which 102 are kept as prefixes of interest. Removing 73 places using SCC suffix rule.1 ms
Discarding 73 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 102 transition count 111
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 4 place count 101 transition count 111
Discarding 91 places :
Symmetric choice reduction at 2 with 91 rule applications. Total rules 95 place count 10 transition count 19
Iterating global reduction 2 with 91 rules applied. Total rules applied 186 place count 10 transition count 19
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 187 place count 10 transition count 18
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 188 place count 10 transition count 18
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 189 place count 9 transition count 17
Iterating global reduction 2 with 1 rules applied. Total rules applied 190 place count 9 transition count 17
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 191 place count 9 transition count 16
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 192 place count 9 transition count 15
Applied a total of 192 rules in 9 ms. Remains 9 /580 variables (removed 571) and now considering 15/953 (removed 938) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 9/580 places, 15/953 transitions.
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 1 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 0 ms
[2023-03-08 07:52:18] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 580/580 places, 953/953 transitions.
Graph (trivial) has 924 edges and 580 vertex of which 486 / 580 are part of one of the 90 SCC in 1 ms
Free SCC test removed 396 places
Ensure Unique test removed 821 transitions
Reduce isomorphic transitions removed 821 transitions.
Graph (complete) has 297 edges and 184 vertex of which 115 are kept as prefixes of interest. Removing 69 places using SCC suffix rule.0 ms
Discarding 69 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 115 transition count 131
Reduce places removed 1 places and 0 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Iterating post reduction 1 with 5 rules applied. Total rules applied 8 place count 114 transition count 127
Reduce places removed 4 places and 0 transitions.
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 2 with 6 rules applied. Total rules applied 14 place count 110 transition count 125
Discarding 87 places :
Symmetric choice reduction at 3 with 87 rule applications. Total rules 101 place count 23 transition count 37
Iterating global reduction 3 with 87 rules applied. Total rules applied 188 place count 23 transition count 37
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 3 with 2 rules applied. Total rules applied 190 place count 23 transition count 35
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 191 place count 23 transition count 35
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 192 place count 22 transition count 34
Iterating global reduction 3 with 1 rules applied. Total rules applied 193 place count 22 transition count 34
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 194 place count 22 transition count 33
Applied a total of 194 rules in 9 ms. Remains 22 /580 variables (removed 558) and now considering 33/953 (removed 920) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 22/580 places, 33/953 transitions.
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 0 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 0 ms
[2023-03-08 07:52:18] [INFO ] Input system was already deterministic with 33 transitions.
Starting structural reductions in LTL mode, iteration 0 : 580/580 places, 953/953 transitions.
Reduce places removed 72 places and 0 transitions.
Iterating post reduction 0 with 72 rules applied. Total rules applied 72 place count 508 transition count 953
Discarding 21 places :
Symmetric choice reduction at 1 with 21 rule applications. Total rules 93 place count 487 transition count 911
Iterating global reduction 1 with 21 rules applied. Total rules applied 114 place count 487 transition count 911
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 124 place count 487 transition count 901
Applied a total of 124 rules in 19 ms. Remains 487 /580 variables (removed 93) and now considering 901/953 (removed 52) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 20 ms. Remains : 487/580 places, 901/953 transitions.
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 15 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 16 ms
[2023-03-08 07:52:18] [INFO ] Input system was already deterministic with 901 transitions.
Starting structural reductions in LTL mode, iteration 0 : 580/580 places, 953/953 transitions.
Reduce places removed 69 places and 0 transitions.
Iterating post reduction 0 with 69 rules applied. Total rules applied 69 place count 511 transition count 953
Discarding 19 places :
Symmetric choice reduction at 1 with 19 rule applications. Total rules 88 place count 492 transition count 915
Iterating global reduction 1 with 19 rules applied. Total rules applied 107 place count 492 transition count 915
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 116 place count 492 transition count 906
Applied a total of 116 rules in 21 ms. Remains 492 /580 variables (removed 88) and now considering 906/953 (removed 47) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 21 ms. Remains : 492/580 places, 906/953 transitions.
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 15 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 15 ms
[2023-03-08 07:52:18] [INFO ] Input system was already deterministic with 906 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 580/580 places, 953/953 transitions.
Graph (trivial) has 943 edges and 580 vertex of which 497 / 580 are part of one of the 91 SCC in 1 ms
Free SCC test removed 406 places
Ensure Unique test removed 846 transitions
Reduce isomorphic transitions removed 846 transitions.
Graph (complete) has 272 edges and 174 vertex of which 102 are kept as prefixes of interest. Removing 72 places using SCC suffix rule.0 ms
Discarding 72 places :
Also discarding 0 output transitions
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 5 place count 102 transition count 104
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 9 place count 99 transition count 103
Discarding 89 places :
Symmetric choice reduction at 2 with 89 rule applications. Total rules 98 place count 10 transition count 14
Iterating global reduction 2 with 89 rules applied. Total rules applied 187 place count 10 transition count 14
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 188 place count 10 transition count 13
Applied a total of 188 rules in 5 ms. Remains 10 /580 variables (removed 570) and now considering 13/953 (removed 940) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 10/580 places, 13/953 transitions.
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 0 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 0 ms
[2023-03-08 07:52:18] [INFO ] Input system was already deterministic with 13 transitions.
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 17 ms
[2023-03-08 07:52:18] [INFO ] Flatten gal took : 18 ms
[2023-03-08 07:52:18] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-08 07:52:19] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 580 places, 953 transitions and 2071 arcs took 3 ms.
Total runtime 20720 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DLCflexbar-PT-6a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
CTLFireability
FORMULA DLCflexbar-PT-6a-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCflexbar-PT-6a-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678262751892
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 1.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: LAUNCH task # 21 (type EXCL) for 18 DLCflexbar-PT-6a-CTLFireability-06
lola: time limit : 124 sec
lola: memory limit: 32 pages
lola: FINISHED task # 21 (type EXCL) for DLCflexbar-PT-6a-CTLFireability-06
lola: result : true
lola: markings : 9
lola: fired transitions : 656
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 42 (type EXCL) for 41 DLCflexbar-PT-6a-CTLFireability-11
lola: time limit : 128 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 42 (type EXCL) for DLCflexbar-PT-6a-CTLFireability-11
lola: result : true
lola: markings : 2
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 38 DLCflexbar-PT-6a-CTLFireability-10
lola: time limit : 138 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 39 (type EXCL) for DLCflexbar-PT-6a-CTLFireability-10
lola: result : false
lola: markings : 49
lola: fired transitions : 147
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 31 DLCflexbar-PT-6a-CTLFireability-09
lola: time limit : 149 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 60 (type SKEL/SRCH) for 31 DLCflexbar-PT-6a-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 60 (type SKEL/SRCH) for DLCflexbar-PT-6a-CTLFireability-09
lola: result : false
lola: markings : 1358
lola: fired transitions : 3473
lola: time used : 0.000000
lola: memory pages used : 1
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-6a-CTLFireability-10: CTL false CTL model checker
DLCflexbar-PT-6a-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-6a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-05: F 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-06: CONJ 0 1 0 0 3 0 0 0
DLCflexbar-PT-6a-CTLFireability-07: EFEG 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-09: CONJ 0 1 1 0 2 0 0 0
DLCflexbar-PT-6a-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
DLCflexbar-PT-6a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 4/224 2/32 DLCflexbar-PT-6a-CTLFireability-09 224238 m, 44847 m/sec, 1904190 t fired, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DLCflexbar-PT-6a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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DLCflexbar-PT-6a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-05: F 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-06: CONJ 0 1 0 0 3 0 0 0
DLCflexbar-PT-6a-CTLFireability-07: EFEG 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-09: CONJ 0 1 1 0 2 0 0 0
DLCflexbar-PT-6a-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
DLCflexbar-PT-6a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DLCflexbar-PT-6a-CTLFireability-05: F 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-06: CONJ 0 1 0 0 3 0 0 0
DLCflexbar-PT-6a-CTLFireability-07: EFEG 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-09: CONJ 0 1 1 0 2 0 0 0
DLCflexbar-PT-6a-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
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34 CTL EXCL 14/224 5/32 DLCflexbar-PT-6a-CTLFireability-09 742631 m, 52998 m/sec, 5961728 t fired, .
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DLCflexbar-PT-6a-CTLFireability-07: EFEG 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-09: CONJ 0 1 1 0 2 0 0 0
DLCflexbar-PT-6a-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
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34 CTL EXCL 19/224 7/32 DLCflexbar-PT-6a-CTLFireability-09 1016696 m, 54813 m/sec, 7967436 t fired, .
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DLCflexbar-PT-6a-CTLFireability-07: EFEG 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
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DLCflexbar-PT-6a-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
DLCflexbar-PT-6a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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34 CTL EXCL 24/224 8/32 DLCflexbar-PT-6a-CTLFireability-09 1277471 m, 52155 m/sec, 9978553 t fired, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DLCflexbar-PT-6a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-05: F 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-06: CONJ 0 1 0 0 3 0 0 0
DLCflexbar-PT-6a-CTLFireability-07: EFEG 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-09: CONJ 0 1 1 0 2 0 0 0
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lola: memory limit: 32 pages
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DLCflexbar-PT-6a-CTLFireability-10: CTL false CTL model checker
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4 CTL EXCL 5/288 2/32 DLCflexbar-PT-6a-CTLFireability-01 237892 m, 47578 m/sec, 2028524 t fired, .
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4 CTL EXCL 10/288 3/32 DLCflexbar-PT-6a-CTLFireability-01 495986 m, 51618 m/sec, 4085376 t fired, .
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4 CTL EXCL 15/288 5/32 DLCflexbar-PT-6a-CTLFireability-01 765736 m, 53950 m/sec, 6135966 t fired, .
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4 CTL EXCL 20/288 7/32 DLCflexbar-PT-6a-CTLFireability-01 1038205 m, 54493 m/sec, 8154097 t fired, .
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4 CTL EXCL 25/288 8/32 DLCflexbar-PT-6a-CTLFireability-01 1302132 m, 52785 m/sec, 10159489 t fired, .
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4 CTL EXCL 30/288 10/32 DLCflexbar-PT-6a-CTLFireability-01 1585673 m, 56708 m/sec, 12161181 t fired, .
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4 CTL EXCL 35/288 12/32 DLCflexbar-PT-6a-CTLFireability-01 1873928 m, 57651 m/sec, 14150388 t fired, .
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4 CTL EXCL 40/288 14/32 DLCflexbar-PT-6a-CTLFireability-01 2156261 m, 56466 m/sec, 16166111 t fired, .
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4 CTL EXCL 45/288 15/32 DLCflexbar-PT-6a-CTLFireability-01 2448863 m, 58520 m/sec, 18156018 t fired, .
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4 CTL EXCL 55/288 19/32 DLCflexbar-PT-6a-CTLFireability-01 3033824 m, 60635 m/sec, 22141304 t fired, .
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4 CTL EXCL 65/288 22/32 DLCflexbar-PT-6a-CTLFireability-01 3583229 m, 55997 m/sec, 26157187 t fired, .
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DLCflexbar-PT-6a-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
DLCflexbar-PT-6a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-6a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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DLCflexbar-PT-6a-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DLCflexbar-PT-6a-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-6a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-05: F 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-06: CONJ 0 1 0 0 3 0 0 0
DLCflexbar-PT-6a-CTLFireability-07: EFEG 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-6a-CTLFireability-09: CONJ 0 0 0 0 2 0 2 0
DLCflexbar-PT-6a-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
DLCflexbar-PT-6a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-6a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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DLCflexbar-PT-6a-CTLFireability-05: F 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-06: CONJ 0 1 0 0 3 0 0 0
DLCflexbar-PT-6a-CTLFireability-07: EFEG 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-6a-CTLFireability-09: CONJ 0 0 0 0 2 0 2 0
DLCflexbar-PT-6a-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
DLCflexbar-PT-6a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-6a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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DLCflexbar-PT-6a-CTLFireability-05: F 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-06: CONJ 0 1 0 0 3 0 0 0
DLCflexbar-PT-6a-CTLFireability-07: EFEG 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-6a-CTLFireability-09: CONJ 0 0 0 0 2 0 2 0
DLCflexbar-PT-6a-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
DLCflexbar-PT-6a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-6a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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DLCflexbar-PT-6a-CTLFireability-05: F 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-06: CONJ 0 1 0 0 3 0 0 0
DLCflexbar-PT-6a-CTLFireability-07: EFEG 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-6a-CTLFireability-09: CONJ 0 0 0 0 2 0 2 0
DLCflexbar-PT-6a-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
DLCflexbar-PT-6a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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DLCflexbar-PT-6a-CTLFireability-05: F 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-06: CONJ 0 1 0 0 3 0 0 0
DLCflexbar-PT-6a-CTLFireability-07: EFEG 0 1 0 0 1 0 0 0
DLCflexbar-PT-6a-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-6a-CTLFireability-09: CONJ 0 0 0 0 2 0 2 0
DLCflexbar-PT-6a-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
DLCflexbar-PT-6a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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lola: LAUNCH task # 26 (type EXCL) for 25 DLCflexbar-PT-6a-CTLFireability-07
lola: time limit : 309 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for DLCflexbar-PT-6a-CTLFireability-07
lola: result : true
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 61 (type EXCL) for 15 DLCflexbar-PT-6a-CTLFireability-05
lola: time limit : 348 sec
lola: memory limit: 32 pages
lola: FINISHED task # 61 (type EXCL) for DLCflexbar-PT-6a-CTLFireability-05
lola: result : true
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 DLCflexbar-PT-6a-CTLFireability-02
lola: time limit : 398 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for DLCflexbar-PT-6a-CTLFireability-02
lola: result : true
lola: markings : 2
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 44 DLCflexbar-PT-6a-CTLFireability-12
lola: time limit : 464 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for DLCflexbar-PT-6a-CTLFireability-12
lola: result : true
lola: markings : 5
lola: fired transitions : 184
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 18 DLCflexbar-PT-6a-CTLFireability-06
lola: time limit : 557 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for DLCflexbar-PT-6a-CTLFireability-06
lola: result : false
lola: markings : 11
lola: fired transitions : 815
lola: time used : 0.000000
lola: memory pages used : 1
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lola: time limit : 697 sec
lola: memory limit: 32 pages
lola: FINISHED task # 58 (type EXCL) for DLCflexbar-PT-6a-CTLFireability-15
lola: result : true
lola: markings : 2
lola: fired transitions : 4
lola: time used : 0.000000
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lola: markings : 3
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lola: time used : 0.000000
lola: memory pages used : 1
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lola: time limit : 1394 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for DLCflexbar-PT-6a-CTLFireability-12
lola: result : true
lola: markings : 2
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 DLCflexbar-PT-6a-CTLFireability-00
lola: time limit : 2789 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for DLCflexbar-PT-6a-CTLFireability-00
lola: result : false
lola: markings : 1375
lola: fired transitions : 125343
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-6a-CTLFireability-00: CTL false CTL model checker
DLCflexbar-PT-6a-CTLFireability-01: CTL unknown AGGR
DLCflexbar-PT-6a-CTLFireability-02: CTL true CTL model checker
DLCflexbar-PT-6a-CTLFireability-03: CTL unknown AGGR
DLCflexbar-PT-6a-CTLFireability-04: CTL true CTL model checker
DLCflexbar-PT-6a-CTLFireability-05: F false state space / EG
DLCflexbar-PT-6a-CTLFireability-06: CONJ false CTL model checker
DLCflexbar-PT-6a-CTLFireability-07: EFEG true state space /EFEG
DLCflexbar-PT-6a-CTLFireability-08: CTL unknown AGGR
DLCflexbar-PT-6a-CTLFireability-09: CONJ unknown CONJ
DLCflexbar-PT-6a-CTLFireability-10: CTL false CTL model checker
DLCflexbar-PT-6a-CTLFireability-11: CTL true CTL model checker
DLCflexbar-PT-6a-CTLFireability-12: CONJ true CONJ
DLCflexbar-PT-6a-CTLFireability-13: CTL unknown AGGR
DLCflexbar-PT-6a-CTLFireability-14: CTL false CTL model checker
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-6a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCflexbar-PT-6a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478500570"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-6a.tgz
mv DLCflexbar-PT-6a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;