Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r102-tall-167814477400826.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..........................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is DLCshifumi-PT-4a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r102-tall-167814477400826
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.3M
-rw-r--r-- 1 mcc users 6.0K Feb 26 08:32 CTLCardinality.txt
-rw-r--r-- 1 mcc users 63K Feb 26 08:32 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Feb 26 08:05 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 26 08:05 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 15:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 15:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 15:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 14K Feb 25 15:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.5K Feb 26 09:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 86K Feb 26 09:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.7K Feb 26 08:58 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 84K Feb 26 08:58 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 1.9M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-00
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-01
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-02
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-03
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-04
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-05
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-06
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-07
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-08
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-09
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-10
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-11
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-12
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-13
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-14
FORMULA_NAME DLCshifumi-PT-4a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678334196029

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCshifumi-PT-4a
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT DLCshifumi-PT-4a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA DLCshifumi-PT-4a-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678334678662

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 53 (type SKEL/FNDP) for 0 DLCshifumi-PT-4a-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/EQUN) for 0 DLCshifumi-PT-4a-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type SKEL/SRCH) for 0 DLCshifumi-PT-4a-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type SKEL/SRCH) for 0 DLCshifumi-PT-4a-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 56 (type SKEL/SRCH) for DLCshifumi-PT-4a-CTLFireability-00
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 53 (type SKEL/FNDP) for DLCshifumi-PT-4a-CTLFireability-00
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 54 (type EQUN) for DLCshifumi-PT-4a-CTLFireability-00 (obsolete)
lola: CANCELED task # 55 (type SRCH) for DLCshifumi-PT-4a-CTLFireability-00 (obsolete)
sara: try reading problem file /home/mcc/execution/CTLFireability-54.sara.
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 0.000000 secs.

lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: FINISHED task # 54 (type SKEL/EQUN) for DLCshifumi-PT-4a-CTLFireability-00
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 58 (type SKEL/FNDP) for 16 DLCshifumi-PT-4a-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/EQUN) for 16 DLCshifumi-PT-4a-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 60 (type SKEL/SRCH) for 16 DLCshifumi-PT-4a-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SKEL/SRCH) for 16 DLCshifumi-PT-4a-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 60 (type SKEL/SRCH) for DLCshifumi-PT-4a-CTLFireability-04
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 58 (type FNDP) for DLCshifumi-PT-4a-CTLFireability-04 (obsolete)
lola: CANCELED task # 59 (type EQUN) for DLCshifumi-PT-4a-CTLFireability-04 (obsolete)
lola: CANCELED task # 61 (type SRCH) for DLCshifumi-PT-4a-CTLFireability-04 (obsolete)
lola: FINISHED task # 58 (type SKEL/FNDP) for DLCshifumi-PT-4a-CTLFireability-04
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 61 (type SKEL/SRCH) for DLCshifumi-PT-4a-CTLFireability-04
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
sara: try reading problem file /home/mcc/execution/CTLFireability-59.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 59 (type SKEL/EQUN) for DLCshifumi-PT-4a-CTLFireability-04
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: LAUNCH task # 62 (type SKEL/SRCH) for 25 DLCshifumi-PT-4a-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 62 (type SKEL/SRCH) for DLCshifumi-PT-4a-CTLFireability-07
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 65 (type EXCL) for 0 DLCshifumi-PT-4a-CTLFireability-00
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 63 (type FNDP) for 0 DLCshifumi-PT-4a-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type EQUN) for 0 DLCshifumi-PT-4a-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SRCH) for 0 DLCshifumi-PT-4a-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 63 (type FNDP) for DLCshifumi-PT-4a-CTLFireability-00
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 64 (type EQUN) for DLCshifumi-PT-4a-CTLFireability-00 (obsolete)
lola: CANCELED task # 65 (type EXCL) for DLCshifumi-PT-4a-CTLFireability-00 (obsolete)
lola: CANCELED task # 66 (type SRCH) for DLCshifumi-PT-4a-CTLFireability-00 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/CTLFireability-64.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 64 (type EQUN) for DLCshifumi-PT-4a-CTLFireability-00
lola: result : true
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 69 (type EXCL) for 16 DLCshifumi-PT-4a-CTLFireability-04
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 67 (type FNDP) for 16 DLCshifumi-PT-4a-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type EQUN) for 16 DLCshifumi-PT-4a-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type SRCH) for 16 DLCshifumi-PT-4a-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 70 (type SRCH) for DLCshifumi-PT-4a-CTLFireability-04
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 69 (type EXCL) for DLCshifumi-PT-4a-CTLFireability-04
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 67 (type FNDP) for DLCshifumi-PT-4a-CTLFireability-04 (obsolete)
lola: CANCELED task # 68 (type EQUN) for DLCshifumi-PT-4a-CTLFireability-04 (obsolete)
sara: try reading problem file /home/mcc/execution/CTLFireability-68.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 67 (type FNDP) for DLCshifumi-PT-4a-CTLFireability-04
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 68 (type EQUN) for DLCshifumi-PT-4a-CTLFireability-04
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: LAUNCH task # 35 (type EXCL) for 34 DLCshifumi-PT-4a-CTLFireability-10
lola: time limit : 256 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-CTLFireability-00: DISJ true findpath
DLCshifumi-PT-4a-CTLFireability-04: EF true state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-06: CTL 1 0 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-07: EXEF 1 0 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-10: AGEF 0 0 1 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 AGEF EXCL 1/256 1/32 DLCshifumi-PT-4a-CTLFireability-10 45561 m, 9112 m/sec, 1086622 t fired, .

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lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-CTLFireability-00: DISJ true findpath
DLCshifumi-PT-4a-CTLFireability-04: EF true state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-07: EXEF 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-10: AGEF 0 0 1 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 AGEF EXCL 6/256 2/32 DLCshifumi-PT-4a-CTLFireability-10 228166 m, 36521 m/sec, 5597118 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-CTLFireability-00: DISJ true findpath
DLCshifumi-PT-4a-CTLFireability-04: EF true state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-07: EXEF 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-10: AGEF 0 0 1 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 AGEF EXCL 11/256 2/32 DLCshifumi-PT-4a-CTLFireability-10 392231 m, 32813 m/sec, 9777390 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-CTLFireability-00: DISJ true findpath
DLCshifumi-PT-4a-CTLFireability-04: EF true state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-07: EXEF 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-10: AGEF 0 0 1 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 AGEF EXCL 16/256 3/32 DLCshifumi-PT-4a-CTLFireability-10 560535 m, 33660 m/sec, 14015395 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-CTLFireability-00: DISJ true findpath
DLCshifumi-PT-4a-CTLFireability-04: EF true state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-07: EXEF 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-10: AGEF 0 0 1 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 AGEF EXCL 21/256 4/32 DLCshifumi-PT-4a-CTLFireability-10 728976 m, 33688 m/sec, 18183544 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-CTLFireability-00: DISJ true findpath
DLCshifumi-PT-4a-CTLFireability-04: EF true state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-07: EXEF 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-10: AGEF 0 0 1 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 AGEF EXCL 26/256 5/32 DLCshifumi-PT-4a-CTLFireability-10 891127 m, 32430 m/sec, 22347053 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-CTLFireability-00: DISJ true findpath
DLCshifumi-PT-4a-CTLFireability-04: EF true state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-07: EXEF 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-10: AGEF 0 0 1 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 AGEF EXCL 31/256 6/32 DLCshifumi-PT-4a-CTLFireability-10 1052043 m, 32183 m/sec, 26555146 t fired, .

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DLCshifumi-PT-4a-CTLFireability-00: DISJ true findpath
DLCshifumi-PT-4a-CTLFireability-04: EF true state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-07: EXEF 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-10: AGEF 0 0 1 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 AGEF EXCL 36/256 7/32 DLCshifumi-PT-4a-CTLFireability-10 1212562 m, 32103 m/sec, 30723669 t fired, .

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DLCshifumi-PT-4a-CTLFireability-00: DISJ true findpath
DLCshifumi-PT-4a-CTLFireability-04: EF true state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-07: EXEF 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-10: AGEF 0 0 1 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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35 AGEF EXCL 41/256 7/32 DLCshifumi-PT-4a-CTLFireability-10 1370362 m, 31560 m/sec, 34851271 t fired, .

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DLCshifumi-PT-4a-CTLFireability-04: EF true state space

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DLCshifumi-PT-4a-CTLFireability-10: AGEF 0 0 1 0 1 0 0 0
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35 AGEF EXCL 46/256 8/32 DLCshifumi-PT-4a-CTLFireability-10 1545265 m, 34980 m/sec, 39136565 t fired, .

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35 AGEF EXCL 51/256 9/32 DLCshifumi-PT-4a-CTLFireability-10 1708579 m, 32662 m/sec, 43381801 t fired, .

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DLCshifumi-PT-4a-CTLFireability-04: EF true state space

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35 AGEF EXCL 56/256 10/32 DLCshifumi-PT-4a-CTLFireability-10 1867985 m, 31881 m/sec, 47479707 t fired, .

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DLCshifumi-PT-4a-CTLFireability-10: AGEF 0 0 1 0 1 0 0 0
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DLCshifumi-PT-4a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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35 AGEF EXCL 61/256 11/32 DLCshifumi-PT-4a-CTLFireability-10 2031770 m, 32757 m/sec, 51585972 t fired, .

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35 AGEF EXCL 66/256 11/32 DLCshifumi-PT-4a-CTLFireability-10 2189716 m, 31589 m/sec, 55643353 t fired, .

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DLCshifumi-PT-4a-CTLFireability-04: EF true state space

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35 AGEF EXCL 71/256 12/32 DLCshifumi-PT-4a-CTLFireability-10 2357392 m, 33535 m/sec, 59819476 t fired, .

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DLCshifumi-PT-4a-CTLFireability-04: EF true state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
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DLCshifumi-PT-4a-CTLFireability-10: AGEF 0 0 1 0 1 0 0 0
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DLCshifumi-PT-4a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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35 AGEF EXCL 76/256 13/32 DLCshifumi-PT-4a-CTLFireability-10 2516017 m, 31725 m/sec, 63918398 t fired, .

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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
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35 AGEF EXCL 81/256 14/32 DLCshifumi-PT-4a-CTLFireability-10 2672054 m, 31207 m/sec, 67982473 t fired, .

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35 AGEF EXCL 86/256 15/32 DLCshifumi-PT-4a-CTLFireability-10 2824860 m, 30561 m/sec, 72001585 t fired, .

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DLCshifumi-PT-4a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
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35 AGEF EXCL 91/256 15/32 DLCshifumi-PT-4a-CTLFireability-10 2978451 m, 30718 m/sec, 76037675 t fired, .

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DLCshifumi-PT-4a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
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35 AGEF EXCL 96/256 16/32 DLCshifumi-PT-4a-CTLFireability-10 3129525 m, 30214 m/sec, 80058811 t fired, .

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35 AGEF EXCL 101/256 17/32 DLCshifumi-PT-4a-CTLFireability-10 3286092 m, 31313 m/sec, 84155215 t fired, .

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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
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35 AGEF EXCL 106/256 18/32 DLCshifumi-PT-4a-CTLFireability-10 3436641 m, 30109 m/sec, 88180532 t fired, .

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35 AGEF EXCL 111/256 18/32 DLCshifumi-PT-4a-CTLFireability-10 3589983 m, 30668 m/sec, 92241968 t fired, .

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35 AGEF EXCL 116/256 19/32 DLCshifumi-PT-4a-CTLFireability-10 3745599 m, 31123 m/sec, 96367575 t fired, .

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35 AGEF EXCL 121/256 20/32 DLCshifumi-PT-4a-CTLFireability-10 3896672 m, 30214 m/sec, 100432868 t fired, .

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35 AGEF EXCL 126/256 21/32 DLCshifumi-PT-4a-CTLFireability-10 4047792 m, 30224 m/sec, 104480369 t fired, .

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35 AGEF EXCL 131/256 21/32 DLCshifumi-PT-4a-CTLFireability-10 4200885 m, 30618 m/sec, 108531427 t fired, .

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35 AGEF EXCL 136/256 22/32 DLCshifumi-PT-4a-CTLFireability-10 4365480 m, 32919 m/sec, 112662855 t fired, .

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35 AGEF EXCL 141/256 23/32 DLCshifumi-PT-4a-CTLFireability-10 4530498 m, 33003 m/sec, 116788194 t fired, .

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35 AGEF EXCL 151/256 25/32 DLCshifumi-PT-4a-CTLFireability-10 4864299 m, 32397 m/sec, 125171527 t fired, .

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35 AGEF EXCL 156/256 25/32 DLCshifumi-PT-4a-CTLFireability-10 5022000 m, 31540 m/sec, 129334299 t fired, .

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35 AGEF EXCL 176/256 28/32 DLCshifumi-PT-4a-CTLFireability-10 5630784 m, 29261 m/sec, 145509483 t fired, .

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35 AGEF EXCL 201/256 32/32 DLCshifumi-PT-4a-CTLFireability-10 6424188 m, 31094 m/sec, 165682151 t fired, .

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DLCshifumi-PT-4a-CTLFireability-00: DISJ true findpath
DLCshifumi-PT-4a-CTLFireability-04: EF true state space

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DLCshifumi-PT-4a-CTLFireability-00: DISJ true findpath
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DLCshifumi-PT-4a-CTLFireability-13: CTL true CTL model checker
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DLCshifumi-PT-4a-CTLFireability-00: DISJ true findpath
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23 CTL EXCL/home/mcc/BenchKit/bin//../lola/bin//../BenchKit_head.sh: line 63: 376 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCshifumi-PT-4a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is DLCshifumi-PT-4a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r102-tall-167814477400826"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCshifumi-PT-4a.tgz
mv DLCshifumi-PT-4a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;