About the Execution of LoLA for DLCround-PT-13b
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2797.363 | 187085.00 | 532637.00 | 152.80 | TTTTTTTFFTFTFTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r102-tall-167814477300790.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is DLCround-PT-13b, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r102-tall-167814477300790
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.5M
-rw-r--r-- 1 mcc users 6.3K Feb 25 18:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 63K Feb 25 18:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Feb 25 18:45 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Feb 25 18:45 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 15:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 15:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 18:46 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 128K Feb 25 18:46 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.4K Feb 25 18:46 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 25 18:46 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 2.1M Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-13b-ReachabilityCardinality-00
FORMULA_NAME DLCround-PT-13b-ReachabilityCardinality-01
FORMULA_NAME DLCround-PT-13b-ReachabilityCardinality-02
FORMULA_NAME DLCround-PT-13b-ReachabilityCardinality-03
FORMULA_NAME DLCround-PT-13b-ReachabilityCardinality-04
FORMULA_NAME DLCround-PT-13b-ReachabilityCardinality-05
FORMULA_NAME DLCround-PT-13b-ReachabilityCardinality-06
FORMULA_NAME DLCround-PT-13b-ReachabilityCardinality-07
FORMULA_NAME DLCround-PT-13b-ReachabilityCardinality-08
FORMULA_NAME DLCround-PT-13b-ReachabilityCardinality-09
FORMULA_NAME DLCround-PT-13b-ReachabilityCardinality-10
FORMULA_NAME DLCround-PT-13b-ReachabilityCardinality-11
FORMULA_NAME DLCround-PT-13b-ReachabilityCardinality-12
FORMULA_NAME DLCround-PT-13b-ReachabilityCardinality-13
FORMULA_NAME DLCround-PT-13b-ReachabilityCardinality-14
FORMULA_NAME DLCround-PT-13b-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1678329598107
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-13b
Not applying reductions.
Model is PT
ReachabilityCardinality PT
starting LoLA
BK_INPUT DLCround-PT-13b
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA DLCround-PT-13b-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13b-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13b-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13b-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13b-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13b-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13b-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13b-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13b-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13b-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13b-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13b-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13b-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13b-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13b-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13b-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678329785192
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 1.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-00: AG 0 0 0 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-01: EF 0 0 0 0 0 0 0 0
DLCround-PT-13b-ReachabilityCardinality-02: EF 0 0 0 0 0 0 0 0
DLCround-PT-13b-ReachabilityCardinality-03: EF 0 0 0 0 0 0 0 0
DLCround-PT-13b-ReachabilityCardinality-04: EF 0 0 0 0 0 0 0 0
DLCround-PT-13b-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 0 0 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-07: AG 0 0 0 0 0 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 0 0 0 0 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 0 0 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-12: AG 0 0 0 0 0 0 0 0
DLCround-PT-13b-ReachabilityCardinality-13: EF 0 0 0 0 0 0 0 0
DLCround-PT-13b-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
DLCround-PT-13b-ReachabilityCardinality-15: AG 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 72 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 2.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type EXCL) for 12 DLCround-PT-13b-ReachabilityCardinality-04
lola: time limit : 153 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 48 (type FNDP) for 12 DLCround-PT-13b-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 49 (type EQUN) for 12 DLCround-PT-13b-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SRCH) for 12 DLCround-PT-13b-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 48 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-04
lola: result : true
lola: fired transitions : 4
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 49 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 51 (type SRCH) for DLCround-PT-13b-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 52 (type EXCL) for DLCround-PT-13b-ReachabilityCardinality-04 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-49.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 49 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-04
lola: result : true
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 58 (type EXCL) for 3 DLCround-PT-13b-ReachabilityCardinality-01
lola: time limit : 185 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 54 (type FNDP) for 3 DLCround-PT-13b-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type EQUN) for 3 DLCround-PT-13b-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 57 (type SRCH) for 3 DLCround-PT-13b-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 54 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-01
lola: result : true
lola: fired transitions : 159
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 55 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 57 (type SRCH) for DLCround-PT-13b-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 58 (type EXCL) for DLCround-PT-13b-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 79 (type EXCL) for 39 DLCround-PT-13b-ReachabilityCardinality-13
lola: time limit : 185 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 60 (type FNDP) for 6 DLCround-PT-13b-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type EQUN) for 6 DLCround-PT-13b-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 67 (type SRCH) for 6 DLCround-PT-13b-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 67 (type SRCH) for DLCround-PT-13b-ReachabilityCardinality-02
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 60 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 61 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 69 (type FNDP) for 30 DLCround-PT-13b-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type EQUN) for 30 DLCround-PT-13b-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SRCH) for 30 DLCround-PT-13b-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 60 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-02
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 72 (type SRCH) for DLCround-PT-13b-ReachabilityCardinality-10
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-61.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 79 (type EXCL) for DLCround-PT-13b-ReachabilityCardinality-13
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 69 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 70 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 87 (type EXCL) for 9 DLCround-PT-13b-ReachabilityCardinality-03
lola: time limit : 235 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 64 (type FNDP) for 36 DLCround-PT-13b-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-70.sara.
sara: place or transition ordering is non-deterministic
lola: LAUNCH task # 84 (type EQUN) for 36 DLCround-PT-13b-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 89 (type SRCH) for 36 DLCround-PT-13b-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 69 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-10
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 61 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-02
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-55.sara.
lola: FINISHED task # 70 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-10
lola: result : true
lola: FINISHED task # 89 (type SRCH) for DLCround-PT-13b-ReachabilityCardinality-12
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 64 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 84 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 66 (type FNDP) for 9 DLCround-PT-13b-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type EQUN) for 9 DLCround-PT-13b-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 86 (type SRCH) for 9 DLCround-PT-13b-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 64 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-12
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 84 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-12
lola: result : unknown
lola: FINISHED task # 66 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-03
lola: result : true
lola: fired transitions : 8
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 82 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 86 (type SRCH) for DLCround-PT-13b-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 87 (type EXCL) for DLCround-PT-13b-ReachabilityCardinality-03 (obsolete)
lola: FINISHED task # 86 (type SRCH) for DLCround-PT-13b-ReachabilityCardinality-03
lola: result : true
lola: markings : 10
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-82.sara.
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 97 (type EXCL) for 45 DLCround-PT-13b-ReachabilityCardinality-15
lola: time limit : 293 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 93 (type FNDP) for 45 DLCround-PT-13b-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type EQUN) for 45 DLCround-PT-13b-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type SRCH) for 45 DLCround-PT-13b-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 93 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-15
lola: result : true
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 94 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 96 (type SRCH) for DLCround-PT-13b-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 97 (type EXCL) for DLCround-PT-13b-ReachabilityCardinality-15 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-94.sara.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 107 (type EXCL) for 0 DLCround-PT-13b-ReachabilityCardinality-00
lola: time limit : 440 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 103 (type FNDP) for 0 DLCround-PT-13b-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 104 (type EQUN) for 0 DLCround-PT-13b-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 106 (type SRCH) for 0 DLCround-PT-13b-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-104.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-00: AG 0 1 4 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 5 0 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-07: AG 0 0 0 0 0 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 5 0 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-11: EF 0 5 0 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-14: AG 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
103 EF FNDP 1/503 0/5 DLCround-PT-13b-ReachabilityCardinality-00 54601 t fired, 1 attempts, .
104 EF STEQ 1/503 0/5 DLCround-PT-13b-ReachabilityCardinality-00 sara is running.
106 EF SRCH 1/587 1/5 DLCround-PT-13b-ReachabilityCardinality-00 49223 m, 9844 m/sec, 105864 t fired, .
107 EF EXCL 1/352 1/32 DLCround-PT-13b-ReachabilityCardinality-00 2266 m, 453 m/sec, 4926 t fired, .
Time elapsed: 77 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: Created skeleton in 1.000000 secs.
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 104 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-00
lola: result : false
lola: CANCELED task # 103 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 106 (type SRCH) for DLCround-PT-13b-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 107 (type EXCL) for DLCround-PT-13b-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 120 (type EXCL) for 24 DLCround-PT-13b-ReachabilityCardinality-08
lola: time limit : 502 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 133 (type FNDP) for 15 DLCround-PT-13b-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 134 (type EQUN) for 15 DLCround-PT-13b-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 136 (type SRCH) for 15 DLCround-PT-13b-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 133 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-05
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 134 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 136 (type SRCH) for DLCround-PT-13b-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 140 (type FNDP) for 42 DLCround-PT-13b-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 141 (type EQUN) for 42 DLCround-PT-13b-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 143 (type SRCH) for 42 DLCround-PT-13b-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 103 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 315376
lola: tried executions : 2
lola: time used : 4.000000
lola: memory pages used : 0
lola: FINISHED task # 140 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-14
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 141 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 143 (type SRCH) for DLCround-PT-13b-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 110 (type FNDP) for 27 DLCround-PT-13b-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type EQUN) for 27 DLCround-PT-13b-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 127 (type SRCH) for 27 DLCround-PT-13b-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-134.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 134 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-05
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-141.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 141 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-14
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-113.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 5 0 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-07: AG 0 5 0 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 3 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-11: EF 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 2/502 0/5 DLCround-PT-13b-ReachabilityCardinality-09 284840 t fired, 1 attempts, .
113 EF STEQ 2/502 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
120 EF EXCL 2/704 1/32 DLCround-PT-13b-ReachabilityCardinality-08 3285 m, 657 m/sec, 5947 t fired, .
127 EF SRCH 2/586 1/5 DLCround-PT-13b-ReachabilityCardinality-09 169548 m, 33909 m/sec, 272033 t fired, .
Time elapsed: 82 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 55 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-01
lola: result : true
lola: FINISHED task # 82 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-03
lola: result : true
lola: FINISHED task # 94 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-15
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 5 0 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-07: AG 0 5 0 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 3 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-11: EF 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 7/495 0/5 DLCround-PT-13b-ReachabilityCardinality-09 728781 t fired, 1 attempts, .
113 EF STEQ 7/495 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
120 EF EXCL 7/704 1/32 DLCround-PT-13b-ReachabilityCardinality-08 10633 m, 1469 m/sec, 19869 t fired, .
127 EF SRCH 7/579 3/5 DLCround-PT-13b-ReachabilityCardinality-09 468069 m, 59704 m/sec, 766830 t fired, .
Time elapsed: 87 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 127 (type SRCH) for DLCround-PT-13b-ReachabilityCardinality-09 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 5 0 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-07: AG 0 5 0 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
DLCround-PT-13b-ReachabilityCardinality-11: EF 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 12/495 0/5 DLCround-PT-13b-ReachabilityCardinality-09 1584673 t fired, 2 attempts, .
113 EF STEQ 12/495 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
120 EF EXCL 12/704 1/32 DLCround-PT-13b-ReachabilityCardinality-08 23490 m, 2571 m/sec, 43936 t fired, .
Time elapsed: 92 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 147 (type FNDP) for 21 DLCround-PT-13b-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 147 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-07
lola: result : true
lola: fired transitions : 119
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 99 (type FNDP) for 33 DLCround-PT-13b-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 99 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 23
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 118 (type FNDP) for 18 DLCround-PT-13b-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 17/1161 0/5 DLCround-PT-13b-ReachabilityCardinality-09 1946945 t fired, 2 attempts, .
113 EF STEQ 17/868 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
118 EF FNDP 5/877 0/5 DLCround-PT-13b-ReachabilityCardinality-06 934822 t fired, 1 attempts, .
120 EF EXCL 17/1173 1/32 DLCround-PT-13b-ReachabilityCardinality-08 36277 m, 2557 m/sec, 68017 t fired, .
Time elapsed: 97 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 22/1156 0/5 DLCround-PT-13b-ReachabilityCardinality-09 2425097 t fired, 3 attempts, .
113 EF STEQ 22/863 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
118 EF FNDP 10/872 0/5 DLCround-PT-13b-ReachabilityCardinality-06 1747333 t fired, 2 attempts, .
120 EF EXCL 22/1173 1/32 DLCround-PT-13b-ReachabilityCardinality-08 48997 m, 2544 m/sec, 92110 t fired, .
Time elapsed: 102 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 27/1151 0/5 DLCround-PT-13b-ReachabilityCardinality-09 2677614 t fired, 3 attempts, .
113 EF STEQ 27/858 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
118 EF FNDP 15/867 0/5 DLCround-PT-13b-ReachabilityCardinality-06 2252881 t fired, 3 attempts, .
120 EF EXCL 27/1173 1/32 DLCround-PT-13b-ReachabilityCardinality-08 61746 m, 2549 m/sec, 116080 t fired, .
Time elapsed: 107 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 32/1146 0/5 DLCround-PT-13b-ReachabilityCardinality-09 2846575 t fired, 3 attempts, .
113 EF STEQ 32/853 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
118 EF FNDP 20/862 0/5 DLCround-PT-13b-ReachabilityCardinality-06 2404008 t fired, 3 attempts, .
120 EF EXCL 32/1173 1/32 DLCround-PT-13b-ReachabilityCardinality-08 74350 m, 2520 m/sec, 139942 t fired, .
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DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 37/1141 0/5 DLCround-PT-13b-ReachabilityCardinality-09 3021111 t fired, 4 attempts, .
113 EF STEQ 37/848 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
118 EF FNDP 25/857 0/5 DLCround-PT-13b-ReachabilityCardinality-06 2545327 t fired, 3 attempts, .
120 EF EXCL 37/1173 1/32 DLCround-PT-13b-ReachabilityCardinality-08 86935 m, 2517 m/sec, 163612 t fired, .
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DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 42/1136 0/5 DLCround-PT-13b-ReachabilityCardinality-09 3181705 t fired, 4 attempts, .
113 EF STEQ 42/843 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
118 EF FNDP 30/852 0/5 DLCround-PT-13b-ReachabilityCardinality-06 2682120 t fired, 3 attempts, .
120 EF EXCL 42/1173 1/32 DLCround-PT-13b-ReachabilityCardinality-08 99399 m, 2492 m/sec, 187768 t fired, .
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DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 47/1131 0/5 DLCround-PT-13b-ReachabilityCardinality-09 3337456 t fired, 4 attempts, .
113 EF STEQ 47/838 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
118 EF FNDP 35/847 0/5 DLCround-PT-13b-ReachabilityCardinality-06 2818614 t fired, 3 attempts, .
120 EF EXCL 47/1173 1/32 DLCround-PT-13b-ReachabilityCardinality-08 111894 m, 2499 m/sec, 211872 t fired, .
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DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 52/1126 0/5 DLCround-PT-13b-ReachabilityCardinality-09 3491259 t fired, 4 attempts, .
113 EF STEQ 52/833 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
118 EF FNDP 40/842 0/5 DLCround-PT-13b-ReachabilityCardinality-06 2956612 t fired, 3 attempts, .
120 EF EXCL 52/1173 1/32 DLCround-PT-13b-ReachabilityCardinality-08 124344 m, 2490 m/sec, 236018 t fired, .
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DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 57/1121 0/5 DLCround-PT-13b-ReachabilityCardinality-09 3643089 t fired, 4 attempts, .
113 EF STEQ 57/828 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
118 EF FNDP 45/837 0/5 DLCround-PT-13b-ReachabilityCardinality-06 3110878 t fired, 4 attempts, .
120 EF EXCL 57/1173 1/32 DLCround-PT-13b-ReachabilityCardinality-08 136879 m, 2507 m/sec, 259873 t fired, .
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DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 62/1116 0/5 DLCround-PT-13b-ReachabilityCardinality-09 3793532 t fired, 4 attempts, .
113 EF STEQ 62/823 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
118 EF FNDP 50/832 0/5 DLCround-PT-13b-ReachabilityCardinality-06 3243838 t fired, 4 attempts, .
120 EF EXCL 62/1173 1/32 DLCround-PT-13b-ReachabilityCardinality-08 149360 m, 2496 m/sec, 283807 t fired, .
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DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 67/1111 0/5 DLCround-PT-13b-ReachabilityCardinality-09 3938240 t fired, 4 attempts, .
113 EF STEQ 67/818 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
118 EF FNDP 55/827 0/5 DLCround-PT-13b-ReachabilityCardinality-06 3379218 t fired, 4 attempts, .
120 EF EXCL 67/1173 1/32 DLCround-PT-13b-ReachabilityCardinality-08 161851 m, 2498 m/sec, 307807 t fired, .
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DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 72/1106 0/5 DLCround-PT-13b-ReachabilityCardinality-09 4092685 t fired, 5 attempts, .
113 EF STEQ 72/813 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
118 EF FNDP 60/822 0/5 DLCround-PT-13b-ReachabilityCardinality-06 3513151 t fired, 4 attempts, .
120 EF EXCL 72/1173 2/32 DLCround-PT-13b-ReachabilityCardinality-08 174485 m, 2526 m/sec, 331181 t fired, .
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DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 77/1101 0/5 DLCround-PT-13b-ReachabilityCardinality-09 4233929 t fired, 5 attempts, .
113 EF STEQ 77/808 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
118 EF FNDP 65/817 0/5 DLCround-PT-13b-ReachabilityCardinality-06 3646426 t fired, 4 attempts, .
120 EF EXCL 77/1173 2/32 DLCround-PT-13b-ReachabilityCardinality-08 187060 m, 2515 m/sec, 354706 t fired, .
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DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
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DLCround-PT-13b-ReachabilityCardinality-06: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 82/1096 0/5 DLCround-PT-13b-ReachabilityCardinality-09 4371086 t fired, 5 attempts, .
113 EF STEQ 82/803 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
118 EF FNDP 70/812 0/5 DLCround-PT-13b-ReachabilityCardinality-06 3780420 t fired, 4 attempts, .
120 EF EXCL 82/1173 2/32 DLCround-PT-13b-ReachabilityCardinality-08 199626 m, 2513 m/sec, 378520 t fired, .
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DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 87/1091 0/5 DLCround-PT-13b-ReachabilityCardinality-09 4507346 t fired, 5 attempts, .
113 EF STEQ 87/798 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
118 EF FNDP 75/807 0/5 DLCround-PT-13b-ReachabilityCardinality-06 3909389 t fired, 4 attempts, .
120 EF EXCL 87/1173 2/32 DLCround-PT-13b-ReachabilityCardinality-08 212208 m, 2516 m/sec, 402206 t fired, .
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DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 92/1086 0/5 DLCround-PT-13b-ReachabilityCardinality-09 4643473 t fired, 5 attempts, .
113 EF STEQ 92/793 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
118 EF FNDP 80/802 0/5 DLCround-PT-13b-ReachabilityCardinality-06 4042685 t fired, 5 attempts, .
120 EF EXCL 92/1173 2/32 DLCround-PT-13b-ReachabilityCardinality-08 224767 m, 2511 m/sec, 425957 t fired, .
Time elapsed: 172 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-09: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
110 EF FNDP 97/1081 0/5 DLCround-PT-13b-ReachabilityCardinality-09 4775527 t fired, 5 attempts, .
113 EF STEQ 97/788 0/5 DLCround-PT-13b-ReachabilityCardinality-09 sara is running.
118 EF FNDP 85/797 0/5 DLCround-PT-13b-ReachabilityCardinality-06 4171005 t fired, 5 attempts, .
120 EF EXCL 97/1173 2/32 DLCround-PT-13b-ReachabilityCardinality-08 237228 m, 2492 m/sec, 449877 t fired, .
Time elapsed: 177 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 113 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 110 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 122 (type EQUN) for 18 DLCround-PT-13b-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 124 (type SRCH) for 18 DLCround-PT-13b-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 110 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 4894743
lola: tried executions : 6
lola: time used : 102.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-122.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-09: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-13b-ReachabilityCardinality-06: AG 0 2 3 0 1 0 0 0
DLCround-PT-13b-ReachabilityCardinality-08: AG 0 4 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
118 EF FNDP 90/1664 0/5 DLCround-PT-13b-ReachabilityCardinality-06 4297080 t fired, 5 attempts, .
120 EF EXCL 102/1760 2/32 DLCround-PT-13b-ReachabilityCardinality-08 249595 m, 2473 m/sec, 473699 t fired, .
122 EF STEQ 0/1139 0/5 DLCround-PT-13b-ReachabilityCardinality-06 sara is running.
124 EF SRCH 0/1139 1/5 DLCround-PT-13b-ReachabilityCardinality-06 44655 m, 8931 m/sec, 68075 t fired, .
Time elapsed: 182 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 122 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-06
lola: result : false
lola: CANCELED task # 118 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 124 (type SRCH) for DLCround-PT-13b-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 112 (type FNDP) for 24 DLCround-PT-13b-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 116 (type EQUN) for 24 DLCround-PT-13b-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 119 (type SRCH) for 24 DLCround-PT-13b-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: FINISHED task # 118 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 4405918
lola: tried executions : 6
lola: time used : 95.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 112 (type FNDP) for DLCround-PT-13b-ReachabilityCardinality-08
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 116 (type EQUN) for DLCround-PT-13b-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 119 (type SRCH) for DLCround-PT-13b-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 120 (type EXCL) for DLCround-PT-13b-ReachabilityCardinality-08 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-13b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-01: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-02: EF true tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-03: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-04: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-05: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-06: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-07: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-08: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-09: AG true state equation
DLCround-PT-13b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-11: EF true findpath
DLCround-PT-13b-ReachabilityCardinality-12: AG false tandem / insertion
DLCround-PT-13b-ReachabilityCardinality-13: EF true tandem / relaxed
DLCround-PT-13b-ReachabilityCardinality-14: AG false findpath
DLCround-PT-13b-ReachabilityCardinality-15: AG false findpath
Time elapsed: 187 secs. Pages in use: 7
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-13b"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is DLCround-PT-13b, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r102-tall-167814477300790"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-13b.tgz
mv DLCround-PT-13b execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;