fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r071-smll-167814397800306
Last Updated
May 14, 2023

About the Execution of LoLa+red for ClientsAndServers-PT-N0050P0

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
3528.035 202448.00 194209.00 966.70 T??TF??F?F?F?T?T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r071-smll-167814397800306.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ClientsAndServers-PT-N0050P0, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r071-smll-167814397800306
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 388K
-rw-r--r-- 1 mcc users 5.8K Feb 26 13:18 CTLCardinality.txt
-rw-r--r-- 1 mcc users 57K Feb 26 13:18 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K Feb 26 13:17 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Feb 26 13:17 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 15:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 15:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 15:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.5K Feb 26 13:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 72K Feb 26 13:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.4K Feb 26 13:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 73K Feb 26 13:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 15:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 9.2K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ClientsAndServers-PT-N0050P0-CTLFireability-00
FORMULA_NAME ClientsAndServers-PT-N0050P0-CTLFireability-01
FORMULA_NAME ClientsAndServers-PT-N0050P0-CTLFireability-02
FORMULA_NAME ClientsAndServers-PT-N0050P0-CTLFireability-03
FORMULA_NAME ClientsAndServers-PT-N0050P0-CTLFireability-04
FORMULA_NAME ClientsAndServers-PT-N0050P0-CTLFireability-05
FORMULA_NAME ClientsAndServers-PT-N0050P0-CTLFireability-06
FORMULA_NAME ClientsAndServers-PT-N0050P0-CTLFireability-07
FORMULA_NAME ClientsAndServers-PT-N0050P0-CTLFireability-08
FORMULA_NAME ClientsAndServers-PT-N0050P0-CTLFireability-09
FORMULA_NAME ClientsAndServers-PT-N0050P0-CTLFireability-10
FORMULA_NAME ClientsAndServers-PT-N0050P0-CTLFireability-11
FORMULA_NAME ClientsAndServers-PT-N0050P0-CTLFireability-12
FORMULA_NAME ClientsAndServers-PT-N0050P0-CTLFireability-13
FORMULA_NAME ClientsAndServers-PT-N0050P0-CTLFireability-14
FORMULA_NAME ClientsAndServers-PT-N0050P0-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678269698285

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ClientsAndServers-PT-N0050P0
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 10:01:41] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 10:01:41] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 10:01:42] [INFO ] Load time of PNML (sax parser for PT used): 47 ms
[2023-03-08 10:01:42] [INFO ] Transformed 25 places.
[2023-03-08 10:01:42] [INFO ] Transformed 18 transitions.
[2023-03-08 10:01:42] [INFO ] Parsed PT model containing 25 places and 18 transitions and 54 arcs in 209 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 24 ms.
Support contains 25 out of 25 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Applied a total of 0 rules in 20 ms. Remains 25 /25 variables (removed 0) and now considering 18/18 (removed 0) transitions.
// Phase 1: matrix 18 rows 25 cols
[2023-03-08 10:01:42] [INFO ] Computed 8 place invariants in 7 ms
[2023-03-08 10:01:42] [INFO ] Implicit Places using invariants in 283 ms returned []
[2023-03-08 10:01:42] [INFO ] Invariant cache hit.
[2023-03-08 10:01:42] [INFO ] Implicit Places using invariants and state equation in 93 ms returned []
Implicit Place search using SMT with State Equation took 439 ms to find 0 implicit places.
[2023-03-08 10:01:42] [INFO ] Invariant cache hit.
[2023-03-08 10:01:42] [INFO ] Dead Transitions using invariants and state equation in 112 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 578 ms. Remains : 25/25 places, 18/18 transitions.
Support contains 25 out of 25 places after structural reductions.
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 37 ms
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 13 ms
[2023-03-08 10:01:43] [INFO ] Input system was already deterministic with 18 transitions.
Incomplete random walk after 10093 steps, including 2 resets, run finished after 150 ms. (steps per millisecond=67 ) properties (out of 30) seen :29
Finished Best-First random walk after 320 steps, including 0 resets, run visited all 1 properties in 6 ms. (steps per millisecond=53 )
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 8 ms
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 10 ms
[2023-03-08 10:01:43] [INFO ] Input system was already deterministic with 18 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 4 places :
Implicit places reduction removed 4 places
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 9 rules applied. Total rules applied 9 place count 21 transition count 13
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 1 with 5 rules applied. Total rules applied 14 place count 16 transition count 13
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 14 place count 16 transition count 11
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 18 place count 14 transition count 11
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 26 place count 10 transition count 7
Applied a total of 26 rules in 22 ms. Remains 10 /25 variables (removed 15) and now considering 7/18 (removed 11) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 23 ms. Remains : 10/25 places, 7/18 transitions.
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:01:43] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 2 places :
Implicit places reduction removed 2 places
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 23 transition count 15
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 8 place count 20 transition count 15
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 8 place count 20 transition count 13
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 12 place count 18 transition count 13
Applied a total of 12 rules in 8 ms. Remains 18 /25 variables (removed 7) and now considering 13/18 (removed 5) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 18/25 places, 13/18 transitions.
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:01:43] [INFO ] Input system was already deterministic with 13 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 4 places :
Implicit places reduction removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 21 transition count 18
Applied a total of 4 rules in 2 ms. Remains 21 /25 variables (removed 4) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 21/25 places, 18/18 transitions.
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 17 ms
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:01:43] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 4 places :
Implicit places reduction removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 21 transition count 18
Applied a total of 4 rules in 2 ms. Remains 21 /25 variables (removed 4) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 21/25 places, 18/18 transitions.
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:01:43] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 3 places :
Implicit places reduction removed 3 places
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 22 transition count 18
Applied a total of 3 rules in 2 ms. Remains 22 /25 variables (removed 3) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 22/25 places, 18/18 transitions.
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:01:43] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 3 places :
Implicit places reduction removed 3 places
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 22 transition count 18
Applied a total of 3 rules in 2 ms. Remains 22 /25 variables (removed 3) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 22/25 places, 18/18 transitions.
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:01:43] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 3 places :
Implicit places reduction removed 3 places
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 22 transition count 18
Applied a total of 3 rules in 1 ms. Remains 22 /25 variables (removed 3) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 22/25 places, 18/18 transitions.
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:01:43] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 2 places :
Implicit places reduction removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 23 transition count 18
Applied a total of 2 rules in 2 ms. Remains 23 /25 variables (removed 2) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 23/25 places, 18/18 transitions.
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:01:43] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 2 places :
Implicit places reduction removed 2 places
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 23 transition count 16
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 6 place count 21 transition count 16
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 6 place count 21 transition count 15
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 8 place count 20 transition count 15
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 14 place count 17 transition count 12
Applied a total of 14 rules in 9 ms. Remains 17 /25 variables (removed 8) and now considering 12/18 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 17/25 places, 12/18 transitions.
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 2 ms
[2023-03-08 10:01:43] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 2 places :
Implicit places reduction removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 23 transition count 18
Applied a total of 2 rules in 2 ms. Remains 23 /25 variables (removed 2) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 23/25 places, 18/18 transitions.
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:01:43] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 3 places :
Implicit places reduction removed 3 places
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 22 transition count 18
Applied a total of 3 rules in 2 ms. Remains 22 /25 variables (removed 3) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 22/25 places, 18/18 transitions.
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:01:43] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 3 places :
Implicit places reduction removed 3 places
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 22 transition count 18
Applied a total of 3 rules in 2 ms. Remains 22 /25 variables (removed 3) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 22/25 places, 18/18 transitions.
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 2 ms
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:01:43] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 4 places :
Implicit places reduction removed 4 places
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 9 rules applied. Total rules applied 9 place count 21 transition count 13
Reduce places removed 5 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 6 rules applied. Total rules applied 15 place count 16 transition count 12
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 16 place count 15 transition count 12
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 16 place count 15 transition count 10
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 20 place count 13 transition count 10
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 3 with 8 rules applied. Total rules applied 28 place count 9 transition count 6
Applied a total of 28 rules in 8 ms. Remains 9 /25 variables (removed 16) and now considering 6/18 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 9/25 places, 6/18 transitions.
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:01:43] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 3 places :
Implicit places reduction removed 3 places
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 22 transition count 18
Applied a total of 3 rules in 1 ms. Remains 22 /25 variables (removed 3) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 22/25 places, 18/18 transitions.
[2023-03-08 10:01:43] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:01:44] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:01:44] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 3 places :
Implicit places reduction removed 3 places
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 22 transition count 18
Applied a total of 3 rules in 2 ms. Remains 22 /25 variables (removed 3) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 22/25 places, 18/18 transitions.
[2023-03-08 10:01:44] [INFO ] Flatten gal took : 2 ms
[2023-03-08 10:01:44] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:01:44] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 4 places :
Implicit places reduction removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 21 transition count 18
Applied a total of 4 rules in 1 ms. Remains 21 /25 variables (removed 4) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 21/25 places, 18/18 transitions.
[2023-03-08 10:01:44] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:01:44] [INFO ] Flatten gal took : 2 ms
[2023-03-08 10:01:44] [INFO ] Input system was already deterministic with 18 transitions.
[2023-03-08 10:01:44] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:01:44] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:01:44] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-08 10:01:44] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 25 places, 18 transitions and 54 arcs took 0 ms.
Total runtime 2295 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ClientsAndServers-PT-N0050P0
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA ClientsAndServers-PT-N0050P0-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0050P0-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0050P0-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0050P0-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0050P0-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0050P0-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0050P0-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0050P0-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678269900733

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 4 (type EXCL) for 3 ClientsAndServers-PT-N0050P0-CTLFireability-01
lola: time limit : 144 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/211 9/32 ClientsAndServers-PT-N0050P0-CTLFireability-01 2017964 m, 403592 m/sec, 5474227 t fired, .

Time elapsed: 5 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/211 15/32 ClientsAndServers-PT-N0050P0-CTLFireability-01 3678244 m, 332056 m/sec, 10191460 t fired, .

Time elapsed: 10 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 15/211 22/32 ClientsAndServers-PT-N0050P0-CTLFireability-01 5433854 m, 351122 m/sec, 15557532 t fired, .

Time elapsed: 15 secs. Pages in use: 22
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 20/211 29/32 ClientsAndServers-PT-N0050P0-CTLFireability-01 6995000 m, 312229 m/sec, 20548388 t fired, .

Time elapsed: 20 secs. Pages in use: 29
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 4 (type EXCL) for ClientsAndServers-PT-N0050P0-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 25 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 50 (type EXCL) for 49 ClientsAndServers-PT-N0050P0-CTLFireability-15
lola: time limit : 223 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for ClientsAndServers-PT-N0050P0-CTLFireability-15
lola: result : true
lola: markings : 2500
lola: fired transitions : 2500
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 ClientsAndServers-PT-N0050P0-CTLFireability-14
lola: time limit : 238 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 5/238 20/32 ClientsAndServers-PT-N0050P0-CTLFireability-14 4583071 m, 916614 m/sec, 5006006 t fired, .

Time elapsed: 30 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 47 (type EXCL) for ClientsAndServers-PT-N0050P0-CTLFireability-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 35 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 44 (type EXCL) for 43 ClientsAndServers-PT-N0050P0-CTLFireability-13
lola: time limit : 254 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for ClientsAndServers-PT-N0050P0-CTLFireability-13
lola: result : true
lola: markings : 2501
lola: fired transitions : 2500
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 37 ClientsAndServers-PT-N0050P0-CTLFireability-11
lola: time limit : 274 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for ClientsAndServers-PT-N0050P0-CTLFireability-11
lola: result : false
lola: markings : 2501
lola: fired transitions : 5399
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 35 (type EXCL) for 34 ClientsAndServers-PT-N0050P0-CTLFireability-10
lola: time limit : 297 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 5/297 8/32 ClientsAndServers-PT-N0050P0-CTLFireability-10 1805445 m, 361089 m/sec, 3755145 t fired, .

Time elapsed: 40 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 10/297 13/32 ClientsAndServers-PT-N0050P0-CTLFireability-10 3019027 m, 242716 m/sec, 7412449 t fired, .

Time elapsed: 45 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 15/297 18/32 ClientsAndServers-PT-N0050P0-CTLFireability-10 4163151 m, 228824 m/sec, 10954488 t fired, .

Time elapsed: 50 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 20/297 23/32 ClientsAndServers-PT-N0050P0-CTLFireability-10 5286032 m, 224576 m/sec, 14415140 t fired, .

Time elapsed: 55 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 25/297 27/32 ClientsAndServers-PT-N0050P0-CTLFireability-10 6346023 m, 211998 m/sec, 17802558 t fired, .

Time elapsed: 60 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 30/297 31/32 ClientsAndServers-PT-N0050P0-CTLFireability-10 7372454 m, 205286 m/sec, 21127637 t fired, .

Time elapsed: 65 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 35 (type EXCL) for ClientsAndServers-PT-N0050P0-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 70 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 32 (type EXCL) for 31 ClientsAndServers-PT-N0050P0-CTLFireability-09
lola: time limit : 320 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for ClientsAndServers-PT-N0050P0-CTLFireability-09
lola: result : false
lola: markings : 208750
lola: fired transitions : 213941
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 ClientsAndServers-PT-N0050P0-CTLFireability-07
lola: time limit : 353 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for ClientsAndServers-PT-N0050P0-CTLFireability-07
lola: result : false
lola: markings : 373484
lola: fired transitions : 456328
lola: time used : 1.000000
lola: memory pages used : 2
lola: LAUNCH task # 19 (type EXCL) for 18 ClientsAndServers-PT-N0050P0-CTLFireability-06
lola: time limit : 392 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 4/392 8/32 ClientsAndServers-PT-N0050P0-CTLFireability-06 1669262 m, 333852 m/sec, 4628304 t fired, .

Time elapsed: 75 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 9/392 14/32 ClientsAndServers-PT-N0050P0-CTLFireability-06 3241860 m, 314519 m/sec, 9384173 t fired, .

Time elapsed: 80 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 14/392 20/32 ClientsAndServers-PT-N0050P0-CTLFireability-06 4611654 m, 273958 m/sec, 13678367 t fired, .

Time elapsed: 85 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 19/392 25/32 ClientsAndServers-PT-N0050P0-CTLFireability-06 5858629 m, 249395 m/sec, 17701367 t fired, .

Time elapsed: 90 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 24/392 30/32 ClientsAndServers-PT-N0050P0-CTLFireability-06 7064675 m, 241209 m/sec, 21641667 t fired, .

Time elapsed: 95 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 19 (type EXCL) for ClientsAndServers-PT-N0050P0-CTLFireability-06 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 100 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 16 (type EXCL) for 15 ClientsAndServers-PT-N0050P0-CTLFireability-05
lola: time limit : 437 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/437 19/32 ClientsAndServers-PT-N0050P0-CTLFireability-05 4309130 m, 861826 m/sec, 5166891 t fired, .

Time elapsed: 105 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 16 (type EXCL) for ClientsAndServers-PT-N0050P0-CTLFireability-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 110 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 13 (type EXCL) for 12 ClientsAndServers-PT-N0050P0-CTLFireability-04
lola: time limit : 498 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for ClientsAndServers-PT-N0050P0-CTLFireability-04
lola: result : false
lola: markings : 2500
lola: fired transitions : 2501
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 ClientsAndServers-PT-N0050P0-CTLFireability-03
lola: time limit : 581 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for ClientsAndServers-PT-N0050P0-CTLFireability-03
lola: result : true
lola: markings : 2501
lola: fired transitions : 2500
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 ClientsAndServers-PT-N0050P0-CTLFireability-02
lola: time limit : 698 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/698 4/32 ClientsAndServers-PT-N0050P0-CTLFireability-02 930739 m, 186147 m/sec, 3773489 t fired, .

Time elapsed: 115 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/698 8/32 ClientsAndServers-PT-N0050P0-CTLFireability-02 1891032 m, 192058 m/sec, 7963946 t fired, .

Time elapsed: 120 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 15/698 12/32 ClientsAndServers-PT-N0050P0-CTLFireability-02 2772462 m, 176286 m/sec, 11900965 t fired, .

Time elapsed: 125 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 20/698 16/32 ClientsAndServers-PT-N0050P0-CTLFireability-02 3648085 m, 175124 m/sec, 15714895 t fired, .

Time elapsed: 130 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 25/698 19/32 ClientsAndServers-PT-N0050P0-CTLFireability-02 4486236 m, 167630 m/sec, 19407344 t fired, .

Time elapsed: 135 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 30/698 23/32 ClientsAndServers-PT-N0050P0-CTLFireability-02 5295894 m, 161931 m/sec, 23046855 t fired, .

Time elapsed: 140 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 35/698 26/32 ClientsAndServers-PT-N0050P0-CTLFireability-02 6090459 m, 158913 m/sec, 26613920 t fired, .

Time elapsed: 145 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 40/698 29/32 ClientsAndServers-PT-N0050P0-CTLFireability-02 6885939 m, 159096 m/sec, 30207805 t fired, .

Time elapsed: 150 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 7 (type EXCL) for ClientsAndServers-PT-N0050P0-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 155 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 52 (type EXCL) for 24 ClientsAndServers-PT-N0050P0-CTLFireability-08
lola: time limit : 861 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for ClientsAndServers-PT-N0050P0-CTLFireability-08
lola: result : true
lola: markings : 1201
lola: fired transitions : 1200
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 53 (type EXCL) for 40 ClientsAndServers-PT-N0050P0-CTLFireability-12
lola: time limit : 1148 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 1 0 0 3 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 AGEF EXCL 5/1148 10/32 ClientsAndServers-PT-N0050P0-CTLFireability-12 2687059 m, 537411 m/sec, 4668265 t fired, .

Time elapsed: 160 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 1 0 0 3 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 AGEF EXCL 10/1148 19/32 ClientsAndServers-PT-N0050P0-CTLFireability-12 5010367 m, 464661 m/sec, 8814672 t fired, .

Time elapsed: 165 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 1 0 0 3 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 AGEF EXCL 15/1148 26/32 ClientsAndServers-PT-N0050P0-CTLFireability-12 7028751 m, 403676 m/sec, 12531368 t fired, .

Time elapsed: 170 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 53 (type EXCL) for ClientsAndServers-PT-N0050P0-CTLFireability-12 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 1 0 0 3 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 175 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 1 (type EXCL) for 0 ClientsAndServers-PT-N0050P0-CTLFireability-00
lola: time limit : 1712 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for ClientsAndServers-PT-N0050P0-CTLFireability-00
lola: result : true
lola: markings : 343601
lola: fired transitions : 1025252
lola: time used : 1.000000
lola: memory pages used : 2
lola: LAUNCH task # 29 (type EXCL) for 24 ClientsAndServers-PT-N0050P0-CTLFireability-08
lola: time limit : 3424 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 0 1 0 3 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 4/3424 9/32 ClientsAndServers-PT-N0050P0-CTLFireability-08 2022768 m, 404553 m/sec, 4552014 t fired, .

Time elapsed: 180 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 0 1 0 3 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 9/3424 18/32 ClientsAndServers-PT-N0050P0-CTLFireability-08 4130816 m, 421609 m/sec, 9874353 t fired, .

Time elapsed: 185 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 0 1 0 3 0 0 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 14/3424 27/32 ClientsAndServers-PT-N0050P0-CTLFireability-08 6370676 m, 447972 m/sec, 15550044 t fired, .

Time elapsed: 190 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 29 (type EXCL) for ClientsAndServers-PT-N0050P0-CTLFireability-08 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ 0 0 0 0 3 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 195 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0050P0-CTLFireability-00: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-01: CTL unknown AGGR
ClientsAndServers-PT-N0050P0-CTLFireability-02: CTL unknown AGGR
ClientsAndServers-PT-N0050P0-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-04: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-05: CTL unknown AGGR
ClientsAndServers-PT-N0050P0-CTLFireability-06: CTL unknown AGGR
ClientsAndServers-PT-N0050P0-CTLFireability-07: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-08: DISJ unknown DISJ
ClientsAndServers-PT-N0050P0-CTLFireability-09: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-10: CTL unknown AGGR
ClientsAndServers-PT-N0050P0-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-12: EFAG unknown AGGR
ClientsAndServers-PT-N0050P0-CTLFireability-13: CTL true CTL model checker
ClientsAndServers-PT-N0050P0-CTLFireability-14: CTL unknown AGGR
ClientsAndServers-PT-N0050P0-CTLFireability-15: CTL true CTL model checker


Time elapsed: 195 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ClientsAndServers-PT-N0050P0"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ClientsAndServers-PT-N0050P0, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r071-smll-167814397800306"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ClientsAndServers-PT-N0050P0.tgz
mv ClientsAndServers-PT-N0050P0 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;