fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r071-smll-167814397800258
Last Updated
May 14, 2023

About the Execution of LoLa+red for ClientsAndServers-PT-N0010P2

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1917.188 97665.00 95994.00 1041.50 FFFTT?FFFFFFF?FT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r071-smll-167814397800258.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ClientsAndServers-PT-N0010P2, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r071-smll-167814397800258
=====================================================================

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preparation of the directory to be used:
/home/mcc/execution
total 512K
-rw-r--r-- 1 mcc users 7.8K Feb 26 13:24 CTLCardinality.txt
-rw-r--r-- 1 mcc users 91K Feb 26 13:24 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 26 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 26 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:43 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 15:43 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:43 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 15:43 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.4K Feb 26 13:25 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 100K Feb 26 13:25 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 26 13:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 115K Feb 26 13:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 15:43 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:43 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 9.2K Mar 5 18:22 model.pnml

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content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ClientsAndServers-PT-N0010P2-CTLFireability-00
FORMULA_NAME ClientsAndServers-PT-N0010P2-CTLFireability-01
FORMULA_NAME ClientsAndServers-PT-N0010P2-CTLFireability-02
FORMULA_NAME ClientsAndServers-PT-N0010P2-CTLFireability-03
FORMULA_NAME ClientsAndServers-PT-N0010P2-CTLFireability-04
FORMULA_NAME ClientsAndServers-PT-N0010P2-CTLFireability-05
FORMULA_NAME ClientsAndServers-PT-N0010P2-CTLFireability-06
FORMULA_NAME ClientsAndServers-PT-N0010P2-CTLFireability-07
FORMULA_NAME ClientsAndServers-PT-N0010P2-CTLFireability-08
FORMULA_NAME ClientsAndServers-PT-N0010P2-CTLFireability-09
FORMULA_NAME ClientsAndServers-PT-N0010P2-CTLFireability-10
FORMULA_NAME ClientsAndServers-PT-N0010P2-CTLFireability-11
FORMULA_NAME ClientsAndServers-PT-N0010P2-CTLFireability-12
FORMULA_NAME ClientsAndServers-PT-N0010P2-CTLFireability-13
FORMULA_NAME ClientsAndServers-PT-N0010P2-CTLFireability-14
FORMULA_NAME ClientsAndServers-PT-N0010P2-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678263651070

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ClientsAndServers-PT-N0010P2
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 08:20:54] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 08:20:54] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 08:20:54] [INFO ] Load time of PNML (sax parser for PT used): 47 ms
[2023-03-08 08:20:54] [INFO ] Transformed 25 places.
[2023-03-08 08:20:54] [INFO ] Transformed 18 transitions.
[2023-03-08 08:20:54] [INFO ] Parsed PT model containing 25 places and 18 transitions and 54 arcs in 189 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 26 ms.
Support contains 25 out of 25 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Applied a total of 0 rules in 18 ms. Remains 25 /25 variables (removed 0) and now considering 18/18 (removed 0) transitions.
// Phase 1: matrix 18 rows 25 cols
[2023-03-08 08:20:54] [INFO ] Computed 8 place invariants in 8 ms
[2023-03-08 08:20:54] [INFO ] Implicit Places using invariants in 249 ms returned []
[2023-03-08 08:20:54] [INFO ] Invariant cache hit.
[2023-03-08 08:20:54] [INFO ] Implicit Places using invariants and state equation in 99 ms returned []
Implicit Place search using SMT with State Equation took 406 ms to find 0 implicit places.
[2023-03-08 08:20:54] [INFO ] Invariant cache hit.
[2023-03-08 08:20:55] [INFO ] Dead Transitions using invariants and state equation in 84 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 512 ms. Remains : 25/25 places, 18/18 transitions.
Support contains 25 out of 25 places after structural reductions.
[2023-03-08 08:20:55] [INFO ] Flatten gal took : 32 ms
[2023-03-08 08:20:55] [INFO ] Flatten gal took : 13 ms
[2023-03-08 08:20:55] [INFO ] Input system was already deterministic with 18 transitions.
Incomplete random walk after 10002 steps, including 7 resets, run finished after 178 ms. (steps per millisecond=56 ) properties (out of 45) seen :43
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 2) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-08 08:20:55] [INFO ] Invariant cache hit.
[2023-03-08 08:20:55] [INFO ] After 42ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2023-03-08 08:20:55] [INFO ] Flatten gal took : 8 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 8 ms
[2023-03-08 08:20:56] [INFO ] Input system was already deterministic with 18 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 3 places :
Implicit places reduction removed 3 places
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 8 rules applied. Total rules applied 8 place count 22 transition count 13
Reduce places removed 5 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 6 rules applied. Total rules applied 14 place count 17 transition count 12
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 15 place count 16 transition count 12
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 15 place count 16 transition count 10
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 19 place count 14 transition count 10
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 23 place count 12 transition count 8
Applied a total of 23 rules in 17 ms. Remains 12 /25 variables (removed 13) and now considering 8/18 (removed 10) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 12/25 places, 8/18 transitions.
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 4 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 3 ms
[2023-03-08 08:20:56] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 4 places :
Implicit places reduction removed 4 places
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 9 rules applied. Total rules applied 9 place count 21 transition count 13
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 1 with 5 rules applied. Total rules applied 14 place count 16 transition count 13
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 14 place count 16 transition count 11
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 18 place count 14 transition count 11
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 1 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 24 place count 11 transition count 8
Applied a total of 24 rules in 6 ms. Remains 11 /25 variables (removed 14) and now considering 8/18 (removed 10) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 11/25 places, 8/18 transitions.
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 2 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 1 ms
[2023-03-08 08:20:56] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 25 /25 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/25 places, 18/18 transitions.
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 3 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 4 ms
[2023-03-08 08:20:56] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 4 places :
Implicit places reduction removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 21 transition count 18
Applied a total of 4 rules in 2 ms. Remains 21 /25 variables (removed 4) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 21/25 places, 18/18 transitions.
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 3 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 4 ms
[2023-03-08 08:20:56] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 3 places :
Implicit places reduction removed 3 places
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 22 transition count 18
Applied a total of 3 rules in 1 ms. Remains 22 /25 variables (removed 3) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/25 places, 18/18 transitions.
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 3 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 3 ms
[2023-03-08 08:20:56] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 3 places :
Implicit places reduction removed 3 places
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 22 transition count 18
Applied a total of 3 rules in 2 ms. Remains 22 /25 variables (removed 3) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 22/25 places, 18/18 transitions.
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 3 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 3 ms
[2023-03-08 08:20:56] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 25 /25 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/25 places, 18/18 transitions.
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 3 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 3 ms
[2023-03-08 08:20:56] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 3 places :
Implicit places reduction removed 3 places
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 22 transition count 18
Applied a total of 3 rules in 1 ms. Remains 22 /25 variables (removed 3) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/25 places, 18/18 transitions.
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 2 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 2 ms
[2023-03-08 08:20:56] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 2 places :
Implicit places reduction removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 23 transition count 18
Applied a total of 2 rules in 1 ms. Remains 23 /25 variables (removed 2) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 23/25 places, 18/18 transitions.
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 3 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 2 ms
[2023-03-08 08:20:56] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 4 places :
Implicit places reduction removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 21 transition count 18
Applied a total of 4 rules in 1 ms. Remains 21 /25 variables (removed 4) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 21/25 places, 18/18 transitions.
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 12 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 2 ms
[2023-03-08 08:20:56] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 4 places :
Implicit places reduction removed 4 places
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 8 rules applied. Total rules applied 8 place count 21 transition count 14
Reduce places removed 4 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 5 rules applied. Total rules applied 13 place count 17 transition count 13
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 14 place count 16 transition count 13
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 3 Pre rules applied. Total rules applied 14 place count 16 transition count 10
Deduced a syphon composed of 3 places in 1 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 20 place count 13 transition count 10
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 1 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 26 place count 10 transition count 7
Applied a total of 26 rules in 6 ms. Remains 10 /25 variables (removed 15) and now considering 7/18 (removed 11) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 10/25 places, 7/18 transitions.
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 2 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 1 ms
[2023-03-08 08:20:56] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 24 transition count 18
Applied a total of 1 rules in 1 ms. Remains 24 /25 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 24/25 places, 18/18 transitions.
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 3 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 3 ms
[2023-03-08 08:20:56] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 3 places :
Implicit places reduction removed 3 places
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 8 rules applied. Total rules applied 8 place count 22 transition count 13
Reduce places removed 5 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 6 rules applied. Total rules applied 14 place count 17 transition count 12
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 15 place count 16 transition count 12
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 15 place count 16 transition count 11
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 17 place count 15 transition count 11
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 23 place count 12 transition count 8
Applied a total of 23 rules in 5 ms. Remains 12 /25 variables (removed 13) and now considering 8/18 (removed 10) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 12/25 places, 8/18 transitions.
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 2 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 1 ms
[2023-03-08 08:20:56] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 2 places :
Implicit places reduction removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 23 transition count 18
Applied a total of 2 rules in 1 ms. Remains 23 /25 variables (removed 2) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 23/25 places, 18/18 transitions.
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 2 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 2 ms
[2023-03-08 08:20:56] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 3 places :
Implicit places reduction removed 3 places
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 22 transition count 18
Applied a total of 3 rules in 1 ms. Remains 22 /25 variables (removed 3) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 22/25 places, 18/18 transitions.
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 2 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 3 ms
[2023-03-08 08:20:56] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 18/18 transitions.
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 24 transition count 18
Applied a total of 1 rules in 1 ms. Remains 24 /25 variables (removed 1) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 24/25 places, 18/18 transitions.
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 2 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 2 ms
[2023-03-08 08:20:56] [INFO ] Input system was already deterministic with 18 transitions.
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 4 ms
[2023-03-08 08:20:56] [INFO ] Flatten gal took : 5 ms
[2023-03-08 08:20:56] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-08 08:20:56] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 25 places, 18 transitions and 54 arcs took 0 ms.
Total runtime 2186 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ClientsAndServers-PT-N0010P2
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/371
CTLFireability

FORMULA ClientsAndServers-PT-N0010P2-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0010P2-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0010P2-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0010P2-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0010P2-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0010P2-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0010P2-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0010P2-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0010P2-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0010P2-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0010P2-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0010P2-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0010P2-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ClientsAndServers-PT-N0010P2-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678263748735

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/371/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/371/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/371/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 4 (type EXCL) for 3 ClientsAndServers-PT-N0010P2-CTLFireability-01
lola: time limit : 81 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:738
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 94 (type FNDP) for 28 ClientsAndServers-PT-N0010P2-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 95 (type EQUN) for 28 ClientsAndServers-PT-N0010P2-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 97 (type SRCH) for 28 ClientsAndServers-PT-N0010P2-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 97 (type SRCH) for ClientsAndServers-PT-N0010P2-CTLFireability-08
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
sara: try reading problem file /home/mcc/execution/371/CTLFireability-95.sara.
lola: FINISHED task # 94 (type FNDP) for ClientsAndServers-PT-N0010P2-CTLFireability-08
lola: Created skeleton in 0.000000 secs.
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 95 (type EQUN) for ClientsAndServers-PT-N0010P2-CTLFireability-08 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 99 (type FNDP) for 81 ClientsAndServers-PT-N0010P2-CTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 100 (type EQUN) for 81 ClientsAndServers-PT-N0010P2-CTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 102 (type SRCH) for 81 ClientsAndServers-PT-N0010P2-CTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 95 (type EQUN) for ClientsAndServers-PT-N0010P2-CTLFireability-08
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 102 (type SRCH) for ClientsAndServers-PT-N0010P2-CTLFireability-15
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 99 (type FNDP) for ClientsAndServers-PT-N0010P2-CTLFireability-15
lola: result : true
lola: fired transitions : 79
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 100 (type EQUN) for ClientsAndServers-PT-N0010P2-CTLFireability-15 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 100 (type EQUN) for ClientsAndServers-PT-N0010P2-CTLFireability-15
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 104 (type FNDP) for 28 ClientsAndServers-PT-N0010P2-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 105 (type EQUN) for 28 ClientsAndServers-PT-N0010P2-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 107 (type SRCH) for 28 ClientsAndServers-PT-N0010P2-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 107 (type SRCH) for ClientsAndServers-PT-N0010P2-CTLFireability-08
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: FINISHED task # 104 (type FNDP) for ClientsAndServers-PT-N0010P2-CTLFireability-08
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 105 (type EQUN) for ClientsAndServers-PT-N0010P2-CTLFireability-08 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/371/CTLFireability-105.sara.

lola: FINISHED task # 105 (type EQUN) for ClientsAndServers-PT-N0010P2-CTLFireability-08
lola: result : true
lola: FINISHED task # 4 (type EXCL) for ClientsAndServers-PT-N0010P2-CTLFireability-01
lola: result : false
lola: markings : 83810
lola: fired transitions : 149629
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 90 (type EXCL) for 81 ClientsAndServers-PT-N0010P2-CTLFireability-15
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 90 (type EXCL) for ClientsAndServers-PT-N0010P2-CTLFireability-15
lola: result : true
lola: markings : 697
lola: fired transitions : 733
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 88 (type EXCL) for 81 ClientsAndServers-PT-N0010P2-CTLFireability-15
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: FINISHED task # 88 (type EXCL) for ClientsAndServers-PT-N0010P2-CTLFireability-15
lola: result : true
lola: markings : 80897
lola: fired transitions : 196334
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 79 (type EXCL) for 78 ClientsAndServers-PT-N0010P2-CTLFireability-14
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: FINISHED task # 79 (type EXCL) for ClientsAndServers-PT-N0010P2-CTLFireability-14
lola: result : false
lola: markings : 1927
lola: fired transitions : 3190
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 76 (type EXCL) for 75 ClientsAndServers-PT-N0010P2-CTLFireability-13
lola: time limit : 240 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0010P2-CTLFireability-01: CTL false CTL model checker
ClientsAndServers-PT-N0010P2-CTLFireability-14: CTL false CTL model checker
ClientsAndServers-PT-N0010P2-CTLFireability-15: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0010P2-CTLFireability-00: AGEF 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-08: DISJ 0 1 0 0 14 0 0 7
ClientsAndServers-PT-N0010P2-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-10: AGAF 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-12: AGEF 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
76 CTL EXCL 5/240 9/32 ClientsAndServers-PT-N0010P2-CTLFireability-13 2090903 m, 418180 m/sec, 5539940 t fired, .

Time elapsed: 5 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0010P2-CTLFireability-01: CTL false CTL model checker
ClientsAndServers-PT-N0010P2-CTLFireability-14: CTL false CTL model checker
ClientsAndServers-PT-N0010P2-CTLFireability-15: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ClientsAndServers-PT-N0010P2-CTLFireability-00: AGEF 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-08: DISJ 0 1 0 0 14 0 0 7
ClientsAndServers-PT-N0010P2-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-10: AGAF 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-12: AGEF 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
76 CTL EXCL 10/240 18/32 ClientsAndServers-PT-N0010P2-CTLFireability-13 4189002 m, 419619 m/sec, 11245004 t fired, .

Time elapsed: 10 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0010P2-CTLFireability-01: CTL false CTL model checker
ClientsAndServers-PT-N0010P2-CTLFireability-14: CTL false CTL model checker
ClientsAndServers-PT-N0010P2-CTLFireability-15: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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16 CTL EXCL 10/393 13/32 ClientsAndServers-PT-N0010P2-CTLFireability-05 2901041 m, 288829 m/sec, 10053077 t fired, .

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ClientsAndServers-PT-N0010P2-CTLFireability-08: DISJ false DISJ
ClientsAndServers-PT-N0010P2-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0010P2-CTLFireability-14: CTL false CTL model checker
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ClientsAndServers-PT-N0010P2-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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ClientsAndServers-PT-N0010P2-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-09: CONJ 0 1 0 0 2 0 1 0
ClientsAndServers-PT-N0010P2-CTLFireability-10: AGAF 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-12: AGEF 0 1 0 0 1 0 0 0
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16 CTL EXCL 15/393 19/32 ClientsAndServers-PT-N0010P2-CTLFireability-05 4347662 m, 289324 m/sec, 14829266 t fired, .

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ClientsAndServers-PT-N0010P2-CTLFireability-08: DISJ false DISJ
ClientsAndServers-PT-N0010P2-CTLFireability-11: CTL false CTL model checker
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ClientsAndServers-PT-N0010P2-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-09: CONJ 0 1 0 0 2 0 1 0
ClientsAndServers-PT-N0010P2-CTLFireability-10: AGAF 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-12: AGEF 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 20/393 24/32 ClientsAndServers-PT-N0010P2-CTLFireability-05 5705547 m, 271577 m/sec, 19256557 t fired, .

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ClientsAndServers-PT-N0010P2-CTLFireability-08: DISJ false DISJ
ClientsAndServers-PT-N0010P2-CTLFireability-11: CTL false CTL model checker
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ClientsAndServers-PT-N0010P2-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-09: CONJ 0 1 0 0 2 0 1 0
ClientsAndServers-PT-N0010P2-CTLFireability-10: AGAF 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-12: AGEF 0 1 0 0 1 0 0 0
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16 CTL EXCL 25/393 30/32 ClientsAndServers-PT-N0010P2-CTLFireability-05 7108480 m, 280586 m/sec, 23793062 t fired, .

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ClientsAndServers-PT-N0010P2-CTLFireability-08: DISJ false DISJ
ClientsAndServers-PT-N0010P2-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0010P2-CTLFireability-14: CTL false CTL model checker
ClientsAndServers-PT-N0010P2-CTLFireability-15: CONJ true CONJ

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ClientsAndServers-PT-N0010P2-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
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ClientsAndServers-PT-N0010P2-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-09: CONJ 0 1 0 0 2 0 1 0
ClientsAndServers-PT-N0010P2-CTLFireability-10: AGAF 0 1 0 0 1 0 0 0
ClientsAndServers-PT-N0010P2-CTLFireability-12: AGEF 0 1 0 0 1 0 0 0
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lola: result : true
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lola: fired transitions : 1346
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lola: memory pages used : 1
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lola: result : false
lola: markings : 58561
lola: fired transitions : 71820
lola: time used : 0.000000
lola: memory pages used : 1
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lola: time limit : 702 sec
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lola: FINISHED task # 92 (type EXCL) for ClientsAndServers-PT-N0010P2-CTLFireability-09
lola: result : true
lola: markings : 125
lola: fired transitions : 125
lola: time used : 0.000000
lola: memory pages used : 1
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lola: time limit : 877 sec
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lola: result : true
lola: markings : 165
lola: fired transitions : 165
lola: time used : 0.000000
lola: memory pages used : 1
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lola: time limit : 1170 sec
lola: memory limit: 32 pages
lola: FINISHED task # 73 (type EXCL) for ClientsAndServers-PT-N0010P2-CTLFireability-12
lola: result : false
lola: markings : 457
lola: fired transitions : 456
lola: time used : 0.000000
lola: memory pages used : 1
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lola: result : false
lola: markings : 20144
lola: fired transitions : 27750
lola: time used : 0.000000
lola: memory pages used : 1
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lola: time limit : 3510 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for ClientsAndServers-PT-N0010P2-CTLFireability-07
lola: result : false
lola: markings : 41
lola: fired transitions : 42
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ClientsAndServers-PT-N0010P2-CTLFireability-00: AGEF false tscc_search
ClientsAndServers-PT-N0010P2-CTLFireability-01: CTL false CTL model checker
ClientsAndServers-PT-N0010P2-CTLFireability-02: CTL false CTL model checker
ClientsAndServers-PT-N0010P2-CTLFireability-03: CTL true CTL model checker
ClientsAndServers-PT-N0010P2-CTLFireability-04: CTL true CTL model checker
ClientsAndServers-PT-N0010P2-CTLFireability-05: CTL unknown AGGR
ClientsAndServers-PT-N0010P2-CTLFireability-06: CTL false CTL model checker
ClientsAndServers-PT-N0010P2-CTLFireability-07: CONJ false CTL model checker
ClientsAndServers-PT-N0010P2-CTLFireability-08: DISJ false DISJ
ClientsAndServers-PT-N0010P2-CTLFireability-09: CONJ false state space /EFEG
ClientsAndServers-PT-N0010P2-CTLFireability-10: AGAF false state space /EFEG
ClientsAndServers-PT-N0010P2-CTLFireability-11: CTL false CTL model checker
ClientsAndServers-PT-N0010P2-CTLFireability-12: AGEF false tscc_search
ClientsAndServers-PT-N0010P2-CTLFireability-13: CTL unknown AGGR
ClientsAndServers-PT-N0010P2-CTLFireability-14: CTL false CTL model checker
ClientsAndServers-PT-N0010P2-CTLFireability-15: CONJ true CONJ


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ClientsAndServers-PT-N0010P2"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ClientsAndServers-PT-N0010P2, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r071-smll-167814397800258"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ClientsAndServers-PT-N0010P2.tgz
mv ClientsAndServers-PT-N0010P2 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;