About the Execution of LoLa+red for CircularTrains-PT-768
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
1974.252 | 391131.00 | 403293.00 | 1831.60 | FT?T??F?F??T?TFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r071-smll-167814397700194.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is CircularTrains-PT-768, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r071-smll-167814397700194
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1000K
-rw-r--r-- 1 mcc users 7.7K Feb 26 04:31 CTLCardinality.txt
-rw-r--r-- 1 mcc users 77K Feb 26 04:31 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 26 04:30 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 26 04:30 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:43 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 15:43 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 15:43 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Feb 25 15:43 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.6K Feb 26 04:34 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 66K Feb 26 04:34 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 04:33 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 88K Feb 26 04:33 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 15:43 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:43 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 591K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME CircularTrains-PT-768-CTLFireability-00
FORMULA_NAME CircularTrains-PT-768-CTLFireability-01
FORMULA_NAME CircularTrains-PT-768-CTLFireability-02
FORMULA_NAME CircularTrains-PT-768-CTLFireability-03
FORMULA_NAME CircularTrains-PT-768-CTLFireability-04
FORMULA_NAME CircularTrains-PT-768-CTLFireability-05
FORMULA_NAME CircularTrains-PT-768-CTLFireability-06
FORMULA_NAME CircularTrains-PT-768-CTLFireability-07
FORMULA_NAME CircularTrains-PT-768-CTLFireability-08
FORMULA_NAME CircularTrains-PT-768-CTLFireability-09
FORMULA_NAME CircularTrains-PT-768-CTLFireability-10
FORMULA_NAME CircularTrains-PT-768-CTLFireability-11
FORMULA_NAME CircularTrains-PT-768-CTLFireability-12
FORMULA_NAME CircularTrains-PT-768-CTLFireability-13
FORMULA_NAME CircularTrains-PT-768-CTLFireability-14
FORMULA_NAME CircularTrains-PT-768-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678255308259
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CircularTrains-PT-768
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 06:01:51] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 06:01:51] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 06:01:51] [INFO ] Load time of PNML (sax parser for PT used): 243 ms
[2023-03-08 06:01:51] [INFO ] Transformed 1536 places.
[2023-03-08 06:01:51] [INFO ] Transformed 768 transitions.
[2023-03-08 06:01:52] [INFO ] Parsed PT model containing 1536 places and 768 transitions and 3072 arcs in 421 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 24 ms.
Support contains 202 out of 1536 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1536/1536 places, 768/768 transitions.
Applied a total of 0 rules in 305 ms. Remains 1536 /1536 variables (removed 0) and now considering 768/768 (removed 0) transitions.
// Phase 1: matrix 768 rows 1536 cols
[2023-03-08 06:01:52] [INFO ] Computed 769 place invariants in 185 ms
[2023-03-08 06:01:55] [INFO ] Implicit Places using invariants in 3078 ms returned [14, 29, 102, 150, 244, 296, 600, 679, 681, 697, 699, 732, 767, 883, 884, 929, 940, 942, 948, 973, 975, 977, 991, 1005, 1071, 1073, 1079, 1088, 1150, 1168, 1185, 1198, 1204, 1211, 1229, 1247, 1273, 1299, 1337, 1338, 1339, 1350, 1385, 1391, 1450, 1485, 1487, 1497, 1513, 1517, 1527, 1531]
Discarding 52 places :
Implicit Place search using SMT only with invariants took 3153 ms to find 52 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 1484/1536 places, 768/768 transitions.
Applied a total of 0 rules in 278 ms. Remains 1484 /1484 variables (removed 0) and now considering 768/768 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 3737 ms. Remains : 1484/1536 places, 768/768 transitions.
Support contains 202 out of 1484 places after structural reductions.
[2023-03-08 06:01:56] [INFO ] Flatten gal took : 195 ms
[2023-03-08 06:01:56] [INFO ] Flatten gal took : 120 ms
[2023-03-08 06:01:56] [INFO ] Input system was already deterministic with 768 transitions.
Support contains 200 out of 1484 places (down from 202) after GAL structural reductions.
Finished random walk after 5984 steps, including 1 resets, run visited all 75 properties in 615 ms. (steps per millisecond=9 )
[2023-03-08 06:01:57] [INFO ] Flatten gal took : 60 ms
[2023-03-08 06:01:57] [INFO ] Flatten gal took : 61 ms
[2023-03-08 06:01:57] [INFO ] Input system was already deterministic with 768 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 1484/1484 places, 768/768 transitions.
Drop transitions removed 13 transitions
Trivial Post-agglo rules discarded 13 transitions
Performed 13 trivial Post agglomeration. Transition count delta: 13
Iterating post reduction 0 with 13 rules applied. Total rules applied 13 place count 1484 transition count 755
Reduce places removed 13 places and 0 transitions.
Iterating post reduction 1 with 13 rules applied. Total rules applied 26 place count 1471 transition count 755
Performed 39 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 39 Pre rules applied. Total rules applied 26 place count 1471 transition count 716
Deduced a syphon composed of 39 places in 1 ms
Reduce places removed 39 places and 0 transitions.
Iterating global reduction 2 with 78 rules applied. Total rules applied 104 place count 1432 transition count 716
Performed 39 Post agglomeration using F-continuation condition.Transition count delta: 39
Deduced a syphon composed of 39 places in 1 ms
Reduce places removed 39 places and 0 transitions.
Iterating global reduction 2 with 78 rules applied. Total rules applied 182 place count 1393 transition count 677
Applied a total of 182 rules in 385 ms. Remains 1393 /1484 variables (removed 91) and now considering 677/768 (removed 91) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 385 ms. Remains : 1393/1484 places, 677/768 transitions.
[2023-03-08 06:01:58] [INFO ] Flatten gal took : 55 ms
[2023-03-08 06:01:58] [INFO ] Flatten gal took : 63 ms
[2023-03-08 06:01:58] [INFO ] Input system was already deterministic with 677 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1484/1484 places, 768/768 transitions.
Applied a total of 0 rules in 97 ms. Remains 1484 /1484 variables (removed 0) and now considering 768/768 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 97 ms. Remains : 1484/1484 places, 768/768 transitions.
[2023-03-08 06:01:58] [INFO ] Flatten gal took : 55 ms
[2023-03-08 06:01:58] [INFO ] Flatten gal took : 69 ms
[2023-03-08 06:01:58] [INFO ] Input system was already deterministic with 768 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1484/1484 places, 768/768 transitions.
Applied a total of 0 rules in 70 ms. Remains 1484 /1484 variables (removed 0) and now considering 768/768 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 71 ms. Remains : 1484/1484 places, 768/768 transitions.
[2023-03-08 06:01:58] [INFO ] Flatten gal took : 32 ms
[2023-03-08 06:01:58] [INFO ] Flatten gal took : 33 ms
[2023-03-08 06:01:58] [INFO ] Input system was already deterministic with 768 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1484/1484 places, 768/768 transitions.
Applied a total of 0 rules in 71 ms. Remains 1484 /1484 variables (removed 0) and now considering 768/768 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 71 ms. Remains : 1484/1484 places, 768/768 transitions.
[2023-03-08 06:01:58] [INFO ] Flatten gal took : 28 ms
[2023-03-08 06:01:58] [INFO ] Flatten gal took : 31 ms
[2023-03-08 06:01:59] [INFO ] Input system was already deterministic with 768 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1484/1484 places, 768/768 transitions.
Applied a total of 0 rules in 67 ms. Remains 1484 /1484 variables (removed 0) and now considering 768/768 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 67 ms. Remains : 1484/1484 places, 768/768 transitions.
[2023-03-08 06:01:59] [INFO ] Flatten gal took : 29 ms
[2023-03-08 06:01:59] [INFO ] Flatten gal took : 32 ms
[2023-03-08 06:01:59] [INFO ] Input system was already deterministic with 768 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1484/1484 places, 768/768 transitions.
Drop transitions removed 13 transitions
Trivial Post-agglo rules discarded 13 transitions
Performed 13 trivial Post agglomeration. Transition count delta: 13
Iterating post reduction 0 with 13 rules applied. Total rules applied 13 place count 1484 transition count 755
Reduce places removed 13 places and 0 transitions.
Iterating post reduction 1 with 13 rules applied. Total rules applied 26 place count 1471 transition count 755
Performed 37 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 37 Pre rules applied. Total rules applied 26 place count 1471 transition count 718
Deduced a syphon composed of 37 places in 1 ms
Reduce places removed 37 places and 0 transitions.
Iterating global reduction 2 with 74 rules applied. Total rules applied 100 place count 1434 transition count 718
Performed 39 Post agglomeration using F-continuation condition.Transition count delta: 39
Deduced a syphon composed of 39 places in 0 ms
Reduce places removed 39 places and 0 transitions.
Iterating global reduction 2 with 78 rules applied. Total rules applied 178 place count 1395 transition count 679
Applied a total of 178 rules in 200 ms. Remains 1395 /1484 variables (removed 89) and now considering 679/768 (removed 89) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 200 ms. Remains : 1395/1484 places, 679/768 transitions.
[2023-03-08 06:01:59] [INFO ] Flatten gal took : 25 ms
[2023-03-08 06:01:59] [INFO ] Flatten gal took : 31 ms
[2023-03-08 06:01:59] [INFO ] Input system was already deterministic with 679 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1484/1484 places, 768/768 transitions.
Drop transitions removed 13 transitions
Trivial Post-agglo rules discarded 13 transitions
Performed 13 trivial Post agglomeration. Transition count delta: 13
Iterating post reduction 0 with 13 rules applied. Total rules applied 13 place count 1484 transition count 755
Reduce places removed 13 places and 0 transitions.
Iterating post reduction 1 with 13 rules applied. Total rules applied 26 place count 1471 transition count 755
Performed 36 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 36 Pre rules applied. Total rules applied 26 place count 1471 transition count 719
Deduced a syphon composed of 36 places in 0 ms
Reduce places removed 36 places and 0 transitions.
Iterating global reduction 2 with 72 rules applied. Total rules applied 98 place count 1435 transition count 719
Performed 38 Post agglomeration using F-continuation condition.Transition count delta: 38
Deduced a syphon composed of 38 places in 0 ms
Reduce places removed 38 places and 0 transitions.
Iterating global reduction 2 with 76 rules applied. Total rules applied 174 place count 1397 transition count 681
Applied a total of 174 rules in 174 ms. Remains 1397 /1484 variables (removed 87) and now considering 681/768 (removed 87) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 174 ms. Remains : 1397/1484 places, 681/768 transitions.
[2023-03-08 06:01:59] [INFO ] Flatten gal took : 29 ms
[2023-03-08 06:01:59] [INFO ] Flatten gal took : 27 ms
[2023-03-08 06:01:59] [INFO ] Input system was already deterministic with 681 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1484/1484 places, 768/768 transitions.
Applied a total of 0 rules in 60 ms. Remains 1484 /1484 variables (removed 0) and now considering 768/768 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 61 ms. Remains : 1484/1484 places, 768/768 transitions.
[2023-03-08 06:02:00] [INFO ] Flatten gal took : 23 ms
[2023-03-08 06:02:00] [INFO ] Flatten gal took : 26 ms
[2023-03-08 06:02:00] [INFO ] Input system was already deterministic with 768 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1484/1484 places, 768/768 transitions.
Applied a total of 0 rules in 60 ms. Remains 1484 /1484 variables (removed 0) and now considering 768/768 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 61 ms. Remains : 1484/1484 places, 768/768 transitions.
[2023-03-08 06:02:00] [INFO ] Flatten gal took : 23 ms
[2023-03-08 06:02:00] [INFO ] Flatten gal took : 25 ms
[2023-03-08 06:02:00] [INFO ] Input system was already deterministic with 768 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1484/1484 places, 768/768 transitions.
Applied a total of 0 rules in 67 ms. Remains 1484 /1484 variables (removed 0) and now considering 768/768 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 68 ms. Remains : 1484/1484 places, 768/768 transitions.
[2023-03-08 06:02:00] [INFO ] Flatten gal took : 26 ms
[2023-03-08 06:02:00] [INFO ] Flatten gal took : 29 ms
[2023-03-08 06:02:00] [INFO ] Input system was already deterministic with 768 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1484/1484 places, 768/768 transitions.
Applied a total of 0 rules in 60 ms. Remains 1484 /1484 variables (removed 0) and now considering 768/768 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 61 ms. Remains : 1484/1484 places, 768/768 transitions.
[2023-03-08 06:02:00] [INFO ] Flatten gal took : 23 ms
[2023-03-08 06:02:00] [INFO ] Flatten gal took : 24 ms
[2023-03-08 06:02:00] [INFO ] Input system was already deterministic with 768 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1484/1484 places, 768/768 transitions.
Applied a total of 0 rules in 62 ms. Remains 1484 /1484 variables (removed 0) and now considering 768/768 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 62 ms. Remains : 1484/1484 places, 768/768 transitions.
[2023-03-08 06:02:00] [INFO ] Flatten gal took : 23 ms
[2023-03-08 06:02:00] [INFO ] Flatten gal took : 25 ms
[2023-03-08 06:02:00] [INFO ] Input system was already deterministic with 768 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1484/1484 places, 768/768 transitions.
Drop transitions removed 13 transitions
Trivial Post-agglo rules discarded 13 transitions
Performed 13 trivial Post agglomeration. Transition count delta: 13
Iterating post reduction 0 with 13 rules applied. Total rules applied 13 place count 1484 transition count 755
Reduce places removed 13 places and 0 transitions.
Iterating post reduction 1 with 13 rules applied. Total rules applied 26 place count 1471 transition count 755
Performed 39 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 39 Pre rules applied. Total rules applied 26 place count 1471 transition count 716
Deduced a syphon composed of 39 places in 0 ms
Reduce places removed 39 places and 0 transitions.
Iterating global reduction 2 with 78 rules applied. Total rules applied 104 place count 1432 transition count 716
Performed 38 Post agglomeration using F-continuation condition.Transition count delta: 38
Deduced a syphon composed of 38 places in 0 ms
Reduce places removed 38 places and 0 transitions.
Iterating global reduction 2 with 76 rules applied. Total rules applied 180 place count 1394 transition count 678
Applied a total of 180 rules in 169 ms. Remains 1394 /1484 variables (removed 90) and now considering 678/768 (removed 90) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 170 ms. Remains : 1394/1484 places, 678/768 transitions.
[2023-03-08 06:02:01] [INFO ] Flatten gal took : 22 ms
[2023-03-08 06:02:01] [INFO ] Flatten gal took : 23 ms
[2023-03-08 06:02:01] [INFO ] Input system was already deterministic with 678 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1484/1484 places, 768/768 transitions.
Applied a total of 0 rules in 60 ms. Remains 1484 /1484 variables (removed 0) and now considering 768/768 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 60 ms. Remains : 1484/1484 places, 768/768 transitions.
[2023-03-08 06:02:01] [INFO ] Flatten gal took : 23 ms
[2023-03-08 06:02:01] [INFO ] Flatten gal took : 25 ms
[2023-03-08 06:02:01] [INFO ] Input system was already deterministic with 768 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1484/1484 places, 768/768 transitions.
Drop transitions removed 13 transitions
Trivial Post-agglo rules discarded 13 transitions
Performed 13 trivial Post agglomeration. Transition count delta: 13
Iterating post reduction 0 with 13 rules applied. Total rules applied 13 place count 1484 transition count 755
Reduce places removed 13 places and 0 transitions.
Iterating post reduction 1 with 13 rules applied. Total rules applied 26 place count 1471 transition count 755
Performed 39 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 39 Pre rules applied. Total rules applied 26 place count 1471 transition count 716
Deduced a syphon composed of 39 places in 0 ms
Reduce places removed 39 places and 0 transitions.
Iterating global reduction 2 with 78 rules applied. Total rules applied 104 place count 1432 transition count 716
Performed 39 Post agglomeration using F-continuation condition.Transition count delta: 39
Deduced a syphon composed of 39 places in 0 ms
Reduce places removed 39 places and 0 transitions.
Iterating global reduction 2 with 78 rules applied. Total rules applied 182 place count 1393 transition count 677
Applied a total of 182 rules in 168 ms. Remains 1393 /1484 variables (removed 91) and now considering 677/768 (removed 91) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 169 ms. Remains : 1393/1484 places, 677/768 transitions.
[2023-03-08 06:02:01] [INFO ] Flatten gal took : 22 ms
[2023-03-08 06:02:01] [INFO ] Flatten gal took : 23 ms
[2023-03-08 06:02:01] [INFO ] Input system was already deterministic with 677 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1484/1484 places, 768/768 transitions.
Applied a total of 0 rules in 80 ms. Remains 1484 /1484 variables (removed 0) and now considering 768/768 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 81 ms. Remains : 1484/1484 places, 768/768 transitions.
[2023-03-08 06:02:01] [INFO ] Flatten gal took : 25 ms
[2023-03-08 06:02:01] [INFO ] Flatten gal took : 29 ms
[2023-03-08 06:02:01] [INFO ] Input system was already deterministic with 768 transitions.
[2023-03-08 06:02:01] [INFO ] Flatten gal took : 26 ms
[2023-03-08 06:02:01] [INFO ] Flatten gal took : 26 ms
[2023-03-08 06:02:01] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 6 ms.
[2023-03-08 06:02:01] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 1484 places, 768 transitions and 2968 arcs took 9 ms.
Total runtime 10297 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT CircularTrains-PT-768
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
CTLFireability
FORMULA CircularTrains-PT-768-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CircularTrains-PT-768-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CircularTrains-PT-768-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CircularTrains-PT-768-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CircularTrains-PT-768-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CircularTrains-PT-768-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CircularTrains-PT-768-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CircularTrains-PT-768-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CircularTrains-PT-768-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678255699390
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 20 (type EXCL) for 19 CircularTrains-PT-768-CTLFireability-05
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 4 0 0 4 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-11: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-15: CONJ 0 3 0 0 3 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 4/156 6/32 CircularTrains-PT-768-CTLFireability-05 488229 m, 97645 m/sec, 510064 t fired, .
Time elapsed: 11 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 4 0 0 4 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-11: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-15: CONJ 0 3 0 0 3 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 9/156 15/32 CircularTrains-PT-768-CTLFireability-05 1212914 m, 144937 m/sec, 1246998 t fired, .
Time elapsed: 16 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 4 0 0 4 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-11: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-15: CONJ 0 3 0 0 3 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 14/156 21/32 CircularTrains-PT-768-CTLFireability-05 1758701 m, 109157 m/sec, 1921402 t fired, .
Time elapsed: 21 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 4 0 0 4 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-11: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-15: CONJ 0 3 0 0 3 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 19/156 24/32 CircularTrains-PT-768-CTLFireability-05 2136905 m, 75640 m/sec, 2598607 t fired, .
Time elapsed: 26 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 4 0 0 4 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-11: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-15: CONJ 0 3 0 0 3 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 24/156 28/32 CircularTrains-PT-768-CTLFireability-05 2541199 m, 80858 m/sec, 3315560 t fired, .
Time elapsed: 31 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 4 0 0 4 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-11: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-15: CONJ 0 3 0 0 3 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 29/156 31/32 CircularTrains-PT-768-CTLFireability-05 2895014 m, 70763 m/sec, 4050050 t fired, .
Time elapsed: 36 secs. Pages in use: 31
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 20 (type EXCL) for CircularTrains-PT-768-CTLFireability-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 4 0 0 4 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-11: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-15: CONJ 0 3 0 0 3 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 41 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 74 (type EXCL) for 65 CircularTrains-PT-768-CTLFireability-15
lola: time limit : 161 sec
lola: memory limit: 32 pages
lola: FINISHED task # 74 (type EXCL) for CircularTrains-PT-768-CTLFireability-15
lola: result : false
lola: markings : 3398
lola: fired transitions : 3397
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 60 (type EXCL) for 59 CircularTrains-PT-768-CTLFireability-13
lola: time limit : 187 sec
lola: memory limit: 32 pages
lola: FINISHED task # 60 (type EXCL) for CircularTrains-PT-768-CTLFireability-13
lola: result : true
lola: markings : 49513
lola: fired transitions : 49513
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 54 (type EXCL) for 49 CircularTrains-PT-768-CTLFireability-11
lola: time limit : 197 sec
lola: memory limit: 32 pages
lola: FINISHED task # 54 (type EXCL) for CircularTrains-PT-768-CTLFireability-11
lola: result : true
lola: markings : 49026
lola: fired transitions : 49026
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 CircularTrains-PT-768-CTLFireability-10
lola: time limit : 222 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 4 0 0 4 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 4/222 7/32 CircularTrains-PT-768-CTLFireability-10 518413 m, 103682 m/sec, 519441 t fired, .
Time elapsed: 46 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 4 0 0 4 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 9/222 16/32 CircularTrains-PT-768-CTLFireability-10 1221093 m, 140536 m/sec, 1224019 t fired, .
Time elapsed: 51 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 4 0 0 4 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 14/222 25/32 CircularTrains-PT-768-CTLFireability-10 1854378 m, 126657 m/sec, 1859596 t fired, .
Time elapsed: 56 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 47 (type EXCL) for CircularTrains-PT-768-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 4 0 0 4 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 61 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 44 (type EXCL) for 31 CircularTrains-PT-768-CTLFireability-09
lola: time limit : 235 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for CircularTrains-PT-768-CTLFireability-09
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 42 (type EXCL) for 31 CircularTrains-PT-768-CTLFireability-09
lola: time limit : 252 sec
lola: memory limit: 32 pages
lola: FINISHED task # 42 (type EXCL) for CircularTrains-PT-768-CTLFireability-09
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 31 CircularTrains-PT-768-CTLFireability-09
lola: time limit : 272 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 1 0 6 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 5/272 5/32 CircularTrains-PT-768-CTLFireability-09 425872 m, 85174 m/sec, 655367 t fired, .
Time elapsed: 66 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 1 0 6 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 10/272 7/32 CircularTrains-PT-768-CTLFireability-09 722311 m, 59287 m/sec, 1370938 t fired, .
Time elapsed: 71 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 1 0 6 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 15/272 9/32 CircularTrains-PT-768-CTLFireability-09 1026593 m, 60856 m/sec, 2068589 t fired, .
Time elapsed: 76 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 1 0 6 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 20/272 11/32 CircularTrains-PT-768-CTLFireability-09 1348556 m, 64392 m/sec, 2771698 t fired, .
Time elapsed: 81 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 1 0 6 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 25/272 14/32 CircularTrains-PT-768-CTLFireability-09 1665541 m, 63397 m/sec, 3467723 t fired, .
Time elapsed: 86 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 1 0 6 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 30/272 16/32 CircularTrains-PT-768-CTLFireability-09 1993094 m, 65510 m/sec, 4171544 t fired, .
Time elapsed: 91 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 1 0 6 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 35/272 19/32 CircularTrains-PT-768-CTLFireability-09 2313310 m, 64043 m/sec, 4861510 t fired, .
Time elapsed: 96 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 1 0 6 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 40/272 21/32 CircularTrains-PT-768-CTLFireability-09 2627669 m, 62871 m/sec, 5554825 t fired, .
Time elapsed: 101 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 1 0 6 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 45/272 24/32 CircularTrains-PT-768-CTLFireability-09 2948279 m, 64122 m/sec, 6258622 t fired, .
Time elapsed: 106 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 1 0 6 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 50/272 26/32 CircularTrains-PT-768-CTLFireability-09 3274492 m, 65242 m/sec, 6952466 t fired, .
Time elapsed: 111 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 1 0 6 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 55/272 29/32 CircularTrains-PT-768-CTLFireability-09 3596271 m, 64355 m/sec, 7657232 t fired, .
Time elapsed: 116 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 1 0 6 0 0 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 60/272 31/32 CircularTrains-PT-768-CTLFireability-09 3895264 m, 59798 m/sec, 8338013 t fired, .
Time elapsed: 121 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 38 (type EXCL) for CircularTrains-PT-768-CTLFireability-09 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 126 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 29 (type EXCL) for 28 CircularTrains-PT-768-CTLFireability-08
lola: time limit : 289 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for CircularTrains-PT-768-CTLFireability-08
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 CircularTrains-PT-768-CTLFireability-07
lola: time limit : 315 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 5/315 3/32 CircularTrains-PT-768-CTLFireability-07 266049 m, 53209 m/sec, 651862 t fired, .
Time elapsed: 131 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 10/315 5/32 CircularTrains-PT-768-CTLFireability-07 509935 m, 48777 m/sec, 1344338 t fired, .
Time elapsed: 136 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 15/315 7/32 CircularTrains-PT-768-CTLFireability-07 757402 m, 49493 m/sec, 2050405 t fired, .
Time elapsed: 141 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 20/315 10/32 CircularTrains-PT-768-CTLFireability-07 1005708 m, 49661 m/sec, 2751258 t fired, .
Time elapsed: 146 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 25/315 12/32 CircularTrains-PT-768-CTLFireability-07 1249277 m, 48713 m/sec, 3452154 t fired, .
Time elapsed: 151 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 30/315 15/32 CircularTrains-PT-768-CTLFireability-07 1511093 m, 52363 m/sec, 4157857 t fired, .
Time elapsed: 156 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 35/315 17/32 CircularTrains-PT-768-CTLFireability-07 1764946 m, 50770 m/sec, 4867213 t fired, .
Time elapsed: 161 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 40/315 20/32 CircularTrains-PT-768-CTLFireability-07 2015290 m, 50068 m/sec, 5565391 t fired, .
Time elapsed: 166 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 45/315 22/32 CircularTrains-PT-768-CTLFireability-07 2259751 m, 48892 m/sec, 6253357 t fired, .
Time elapsed: 171 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 50/315 23/32 CircularTrains-PT-768-CTLFireability-07 2505435 m, 49136 m/sec, 6940917 t fired, .
Time elapsed: 176 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 55/315 26/32 CircularTrains-PT-768-CTLFireability-07 2753232 m, 49559 m/sec, 7635201 t fired, .
Time elapsed: 181 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 60/315 28/32 CircularTrains-PT-768-CTLFireability-07 3005652 m, 50484 m/sec, 8331983 t fired, .
Time elapsed: 186 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 65/315 31/32 CircularTrains-PT-768-CTLFireability-07 3255600 m, 49989 m/sec, 9024602 t fired, .
Time elapsed: 191 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 26 (type EXCL) for CircularTrains-PT-768-CTLFireability-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 196 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 17 (type EXCL) for 16 CircularTrains-PT-768-CTLFireability-04
lola: time limit : 340 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 5/340 4/32 CircularTrains-PT-768-CTLFireability-04 314946 m, 62989 m/sec, 537468 t fired, .
Time elapsed: 201 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 10/340 7/32 CircularTrains-PT-768-CTLFireability-04 652231 m, 67457 m/sec, 1139760 t fired, .
Time elapsed: 206 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 15/340 10/32 CircularTrains-PT-768-CTLFireability-04 989623 m, 67478 m/sec, 1736464 t fired, .
Time elapsed: 211 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 20/340 13/32 CircularTrains-PT-768-CTLFireability-04 1307724 m, 63620 m/sec, 2295926 t fired, .
Time elapsed: 216 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 25/340 15/32 CircularTrains-PT-768-CTLFireability-04 1622159 m, 62887 m/sec, 2849857 t fired, .
Time elapsed: 221 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 30/340 18/32 CircularTrains-PT-768-CTLFireability-04 1951975 m, 65963 m/sec, 3441352 t fired, .
Time elapsed: 226 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 35/340 21/32 CircularTrains-PT-768-CTLFireability-04 2271564 m, 63917 m/sec, 4008347 t fired, .
Time elapsed: 231 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 40/340 24/32 CircularTrains-PT-768-CTLFireability-04 2592150 m, 64117 m/sec, 4585632 t fired, .
Time elapsed: 236 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 45/340 27/32 CircularTrains-PT-768-CTLFireability-04 2916290 m, 64828 m/sec, 5166680 t fired, .
Time elapsed: 241 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 50/340 30/32 CircularTrains-PT-768-CTLFireability-04 3237413 m, 64224 m/sec, 5737577 t fired, .
Time elapsed: 246 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 17 (type EXCL) for CircularTrains-PT-768-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 2 0 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 251 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 14 (type EXCL) for 9 CircularTrains-PT-768-CTLFireability-03
lola: time limit : 372 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 1 1 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 5/372 6/32 CircularTrains-PT-768-CTLFireability-03 485389 m, 97077 m/sec, 629789 t fired, .
Time elapsed: 256 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 1 1 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 10/372 10/32 CircularTrains-PT-768-CTLFireability-03 866638 m, 76249 m/sec, 1285594 t fired, .
Time elapsed: 261 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 1 1 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 15/372 13/32 CircularTrains-PT-768-CTLFireability-03 1221568 m, 70986 m/sec, 1931576 t fired, .
Time elapsed: 266 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 1 1 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 20/372 16/32 CircularTrains-PT-768-CTLFireability-03 1587223 m, 73131 m/sec, 2574089 t fired, .
Time elapsed: 271 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 1 1 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 25/372 20/32 CircularTrains-PT-768-CTLFireability-03 1948805 m, 72316 m/sec, 3226677 t fired, .
Time elapsed: 276 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 1 1 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 30/372 23/32 CircularTrains-PT-768-CTLFireability-03 2310674 m, 72373 m/sec, 3858170 t fired, .
Time elapsed: 281 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 1 1 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 35/372 26/32 CircularTrains-PT-768-CTLFireability-03 2662647 m, 70394 m/sec, 4495354 t fired, .
Time elapsed: 286 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 1 1 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 40/372 29/32 CircularTrains-PT-768-CTLFireability-03 3001251 m, 67720 m/sec, 5103203 t fired, .
Time elapsed: 291 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 1 1 0 2 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 45/372 32/32 CircularTrains-PT-768-CTLFireability-03 3355560 m, 70861 m/sec, 5725578 t fired, .
Time elapsed: 296 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 14 (type EXCL) for CircularTrains-PT-768-CTLFireability-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-03: DISJ 0 1 0 0 2 0 1 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 301 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 12 (type EXCL) for 9 CircularTrains-PT-768-CTLFireability-03
lola: time limit : 412 sec
lola: memory limit: 32 pages
lola: FINISHED task # 12 (type EXCL) for CircularTrains-PT-768-CTLFireability-03
lola: result : true
lola: markings : 203715
lola: fired transitions : 236607
lola: time used : 2.000000
lola: memory pages used : 3
lola: LAUNCH task # 7 (type EXCL) for 6 CircularTrains-PT-768-CTLFireability-02
lola: time limit : 471 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-03: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 3/471 3/32 CircularTrains-PT-768-CTLFireability-02 258322 m, 51664 m/sec, 364563 t fired, .
Time elapsed: 306 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-03: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 8/471 7/32 CircularTrains-PT-768-CTLFireability-02 636230 m, 75581 m/sec, 1047047 t fired, .
Time elapsed: 311 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-03: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 13/471 11/32 CircularTrains-PT-768-CTLFireability-02 991215 m, 70997 m/sec, 1680110 t fired, .
Time elapsed: 316 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-03: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 18/471 14/32 CircularTrains-PT-768-CTLFireability-02 1346602 m, 71077 m/sec, 2318400 t fired, .
Time elapsed: 321 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-03: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 23/471 17/32 CircularTrains-PT-768-CTLFireability-02 1716700 m, 74019 m/sec, 2975017 t fired, .
Time elapsed: 326 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-03: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 28/471 21/32 CircularTrains-PT-768-CTLFireability-02 2079789 m, 72617 m/sec, 3616753 t fired, .
Time elapsed: 331 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-03: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 33/471 24/32 CircularTrains-PT-768-CTLFireability-02 2414022 m, 66846 m/sec, 4225382 t fired, .
Time elapsed: 336 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-03: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 38/471 27/32 CircularTrains-PT-768-CTLFireability-02 2772211 m, 71637 m/sec, 4852562 t fired, .
Time elapsed: 341 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-03: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 43/471 31/32 CircularTrains-PT-768-CTLFireability-02 3122758 m, 70109 m/sec, 5465939 t fired, .
Time elapsed: 346 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 7 (type EXCL) for CircularTrains-PT-768-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-03: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 1 0 0 6 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-14: EFEG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 351 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 4 (type EXCL) for 3 CircularTrains-PT-768-CTLFireability-01
lola: time limit : 541 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for CircularTrains-PT-768-CTLFireability-01
lola: result : true
lola: markings : 34252
lola: fired transitions : 34253
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 77 (type EXCL) for 31 CircularTrains-PT-768-CTLFireability-09
lola: time limit : 649 sec
lola: memory limit: 32 pages
lola: FINISHED task # 77 (type EXCL) for CircularTrains-PT-768-CTLFireability-09
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 63 (type EXCL) for 62 CircularTrains-PT-768-CTLFireability-14
lola: time limit : 812 sec
lola: memory limit: 32 pages
lola: FINISHED task # 63 (type EXCL) for CircularTrains-PT-768-CTLFireability-14
lola: result : false
lola: markings : 46502
lola: fired transitions : 92999
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 CircularTrains-PT-768-CTLFireability-00
lola: time limit : 1082 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for CircularTrains-PT-768-CTLFireability-00
lola: result : false
lola: markings : 46002
lola: fired transitions : 46003
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 57 (type EXCL) for 56 CircularTrains-PT-768-CTLFireability-12
lola: time limit : 1624 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-01: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-03: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-14: EFEG false state space /EFEG
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 0 0 0 7 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 CTL EXCL 4/1624 5/32 CircularTrains-PT-768-CTLFireability-12 417787 m, 83557 m/sec, 461476 t fired, .
Time elapsed: 356 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-01: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-03: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-14: EFEG false state space /EFEG
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 0 0 0 7 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 CTL EXCL 9/1624 13/32 CircularTrains-PT-768-CTLFireability-12 1114133 m, 139269 m/sec, 1170251 t fired, .
Time elapsed: 361 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-01: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-03: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-14: EFEG false state space /EFEG
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 0 0 0 7 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 CTL EXCL 14/1624 20/32 CircularTrains-PT-768-CTLFireability-12 1775660 m, 132305 m/sec, 1861765 t fired, .
Time elapsed: 366 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-01: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-03: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-14: EFEG false state space /EFEG
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 0 0 0 7 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 CTL EXCL 19/1624 27/32 CircularTrains-PT-768-CTLFireability-12 2441072 m, 133082 m/sec, 2557091 t fired, .
Time elapsed: 371 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 57 (type EXCL) for CircularTrains-PT-768-CTLFireability-12 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-01: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-03: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-14: EFEG false state space /EFEG
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-768-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-768-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-09: CONJ 0 0 0 0 7 0 1 0
CircularTrains-PT-768-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-768-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 376 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 23 (type EXCL) for 22 CircularTrains-PT-768-CTLFireability-06
lola: time limit : 3224 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for CircularTrains-PT-768-CTLFireability-06
lola: result : false
lola: markings : 46492
lola: fired transitions : 93012
lola: time used : 1.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-768-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-01: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-02: CTL unknown AGGR
CircularTrains-PT-768-CTLFireability-03: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-04: CTL unknown AGGR
CircularTrains-PT-768-CTLFireability-05: CTL unknown AGGR
CircularTrains-PT-768-CTLFireability-06: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-07: CTL unknown AGGR
CircularTrains-PT-768-CTLFireability-08: CTL false CTL model checker
CircularTrains-PT-768-CTLFireability-09: CONJ unknown CONJ
CircularTrains-PT-768-CTLFireability-10: CTL unknown AGGR
CircularTrains-PT-768-CTLFireability-11: DISJ true CTL model checker
CircularTrains-PT-768-CTLFireability-12: CTL unknown AGGR
CircularTrains-PT-768-CTLFireability-13: CTL true CTL model checker
CircularTrains-PT-768-CTLFireability-14: EFEG false state space /EFEG
CircularTrains-PT-768-CTLFireability-15: CONJ false CTL model checker
Time elapsed: 377 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircularTrains-PT-768"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is CircularTrains-PT-768, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r071-smll-167814397700194"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/CircularTrains-PT-768.tgz
mv CircularTrains-PT-768 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;