About the Execution of LoLa+red for CSRepetitions-PT-03
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 3713.968 | 359462.00 | 365818.00 | 1615.10 | TTF?TTFT?TF??FTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r071-smll-167814397500058.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is CSRepetitions-PT-03, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r071-smll-167814397500058
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 21K Feb 25 11:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 118K Feb 25 11:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 22K Feb 25 11:51 CTLFireability.txt
-rw-r--r-- 1 mcc users 113K Feb 25 11:51 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 12K Feb 25 15:41 LTLCardinality.txt
-rw-r--r-- 1 mcc users 44K Feb 25 15:41 LTLCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 25 15:41 LTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 15:41 LTLFireability.xml
-rw-r--r-- 1 mcc users 47K Feb 25 11:57 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 231K Feb 25 11:57 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 54K Feb 25 11:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 249K Feb 25 11:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.9K Feb 25 15:41 UpperBounds.txt
-rw-r--r-- 1 mcc users 6.0K Feb 25 15:41 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 40K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-00
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-01
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-02
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-03
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-04
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-05
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-06
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-07
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-08
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-09
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-10
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-11
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-12
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-13
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-14
FORMULA_NAME CSRepetitions-PT-03-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678228427186
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CSRepetitions-PT-03
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-07 22:33:50] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-07 22:33:50] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-07 22:33:50] [INFO ] Load time of PNML (sax parser for PT used): 76 ms
[2023-03-07 22:33:50] [INFO ] Transformed 58 places.
[2023-03-07 22:33:50] [INFO ] Transformed 81 transitions.
[2023-03-07 22:33:50] [INFO ] Parsed PT model containing 58 places and 81 transitions and 279 arcs in 211 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 34 ms.
Support contains 58 out of 58 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 20 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
// Phase 1: matrix 81 rows 58 cols
[2023-03-07 22:33:50] [INFO ] Computed 12 place invariants in 15 ms
[2023-03-07 22:33:51] [INFO ] Implicit Places using invariants in 297 ms returned []
[2023-03-07 22:33:51] [INFO ] Invariant cache hit.
[2023-03-07 22:33:51] [INFO ] State equation strengthened by 9 read => feed constraints.
[2023-03-07 22:33:51] [INFO ] Implicit Places using invariants and state equation in 159 ms returned []
Implicit Place search using SMT with State Equation took 515 ms to find 0 implicit places.
[2023-03-07 22:33:51] [INFO ] Invariant cache hit.
[2023-03-07 22:33:51] [INFO ] Dead Transitions using invariants and state equation in 148 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 686 ms. Remains : 58/58 places, 81/81 transitions.
Support contains 58 out of 58 places after structural reductions.
[2023-03-07 22:33:51] [INFO ] Flatten gal took : 71 ms
[2023-03-07 22:33:52] [INFO ] Flatten gal took : 44 ms
[2023-03-07 22:33:52] [INFO ] Input system was already deterministic with 81 transitions.
Incomplete random walk after 10000 steps, including 333 resets, run finished after 334 ms. (steps per millisecond=29 ) properties (out of 45) seen :44
Incomplete Best-First random walk after 10001 steps, including 38 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-07 22:33:52] [INFO ] Invariant cache hit.
[2023-03-07 22:33:53] [INFO ] [Real]Absence check using 12 positive place invariants in 8 ms returned sat
[2023-03-07 22:33:53] [INFO ] After 148ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 12 ms
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 17 ms
[2023-03-07 22:33:53] [INFO ] Input system was already deterministic with 81 transitions.
Computed a total of 0 stabilizing places and 9 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 58/58 places, 81/81 transitions.
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 7 ms
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 7 ms
[2023-03-07 22:33:53] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 11 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 58/58 places, 81/81 transitions.
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 6 ms
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 6 ms
[2023-03-07 22:33:53] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 58/58 places, 81/81 transitions.
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 7 ms
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 8 ms
[2023-03-07 22:33:53] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 7 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 58/58 places, 81/81 transitions.
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 7 ms
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 8 ms
[2023-03-07 22:33:53] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 2 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 58/58 places, 81/81 transitions.
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 11 ms
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 12 ms
[2023-03-07 22:33:53] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 4 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 58/58 places, 81/81 transitions.
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 9 ms
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 9 ms
[2023-03-07 22:33:53] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 58/58 places, 81/81 transitions.
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 10 ms
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 11 ms
[2023-03-07 22:33:53] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 7 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 58/58 places, 81/81 transitions.
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 9 ms
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 9 ms
[2023-03-07 22:33:53] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 3 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 58/58 places, 81/81 transitions.
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 8 ms
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 8 ms
[2023-03-07 22:33:53] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 3 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 58/58 places, 81/81 transitions.
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 7 ms
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 8 ms
[2023-03-07 22:33:53] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 3 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 58/58 places, 81/81 transitions.
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 17 ms
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 8 ms
[2023-03-07 22:33:53] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 3 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 58/58 places, 81/81 transitions.
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 7 ms
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 7 ms
[2023-03-07 22:33:53] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 3 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 58/58 places, 81/81 transitions.
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 7 ms
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 7 ms
[2023-03-07 22:33:53] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 2 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 58/58 places, 81/81 transitions.
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 7 ms
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 9 ms
[2023-03-07 22:33:53] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Applied a total of 0 rules in 3 ms. Remains 58 /58 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 58/58 places, 81/81 transitions.
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 8 ms
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 8 ms
[2023-03-07 22:33:53] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 58/58 places, 81/81 transitions.
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 0 with 24 rules applied. Total rules applied 24 place count 42 transition count 73
Discarding 21 places :
Symmetric choice reduction at 0 with 21 rule applications. Total rules 45 place count 21 transition count 52
Iterating global reduction 0 with 21 rules applied. Total rules applied 66 place count 21 transition count 52
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 72 place count 15 transition count 28
Iterating global reduction 0 with 6 rules applied. Total rules applied 78 place count 15 transition count 28
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 0 with 6 rules applied. Total rules applied 84 place count 15 transition count 22
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 1 with 6 rules applied. Total rules applied 90 place count 12 transition count 19
Applied a total of 90 rules in 20 ms. Remains 12 /58 variables (removed 46) and now considering 19/81 (removed 62) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 12/58 places, 19/81 transitions.
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 2 ms
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 3 ms
[2023-03-07 22:33:53] [INFO ] Input system was already deterministic with 19 transitions.
Finished random walk after 130 steps, including 5 resets, run visited all 1 properties in 3 ms. (steps per millisecond=43 )
FORMULA CSRepetitions-PT-03-CTLFireability-15 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
[2023-03-07 22:33:53] [INFO ] Flatten gal took : 14 ms
[2023-03-07 22:33:54] [INFO ] Flatten gal took : 15 ms
[2023-03-07 22:33:54] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 20 ms.
[2023-03-07 22:33:54] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 58 places, 81 transitions and 279 arcs took 2 ms.
Total runtime 3756 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT CSRepetitions-PT-03
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/370
CTLFireability
FORMULA CSRepetitions-PT-03-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-03-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-03-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-03-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-03-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-03-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-03-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-03-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-03-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-03-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-03-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678228786648
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/370/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/370/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/370/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: LAUNCH task # 1 (type EXCL) for 0 CSRepetitions-PT-03-CTLFireability-00
lola: time limit : 149 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 1 (type EXCL) for CSRepetitions-PT-03-CTLFireability-00
lola: result : true
lola: markings : 2883
lola: fired transitions : 7493
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 32 (type EXCL) for 31 CSRepetitions-PT-03-CTLFireability-09
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 32 (type EXCL) for CSRepetitions-PT-03-CTLFireability-09
lola: result : true
lola: markings : 192
lola: fired transitions : 356
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 18 CSRepetitions-PT-03-CTLFireability-06
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CSRepetitions-PT-03-CTLFireability-00: CTL true CTL model checker
CSRepetitions-PT-03-CTLFireability-09: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-PT-03-CTLFireability-01: EG 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-06: CONJ 0 1 1 0 2 0 0 0
CSRepetitions-PT-03-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 5/257 3/32 CSRepetitions-PT-03-CTLFireability-06 646998 m, 129399 m/sec, 2524405 t fired, .
Time elapsed: 6 secs. Pages in use: 3
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CSRepetitions-PT-03-CTLFireability-00: CTL true CTL model checker
CSRepetitions-PT-03-CTLFireability-09: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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CSRepetitions-PT-03-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-06: CONJ 0 1 1 0 2 0 0 0
CSRepetitions-PT-03-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
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CSRepetitions-PT-03-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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23 CTL EXCL 10/257 6/32 CSRepetitions-PT-03-CTLFireability-06 1259908 m, 122582 m/sec, 5182115 t fired, .
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CSRepetitions-PT-03-CTLFireability-00: CTL true CTL model checker
CSRepetitions-PT-03-CTLFireability-09: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-PT-03-CTLFireability-01: EG 0 1 0 0 1 0 0 0
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CSRepetitions-PT-03-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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CSRepetitions-PT-03-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-06: CONJ 0 1 1 0 2 0 0 0
CSRepetitions-PT-03-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
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CSRepetitions-PT-03-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 15/257 8/32 CSRepetitions-PT-03-CTLFireability-06 1820947 m, 112207 m/sec, 7925309 t fired, .
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CSRepetitions-PT-03-CTLFireability-00: CTL true CTL model checker
CSRepetitions-PT-03-CTLFireability-09: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-PT-03-CTLFireability-01: EG 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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CSRepetitions-PT-03-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-06: CONJ 0 1 1 0 2 0 0 0
CSRepetitions-PT-03-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
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CSRepetitions-PT-03-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 20/257 10/32 CSRepetitions-PT-03-CTLFireability-06 2334096 m, 102629 m/sec, 11014104 t fired, .
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CSRepetitions-PT-03-CTLFireability-00: CTL true CTL model checker
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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CSRepetitions-PT-03-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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CSRepetitions-PT-03-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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23 CTL EXCL 25/257 12/32 CSRepetitions-PT-03-CTLFireability-06 2800480 m, 93276 m/sec, 14130296 t fired, .
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CSRepetitions-PT-03-CTLFireability-00: CTL true CTL model checker
CSRepetitions-PT-03-CTLFireability-09: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-PT-03-CTLFireability-01: EG 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-06: CONJ 0 1 1 0 2 0 0 0
CSRepetitions-PT-03-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
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CSRepetitions-PT-03-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 30/257 14/32 CSRepetitions-PT-03-CTLFireability-06 3285938 m, 97091 m/sec, 17713653 t fired, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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CSRepetitions-PT-03-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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23 CTL EXCL 35/257 16/32 CSRepetitions-PT-03-CTLFireability-06 3735754 m, 89963 m/sec, 21091500 t fired, .
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CSRepetitions-PT-03-CTLFireability-00: CTL true CTL model checker
CSRepetitions-PT-03-CTLFireability-09: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-PT-03-CTLFireability-01: EG 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CSRepetitions-PT-03-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
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CSRepetitions-PT-03-CTLFireability-09: CTL true CTL model checker
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CSRepetitions-PT-03-CTLFireability-09: CTL true CTL model checker
CSRepetitions-PT-03-CTLFireability-10: CTL false CTL model checker
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CSRepetitions-PT-03-CTLFireability-07: CTL true CTL model checker
CSRepetitions-PT-03-CTLFireability-09: CTL true CTL model checker
CSRepetitions-PT-03-CTLFireability-10: CTL false CTL model checker
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CSRepetitions-PT-03-CTLFireability-00: CTL true CTL model checker
CSRepetitions-PT-03-CTLFireability-01: EG true state space / EG
CSRepetitions-PT-03-CTLFireability-02: CTL false CTL model checker
CSRepetitions-PT-03-CTLFireability-03: CTL unknown AGGR
CSRepetitions-PT-03-CTLFireability-04: CTL true CTL model checker
CSRepetitions-PT-03-CTLFireability-05: CTL true CTL model checker
CSRepetitions-PT-03-CTLFireability-06: CONJ false CTL model checker
CSRepetitions-PT-03-CTLFireability-07: CTL true CTL model checker
CSRepetitions-PT-03-CTLFireability-08: CTL unknown AGGR
CSRepetitions-PT-03-CTLFireability-09: CTL true CTL model checker
CSRepetitions-PT-03-CTLFireability-10: CTL false CTL model checker
CSRepetitions-PT-03-CTLFireability-11: CTL unknown AGGR
CSRepetitions-PT-03-CTLFireability-12: CTL unknown AGGR
CSRepetitions-PT-03-CTLFireability-13: CTL false CTL model checker
CSRepetitions-PT-03-CTLFireability-14: CTL true CTL model checker
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CSRepetitions-PT-03"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is CSRepetitions-PT-03, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r071-smll-167814397500058"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/CSRepetitions-PT-03.tgz
mv CSRepetitions-PT-03 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;