Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r070-smll-167814396800130.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is CircadianClock-PT-010000, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r070-smll-167814396800130
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 460K
-rw-r--r-- 1 mcc users 7.8K Feb 26 10:40 CTLCardinality.txt
-rw-r--r-- 1 mcc users 85K Feb 26 10:40 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 26 10:36 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Feb 26 10:36 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 15:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 15:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 26 10:41 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 115K Feb 26 10:41 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Feb 26 10:41 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 62K Feb 26 10:41 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 11K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CircadianClock-PT-010000-CTLFireability-00
FORMULA_NAME CircadianClock-PT-010000-CTLFireability-01
FORMULA_NAME CircadianClock-PT-010000-CTLFireability-02
FORMULA_NAME CircadianClock-PT-010000-CTLFireability-03
FORMULA_NAME CircadianClock-PT-010000-CTLFireability-04
FORMULA_NAME CircadianClock-PT-010000-CTLFireability-05
FORMULA_NAME CircadianClock-PT-010000-CTLFireability-06
FORMULA_NAME CircadianClock-PT-010000-CTLFireability-07
FORMULA_NAME CircadianClock-PT-010000-CTLFireability-08
FORMULA_NAME CircadianClock-PT-010000-CTLFireability-09
FORMULA_NAME CircadianClock-PT-010000-CTLFireability-10
FORMULA_NAME CircadianClock-PT-010000-CTLFireability-11
FORMULA_NAME CircadianClock-PT-010000-CTLFireability-12
FORMULA_NAME CircadianClock-PT-010000-CTLFireability-13
FORMULA_NAME CircadianClock-PT-010000-CTLFireability-14
FORMULA_NAME CircadianClock-PT-010000-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678269104596

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CircadianClock-PT-010000
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT CircadianClock-PT-010000
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA CircadianClock-PT-010000-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CircadianClock-PT-010000-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CircadianClock-PT-010000-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CircadianClock-PT-010000-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CircadianClock-PT-010000-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678269350531

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:183
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 63 (type EXCL) for 46 CircadianClock-PT-010000-CTLFireability-14
lola: time limit : 124 sec
lola: memory limit: 32 pages
lola: FINISHED task # 63 (type EXCL) for CircadianClock-PT-010000-CTLFireability-14
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 57 (type EXCL) for 46 CircadianClock-PT-010000-CTLFireability-14
lola: time limit : 138 sec
lola: memory limit: 32 pages
lola: FINISHED task # 57 (type EXCL) for CircadianClock-PT-010000-CTLFireability-14
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 16 (type EXCL) for 15 CircadianClock-PT-010000-CTLFireability-05
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:716
lola: rewrite Frontend/Parser/formula_rewrite.k:688
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircadianClock-PT-010000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
CircadianClock-PT-010000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-11: EXEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-14: DISJ 0 3 0 0 7 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/189 8/32 CircadianClock-PT-010000-CTLFireability-05 1851600 m, 370320 m/sec, 6476307 t fired, .

Time elapsed: 5 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircadianClock-PT-010000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
CircadianClock-PT-010000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-11: EXEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-14: DISJ 0 3 0 0 7 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 10/189 15/32 CircadianClock-PT-010000-CTLFireability-05 3572398 m, 344159 m/sec, 12499414 t fired, .

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CircadianClock-PT-010000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
CircadianClock-PT-010000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-11: EXEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-14: DISJ 0 3 0 0 7 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 15/189 22/32 CircadianClock-PT-010000-CTLFireability-05 5267212 m, 338962 m/sec, 18418532 t fired, .

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CircadianClock-PT-010000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
CircadianClock-PT-010000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-11: EXEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-14: DISJ 0 3 0 0 7 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 20/189 28/32 CircadianClock-PT-010000-CTLFireability-05 6893150 m, 325187 m/sec, 24122256 t fired, .

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CircadianClock-PT-010000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
CircadianClock-PT-010000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-11: EXEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-14: DISJ 0 3 0 0 7 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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lola: result : false
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lola: time used : 0.000000
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lola: memory pages used : 1
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lola: result : false
lola: markings : 10002
lola: fired transitions : 10005
lola: time used : 0.000000
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CircadianClock-PT-010000-CTLFireability-12: CTL false CTL model checker
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CircadianClock-PT-010000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 1 0 2 0 0 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 CTL EXCL 5/297 9/32 CircadianClock-PT-010000-CTLFireability-09 2246204 m, 449240 m/sec, 5612519 t fired, .

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CircadianClock-PT-010000-CTLFireability-12: CTL false CTL model checker
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CircadianClock-PT-010000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 1 0 2 0 0 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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30 CTL EXCL 10/297 19/32 CircadianClock-PT-010000-CTLFireability-09 4572388 m, 465236 m/sec, 11426933 t fired, .

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CircadianClock-PT-010000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 1 0 2 0 0 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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30 CTL EXCL 15/297 28/32 CircadianClock-PT-010000-CTLFireability-09 6768808 m, 439284 m/sec, 16917952 t fired, .

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CircadianClock-PT-010000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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CircadianClock-PT-010000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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22 CTL EXCL 5/323 7/32 CircadianClock-PT-010000-CTLFireability-07 1610162 m, 322032 m/sec, 7210727 t fired, .

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CircadianClock-PT-010000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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22 CTL EXCL 10/323 13/32 CircadianClock-PT-010000-CTLFireability-07 3030843 m, 284136 m/sec, 13634062 t fired, .

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CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
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CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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22 CTL EXCL 15/323 18/32 CircadianClock-PT-010000-CTLFireability-07 4417482 m, 277327 m/sec, 19877185 t fired, .

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CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
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CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
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CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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CircadianClock-PT-010000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
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CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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CircadianClock-PT-010000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
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CircadianClock-PT-010000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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CircadianClock-PT-010000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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19 CTL EXCL 5/352 6/32 CircadianClock-PT-010000-CTLFireability-06 1347129 m, 269425 m/sec, 7377604 t fired, .

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CircadianClock-PT-010000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
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CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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19 CTL EXCL 10/352 11/32 CircadianClock-PT-010000-CTLFireability-06 2553771 m, 241328 m/sec, 14042240 t fired, .

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CircadianClock-PT-010000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
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CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
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19 CTL EXCL 15/352 15/32 CircadianClock-PT-010000-CTLFireability-06 3710372 m, 231320 m/sec, 20371329 t fired, .

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CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
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CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
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CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
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CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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CircadianClock-PT-010000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
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CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
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19 CTL EXCL 30/352 29/32 CircadianClock-PT-010000-CTLFireability-06 6990707 m, 214772 m/sec, 38443186 t fired, .

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CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
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CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
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13 CTL EXCL 15/387 31/32 CircadianClock-PT-010000-CTLFireability-04 7649745 m, 473592 m/sec, 11470128 t fired, .

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CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
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CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
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CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
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CircadianClock-PT-010000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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CircadianClock-PT-010000-CTLFireability-12: CTL false CTL model checker
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CircadianClock-PT-010000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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1 CTL EXCL 5/493 11/32 CircadianClock-PT-010000-CTLFireability-00 2738526 m, 547705 m/sec, 6845440 t fired, .

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CircadianClock-PT-010000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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1 CTL EXCL 10/493 21/32 CircadianClock-PT-010000-CTLFireability-00 5009150 m, 454124 m/sec, 12518550 t fired, .

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CircadianClock-PT-010000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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1 CTL EXCL 15/493 30/32 CircadianClock-PT-010000-CTLFireability-00 7239675 m, 446105 m/sec, 18098662 t fired, .

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CircadianClock-PT-010000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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CircadianClock-PT-010000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 0 1 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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CircadianClock-PT-010000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 0 1 0 2 0 1 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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68 AGEF EXCL 10/572 30/32 CircadianClock-PT-010000-CTLFireability-09 8197973 m, 794194 m/sec, 12295534 t fired, .

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CircadianClock-PT-010000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 0 0 0 2 0 2 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-15: EG 0 1 0 0 1 0 0 0

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CircadianClock-PT-010000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 0 1 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 0 0 0 2 0 2 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

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CircadianClock-PT-010000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
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CircadianClock-PT-010000-CTLFireability-08: AGEF 0 0 1 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 0 0 0 2 0 2 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

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25 AGEF EXCL 10/855 30/32 CircadianClock-PT-010000-CTLFireability-08 8016117 m, 800208 m/sec, 12021832 t fired, .

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CircadianClock-PT-010000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
CircadianClock-PT-010000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
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CircadianClock-PT-010000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 0 0 0 2 0 2 0
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CircadianClock-PT-010000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-03: AGEF 0 0 1 0 1 0 0 0
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CircadianClock-PT-010000-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-08: AGEF 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 0 0 0 2 0 2 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

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CircadianClock-PT-010000-CTLFireability-08: AGEF 0 0 0 0 1 0 1 0
CircadianClock-PT-010000-CTLFireability-09: DISJ 0 0 0 0 2 0 2 0
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CircadianClock-PT-010000-CTLFireability-03: AGEF 0 0 0 0 1 0 1 0
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CircadianClock-PT-010000-CTLFireability-09: DISJ 0 0 0 0 2 0 2 0
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CircadianClock-PT-010000-CTLFireability-11: EXEF true state space /EXEF
CircadianClock-PT-010000-CTLFireability-12: CTL false CTL model checker
CircadianClock-PT-010000-CTLFireability-14: DISJ true CTL model checker
CircadianClock-PT-010000-CTLFireability-15: EG false state space / EG

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CircadianClock-PT-010000-CTLFireability-09: DISJ 0 0 0 0 2 0 2 0
CircadianClock-PT-010000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 5/1695 10/32 CircadianClock-PT-010000-CTLFireability-13 2309735 m, 461947 m/sec, 5769584 t fired, .

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CircadianClock-PT-010000-CTLFireability-12: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 10/1695 19/32 CircadianClock-PT-010000-CTLFireability-13 4646982 m, 467449 m/sec, 11614196 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 15/1695 28/32 CircadianClock-PT-010000-CTLFireability-13 6916192 m, 453842 m/sec, 17288228 t fired, .

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CircadianClock-PT-010000-CTLFireability-12: CTL false CTL model checker
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CircadianClock-PT-010000-CTLFireability-09: DISJ 0 0 0 0 2 0 2 0
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CircadianClock-PT-010000-CTLFireability-12: CTL false CTL model checker
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4 CTL EXCL 5/3370 13/32 CircadianClock-PT-010000-CTLFireability-01 3049970 m, 609994 m/sec, 4570125 t fired, .

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CircadianClock-PT-010000-CTLFireability-12: CTL false CTL model checker
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CircadianClock-PT-010000-CTLFireability-15: EG false state space / EG

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4 CTL EXCL 10/3370 27/32 CircadianClock-PT-010000-CTLFireability-01 6610411 m, 712088 m/sec, 9910744 t fired, .

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CircadianClock-PT-010000-CTLFireability-12: CTL false CTL model checker
CircadianClock-PT-010000-CTLFireability-14: DISJ true CTL model checker
CircadianClock-PT-010000-CTLFireability-15: EG false state space / EG

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircadianClock-PT-010000-CTLFireability-00: CTL unknown AGGR
CircadianClock-PT-010000-CTLFireability-01: CTL unknown AGGR
CircadianClock-PT-010000-CTLFireability-02: CTL unknown AGGR
CircadianClock-PT-010000-CTLFireability-03: AGEF unknown AGGR
CircadianClock-PT-010000-CTLFireability-04: CTL unknown AGGR
CircadianClock-PT-010000-CTLFireability-05: CTL unknown AGGR
CircadianClock-PT-010000-CTLFireability-06: CTL unknown AGGR
CircadianClock-PT-010000-CTLFireability-07: CTL unknown AGGR
CircadianClock-PT-010000-CTLFireability-08: AGEF unknown AGGR
CircadianClock-PT-010000-CTLFireability-09: DISJ unknown DISJ
CircadianClock-PT-010000-CTLFireability-10: CTL false CTL model checker
CircadianClock-PT-010000-CTLFireability-11: EXEF true state space /EXEF
CircadianClock-PT-010000-CTLFireability-12: CTL false CTL model checker
CircadianClock-PT-010000-CTLFireability-13: CTL unknown AGGR
CircadianClock-PT-010000-CTLFireability-14: DISJ true CTL model checker
CircadianClock-PT-010000-CTLFireability-15: EG false state space / EG


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircadianClock-PT-010000"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is CircadianClock-PT-010000, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r070-smll-167814396800130"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CircadianClock-PT-010000.tgz
mv CircadianClock-PT-010000 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;