fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r070-smll-167814396700047
Last Updated
May 14, 2023

About the Execution of LoLA for CSRepetitions-COL-10

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16223.676 651785.00 532633.00 27070.90 ?????????F?F???F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r070-smll-167814396700047.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is CSRepetitions-COL-10, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r070-smll-167814396700047
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 512K
-rw-r--r-- 1 mcc users 8.8K Feb 25 12:42 CTLCardinality.txt
-rw-r--r-- 1 mcc users 78K Feb 25 12:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.9K Feb 25 12:30 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 25 12:30 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 5.1K Feb 25 15:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 30K Feb 25 15:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 15:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 15:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Feb 25 13:30 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 139K Feb 25 13:30 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.7K Feb 25 13:11 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 59K Feb 25 13:11 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 15:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 15:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 18K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CSRepetitions-COL-10-ReachabilityFireability-00
FORMULA_NAME CSRepetitions-COL-10-ReachabilityFireability-01
FORMULA_NAME CSRepetitions-COL-10-ReachabilityFireability-02
FORMULA_NAME CSRepetitions-COL-10-ReachabilityFireability-03
FORMULA_NAME CSRepetitions-COL-10-ReachabilityFireability-04
FORMULA_NAME CSRepetitions-COL-10-ReachabilityFireability-05
FORMULA_NAME CSRepetitions-COL-10-ReachabilityFireability-06
FORMULA_NAME CSRepetitions-COL-10-ReachabilityFireability-07
FORMULA_NAME CSRepetitions-COL-10-ReachabilityFireability-08
FORMULA_NAME CSRepetitions-COL-10-ReachabilityFireability-09
FORMULA_NAME CSRepetitions-COL-10-ReachabilityFireability-10
FORMULA_NAME CSRepetitions-COL-10-ReachabilityFireability-11
FORMULA_NAME CSRepetitions-COL-10-ReachabilityFireability-12
FORMULA_NAME CSRepetitions-COL-10-ReachabilityFireability-13
FORMULA_NAME CSRepetitions-COL-10-ReachabilityFireability-14
FORMULA_NAME CSRepetitions-COL-10-ReachabilityFireability-15

=== Now, execution of the tool begins

BK_START 1678242757899

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CSRepetitions-COL-10
Not applying reductions.
Model is COL
ReachabilityFireability COL
starting LoLA
BK_INPUT CSRepetitions-COL-10
BK_EXAMINATION: ReachabilityFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
ReachabilityFireability

FORMULA CSRepetitions-COL-10-ReachabilityFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CSRepetitions-COL-10-ReachabilityFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CSRepetitions-COL-10-ReachabilityFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678243409684

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: TR BINDINGS
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH INITIAL
lola: LAUNCH task # 29 (type SKEL/CNST) for 27 CSRepetitions-COL-10-ReachabilityFireability-09
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 29 (type SKEL/CNST) for CSRepetitions-COL-10-ReachabilityFireability-09
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type SKEL/FNDP) for 24 CSRepetitions-COL-10-ReachabilityFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/EQUN) for 24 CSRepetitions-COL-10-ReachabilityFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type SKEL/SRCH) for 24 CSRepetitions-COL-10-ReachabilityFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type SKEL/SRCH) for 24 CSRepetitions-COL-10-ReachabilityFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: TR BINDINGS DONE
lola: Places: 1311, Transitions: 2300
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 52 (type SKEL/FNDP) for CSRepetitions-COL-10-ReachabilityFireability-08
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 56 (type SKEL/SRCH) for CSRepetitions-COL-10-ReachabilityFireability-08
lola: result : true
lola: markings : 103
lola: fired transitions : 102
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH INITIAL
lola: LAUNCH task # 35 (type SKEL/CNST) for 33 CSRepetitions-COL-10-ReachabilityFireability-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 47 (type SKEL/CNST) for 45 CSRepetitions-COL-10-ReachabilityFireability-15
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: CANCELED task # 53 (type EQUN) for CSRepetitions-COL-10-ReachabilityFireability-08 (obsolete)
lola: CANCELED task # 55 (type SRCH) for CSRepetitions-COL-10-ReachabilityFireability-08 (obsolete)
lola: LAUNCH task # 49 (type SKEL/FNDP) for 21 CSRepetitions-COL-10-ReachabilityFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type SKEL/EQUN) for 21 CSRepetitions-COL-10-ReachabilityFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 55 (type SKEL/SRCH) for CSRepetitions-COL-10-ReachabilityFireability-08
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 47 (type SKEL/CNST) for CSRepetitions-COL-10-ReachabilityFireability-15
lola: result : false
lola: FINISHED task # 53 (type SKEL/EQUN) for CSRepetitions-COL-10-ReachabilityFireability-08
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 60 (type SKEL/FNDP) for 9 CSRepetitions-COL-10-ReachabilityFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 35 (type SKEL/CNST) for CSRepetitions-COL-10-ReachabilityFireability-11
lola: result : false
lola: LAUNCH task # 62 (type SKEL/FNDP) for 12 CSRepetitions-COL-10-ReachabilityFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 49 (type SKEL/FNDP) for CSRepetitions-COL-10-ReachabilityFireability-07
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 50 (type EQUN) for CSRepetitions-COL-10-ReachabilityFireability-07 (obsolete)
lola: LAUNCH task # 63 (type SKEL/EQUN) for 12 CSRepetitions-COL-10-ReachabilityFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 65 (type SKEL/SRCH) for 12 CSRepetitions-COL-10-ReachabilityFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 60 (type SKEL/FNDP) for CSRepetitions-COL-10-ReachabilityFireability-03
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 50 (type SKEL/EQUN) for CSRepetitions-COL-10-ReachabilityFireability-07
lola: result : unknown
lola: LAUNCH task # 66 (type SKEL/SRCH) for 12 CSRepetitions-COL-10-ReachabilityFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 65 (type SKEL/SRCH) for CSRepetitions-COL-10-ReachabilityFireability-04
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 62 (type FNDP) for CSRepetitions-COL-10-ReachabilityFireability-04 (obsolete)
lola: CANCELED task # 63 (type EQUN) for CSRepetitions-COL-10-ReachabilityFireability-04 (obsolete)
lola: CANCELED task # 66 (type SRCH) for CSRepetitions-COL-10-ReachabilityFireability-04 (obsolete)
lola: FINISHED task # 66 (type SKEL/SRCH) for CSRepetitions-COL-10-ReachabilityFireability-04
lola: result : true
lola: markings : 103
lola: fired transitions : 102
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 63 (type SKEL/EQUN) for CSRepetitions-COL-10-ReachabilityFireability-04
lola: result : unknown
lola: FINISHED task # 62 (type SKEL/FNDP) for CSRepetitions-COL-10-ReachabilityFireability-04
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: @ trans Prepare_Request
lola: @ trans Read_Request
lola: @ trans Send_Answer
lola: @ trans Lose_Request
lola: @ trans Send_Request
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CSRepetitions-COL-10-ReachabilityFireability-09: INITIAL false skeleton: preprocessing
CSRepetitions-COL-10-ReachabilityFireability-11: INITIAL false skeleton: preprocessing
CSRepetitions-COL-10-ReachabilityFireability-15: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-COL-10-ReachabilityFireability-00: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-01: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-02: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-03: AG 0 0 0 0 1 0 0 4
CSRepetitions-COL-10-ReachabilityFireability-04: EF 0 0 0 0 4 0 0 1
CSRepetitions-COL-10-ReachabilityFireability-05: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-06: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-07: EF 0 0 0 0 2 0 0 3
CSRepetitions-COL-10-ReachabilityFireability-08: EF 0 0 0 0 4 0 0 1
CSRepetitions-COL-10-ReachabilityFireability-10: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-12: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-13: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-14: AG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CSRepetitions-COL-10-ReachabilityFireability-09: INITIAL false skeleton: preprocessing
CSRepetitions-COL-10-ReachabilityFireability-11: INITIAL false skeleton: preprocessing
CSRepetitions-COL-10-ReachabilityFireability-15: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-COL-10-ReachabilityFireability-00: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-01: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-02: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-03: AG 0 0 0 0 1 0 0 4
CSRepetitions-COL-10-ReachabilityFireability-04: EF 0 0 0 0 4 0 0 1
CSRepetitions-COL-10-ReachabilityFireability-05: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-06: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-07: EF 0 0 0 0 2 0 0 3
CSRepetitions-COL-10-ReachabilityFireability-08: EF 0 0 0 0 4 0 0 1
CSRepetitions-COL-10-ReachabilityFireability-10: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-12: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-13: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-14: AG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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CSRepetitions-COL-10-ReachabilityFireability-09: INITIAL false skeleton: preprocessing
CSRepetitions-COL-10-ReachabilityFireability-11: INITIAL false skeleton: preprocessing
CSRepetitions-COL-10-ReachabilityFireability-15: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-COL-10-ReachabilityFireability-00: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-01: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-02: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-03: AG 0 0 0 0 1 0 0 4
CSRepetitions-COL-10-ReachabilityFireability-04: EF 0 0 0 0 4 0 0 1
CSRepetitions-COL-10-ReachabilityFireability-05: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-06: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-07: EF 0 0 0 0 2 0 0 3
CSRepetitions-COL-10-ReachabilityFireability-08: EF 0 0 0 0 4 0 0 1
CSRepetitions-COL-10-ReachabilityFireability-10: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-12: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-13: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-14: AG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CSRepetitions-COL-10-ReachabilityFireability-09: INITIAL false skeleton: preprocessing
CSRepetitions-COL-10-ReachabilityFireability-11: INITIAL false skeleton: preprocessing
CSRepetitions-COL-10-ReachabilityFireability-15: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-COL-10-ReachabilityFireability-00: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-01: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-02: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-03: AG 0 0 0 0 1 0 0 4
CSRepetitions-COL-10-ReachabilityFireability-04: EF 0 0 0 0 4 0 0 1
CSRepetitions-COL-10-ReachabilityFireability-05: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-06: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-07: EF 0 0 0 0 2 0 0 3
CSRepetitions-COL-10-ReachabilityFireability-08: EF 0 0 0 0 4 0 0 1
CSRepetitions-COL-10-ReachabilityFireability-10: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-12: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-13: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-14: AG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CSRepetitions-COL-10-ReachabilityFireability-09: INITIAL false skeleton: preprocessing
CSRepetitions-COL-10-ReachabilityFireability-11: INITIAL false skeleton: preprocessing
CSRepetitions-COL-10-ReachabilityFireability-15: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-COL-10-ReachabilityFireability-00: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-01: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-02: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-03: AG 0 0 0 0 1 0 0 4
CSRepetitions-COL-10-ReachabilityFireability-04: EF 0 0 0 0 4 0 0 1
CSRepetitions-COL-10-ReachabilityFireability-05: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-06: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-07: EF 0 0 0 0 2 0 0 3
CSRepetitions-COL-10-ReachabilityFireability-08: EF 0 0 0 0 4 0 0 1
CSRepetitions-COL-10-ReachabilityFireability-10: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-12: EF 0 0 0 0 1 0 0 0
CSRepetitions-COL-10-ReachabilityFireability-13: EF 0 0 0 0 1 0 0 0
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/home/mcc/BenchKit/bin//../lola/bin//../BenchKit_head.sh: line 63: 374 Killed lola --conf=$BIN_DIR/configfiles/reachabilityfireabilityconf --formula=$DIR/ReachabilityFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CSRepetitions-COL-10"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is CSRepetitions-COL-10, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r070-smll-167814396700047"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CSRepetitions-COL-10.tgz
mv CSRepetitions-COL-10 execution
cd execution
if [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "UpperBounds" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] || [ "ReachabilityFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;