Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r062-tajo-167813710800080.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-5348
Executing tool gold2022
Input is BridgeAndVehicles-COL-V50P50N50, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r062-tajo-167813710800080
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 488K
-rw-r--r-- 1 mcc users 8.1K Feb 25 12:36 CTLCardinality.txt
-rw-r--r-- 1 mcc users 75K Feb 25 12:36 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Feb 25 12:32 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 25 12:32 CTLFireability.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 4.2K Feb 25 15:36 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 15:36 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 15:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 15:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 44K Mar 5 18:22 model.pnml
-rw-r--r-- 1 mcc users 9.7K Feb 25 13:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 86K Feb 25 13:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 25 13:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 92K Feb 25 13:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 15:36 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 15:36 UpperBounds.xml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLFireability-00
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLFireability-01
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLFireability-02
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLFireability-03
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLFireability-04
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLFireability-05
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLFireability-06
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLFireability-07
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLFireability-08
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLFireability-09
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLFireability-10
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLFireability-11
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLFireability-12
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLFireability-13
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLFireability-14
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678875686842

gold2022
Got BK_BIN_PATH=/home/mcc/BenchKit/bin/
---> gold2022 --- TAPAAL v5
Setting MODEL_PATH=.
Setting VERIFYPN=/home/mcc/BenchKit/bin/verifypn
Got BK_TIME_CONFINEMENT=3600
Setting TEMPDIR=/home/mcc/BenchKit/bin/tmp
Got BK_MEMORY_CONFINEMENT=16384
Limiting to 16265216 kB
Total timeout: 3590
Time left: 3590

*************************************
* TAPAAL verifying CTLFireability *
*************************************
TEMPDIR=/home/mcc/BenchKit/bin/tmp
QF=/home/mcc/BenchKit/bin/tmp/tmp.IJrN7bpzvG
MF=/home/mcc/BenchKit/bin/tmp/tmp.VwPl3mOiBM
Time left: 3590
---------------------------------------------------
Step -1: Stripping Colors
---------------------------------------------------
Verifying stripped models (16 in total)
/home/mcc/BenchKit/bin/verifypn -n -c -q 718 -l 29 -d 299 -z 4 -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping BridgeAndVehicles-COL-V50P50N50-CTLFireability-15
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping BridgeAndVehicles-COL-V50P50N50-CTLFireability-14
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping BridgeAndVehicles-COL-V50P50N50-CTLFireability-13
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping BridgeAndVehicles-COL-V50P50N50-CTLFireability-12
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping BridgeAndVehicles-COL-V50P50N50-CTLFireability-11
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping BridgeAndVehicles-COL-V50P50N50-CTLFireability-10
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping BridgeAndVehicles-COL-V50P50N50-CTLFireability-09
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping BridgeAndVehicles-COL-V50P50N50-CTLFireability-08
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping BridgeAndVehicles-COL-V50P50N50-CTLFireability-07
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping BridgeAndVehicles-COL-V50P50N50-CTLFireability-06
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping BridgeAndVehicles-COL-V50P50N50-CTLFireability-05
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping BridgeAndVehicles-COL-V50P50N50-CTLFireability-04
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping BridgeAndVehicles-COL-V50P50N50-CTLFireability-03
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping BridgeAndVehicles-COL-V50P50N50-CTLFireability-02
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping BridgeAndVehicles-COL-V50P50N50-CTLFireability-01
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping BridgeAndVehicles-COL-V50P50N50-CTLFireability-00
WARNING: Could not run CPN over-approximation on any queries, terminating.
Time left: 3590
---------------------------------------------------
Step 0: Parallel Simplification
---------------------------------------------------
Doing parallel simplification (16 in total)
Total simplification timout is 718 -- reduction timeout is 299
timeout 3590 /home/mcc/BenchKit/bin/verifypn -n -q 718 -l 29 -d 299 -z 4 -s OverApprox --binary-query-io 2 --write-simplified /home/mcc/BenchKit/bin/tmp/tmp.IJrN7bpzvG --write-reduced /home/mcc/BenchKit/bin/tmp/tmp.VwPl3mOiBM -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml

Time left: 2856

---------------------------------------------------
Step 1: Parallel processing
---------------------------------------------------
Doing parallel verification of individual queries (16 in total)
Each query is verified by 4 parallel strategies for 299 seconds
------------------- QUERY 1 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 1.08581 on verification
@@@5.82,75904@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.VwPl3mOiBM /home/mcc/BenchKit/bin/tmp/tmp.IJrN7bpzvG --binary-query-io 1 -x 1 -n

FORMULA BridgeAndVehicles-COL-V50P50N50-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2850
------------------- QUERY 2 ----------------------
No solution found



Time left: 2548
------------------- QUERY 3 ----------------------
No solution found



Time left: 2247
------------------- QUERY 4 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.052102 on verification
@@@4.18,77432@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.VwPl3mOiBM /home/mcc/BenchKit/bin/tmp/tmp.IJrN7bpzvG --binary-query-io 1 -x 4 -n

FORMULA BridgeAndVehicles-COL-V50P50N50-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2243
------------------- QUERY 5 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.053371 on verification
@@@4.18,77576@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.VwPl3mOiBM /home/mcc/BenchKit/bin/tmp/tmp.IJrN7bpzvG --binary-query-io 1 -x 5 -n

FORMULA BridgeAndVehicles-COL-V50P50N50-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2238
------------------- QUERY 6 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.054281 on verification
@@@3.89,76080@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.VwPl3mOiBM /home/mcc/BenchKit/bin/tmp/tmp.IJrN7bpzvG --binary-query-io 1 -x 6 -n

FORMULA BridgeAndVehicles-COL-V50P50N50-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2234
------------------- QUERY 7 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 62.7124 on verification
@@@66.61,632904@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.VwPl3mOiBM /home/mcc/BenchKit/bin/tmp/tmp.IJrN7bpzvG --binary-query-io 1 -x 7 -n

FORMULA BridgeAndVehicles-COL-V50P50N50-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2167
------------------- QUERY 8 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.049187 on verification
@@@3.88,75888@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.VwPl3mOiBM /home/mcc/BenchKit/bin/tmp/tmp.IJrN7bpzvG --binary-query-io 1 -x 8 -n

FORMULA BridgeAndVehicles-COL-V50P50N50-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2163
------------------- QUERY 9 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.059346 on verification
@@@3.90,76632@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.VwPl3mOiBM /home/mcc/BenchKit/bin/tmp/tmp.IJrN7bpzvG --binary-query-io 1 -x 9 -n

FORMULA BridgeAndVehicles-COL-V50P50N50-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2159
------------------- QUERY 10 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.046558 on verification
@@@3.83,77544@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.VwPl3mOiBM /home/mcc/BenchKit/bin/tmp/tmp.IJrN7bpzvG --binary-query-io 1 -x 10 -n

FORMULA BridgeAndVehicles-COL-V50P50N50-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2155
------------------- QUERY 11 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.084376 on verification
@@@4.01,76796@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.VwPl3mOiBM /home/mcc/BenchKit/bin/tmp/tmp.IJrN7bpzvG --binary-query-io 1 -x 11 -n

FORMULA BridgeAndVehicles-COL-V50P50N50-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2151
------------------- QUERY 12 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.064021 on verification
@@@3.90,76884@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.VwPl3mOiBM /home/mcc/BenchKit/bin/tmp/tmp.IJrN7bpzvG --binary-query-io 1 -x 12 -n

FORMULA BridgeAndVehicles-COL-V50P50N50-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2147
------------------- QUERY 13 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.078507 on verification
@@@3.94,77560@@@


Query index 0 was solved
Query is NOT satisfied.

Spent 0.077293 on verification
@@@3.92,77636@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.VwPl3mOiBM /home/mcc/BenchKit/bin/tmp/tmp.IJrN7bpzvG --binary-query-io 1 -x 13 -n
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.VwPl3mOiBM /home/mcc/BenchKit/bin/tmp/tmp.IJrN7bpzvG --binary-query-io 1 -x 13 -n

FORMULA BridgeAndVehicles-COL-V50P50N50-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2143
------------------- QUERY 14 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.059111 on verification
@@@3.91,77444@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.VwPl3mOiBM /home/mcc/BenchKit/bin/tmp/tmp.IJrN7bpzvG --binary-query-io 1 -x 14 -n

FORMULA BridgeAndVehicles-COL-V50P50N50-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2139
------------------- QUERY 15 ----------------------
No solution found



Time left: 1837
------------------- QUERY 16 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 32.3332 on verification
@@@36.62,493872@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.VwPl3mOiBM /home/mcc/BenchKit/bin/tmp/tmp.IJrN7bpzvG --binary-query-io 1 -x 16 -n

FORMULA BridgeAndVehicles-COL-V50P50N50-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 1800
---------------------------------------------------
Step 2: Sequential processing
---------------------------------------------------
Remaining 3 queries are verified sequentially.
Each query is verified for a dynamic timeout (at least 598 seconds)
Time left: 1800
------------------- QUERY 2 ----------------------
Running query 2 for 600 seconds. Remaining: 3 queries and 1800 seconds
No solution found



Time left: 1198
------------------- QUERY 3 ----------------------
Running query 3 for 599 seconds. Remaining: 2 queries and 1198 seconds
No solution found



Time left: 596
------------------- QUERY 15 ----------------------
Time left: 596
---------------------------------------------------
Step 4: Random Parallel processing
---------------------------------------------------
Doing random parallel verification of individual queries (3 in total)
Each query is verified by 4 parallel strategies for 198 seconds
------------------- QUERY 2 ----------------------
No solution found



Time left: 395
------------------- QUERY 3 ----------------------
No solution found



Time left: 195
------------------- QUERY 15 ----------------------
No solution found



Time left: -4
Out of time, terminating!
terminated-with-cleanup

BK_STOP 1678879280087

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V50P50N50"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="gold2022"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool gold2022"
echo " Input is BridgeAndVehicles-COL-V50P50N50, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r062-tajo-167813710800080"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V50P50N50.tgz
mv BridgeAndVehicles-COL-V50P50N50 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;