fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r039-tajo-167813692100162
Last Updated
May 14, 2023

About the Execution of LoLa+red for BridgeAndVehicles-PT-V04P05N02

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
279.260 6021.00 13691.00 103.70 FTFFFFTTTTFFFFTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r039-tajo-167813692100162.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
..................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is BridgeAndVehicles-PT-V04P05N02, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r039-tajo-167813692100162
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 656K
-rw-r--r-- 1 mcc users 9.5K Feb 25 12:04 CTLCardinality.txt
-rw-r--r-- 1 mcc users 89K Feb 25 12:04 CTLCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 25 12:03 CTLFireability.txt
-rw-r--r-- 1 mcc users 81K Feb 25 12:03 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3K Feb 25 15:35 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 15:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 7.2K Feb 25 15:35 LTLFireability.txt
-rw-r--r-- 1 mcc users 30K Feb 25 15:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 19K Feb 25 12:06 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 163K Feb 25 12:06 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 19K Feb 25 12:05 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 97K Feb 25 12:05 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 15:35 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 15:35 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 37K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-PT-V04P05N02-CTLFireability-00
FORMULA_NAME BridgeAndVehicles-PT-V04P05N02-CTLFireability-01
FORMULA_NAME BridgeAndVehicles-PT-V04P05N02-CTLFireability-02
FORMULA_NAME BridgeAndVehicles-PT-V04P05N02-CTLFireability-03
FORMULA_NAME BridgeAndVehicles-PT-V04P05N02-CTLFireability-04
FORMULA_NAME BridgeAndVehicles-PT-V04P05N02-CTLFireability-05
FORMULA_NAME BridgeAndVehicles-PT-V04P05N02-CTLFireability-06
FORMULA_NAME BridgeAndVehicles-PT-V04P05N02-CTLFireability-07
FORMULA_NAME BridgeAndVehicles-PT-V04P05N02-CTLFireability-08
FORMULA_NAME BridgeAndVehicles-PT-V04P05N02-CTLFireability-09
FORMULA_NAME BridgeAndVehicles-PT-V04P05N02-CTLFireability-10
FORMULA_NAME BridgeAndVehicles-PT-V04P05N02-CTLFireability-11
FORMULA_NAME BridgeAndVehicles-PT-V04P05N02-CTLFireability-12
FORMULA_NAME BridgeAndVehicles-PT-V04P05N02-CTLFireability-13
FORMULA_NAME BridgeAndVehicles-PT-V04P05N02-CTLFireability-14
FORMULA_NAME BridgeAndVehicles-PT-V04P05N02-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678483298765

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BridgeAndVehicles-PT-V04P05N02
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 21:21:40] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 21:21:40] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 21:21:40] [INFO ] Load time of PNML (sax parser for PT used): 39 ms
[2023-03-10 21:21:40] [INFO ] Transformed 28 places.
[2023-03-10 21:21:40] [INFO ] Transformed 52 transitions.
[2023-03-10 21:21:40] [INFO ] Parsed PT model containing 28 places and 52 transitions and 326 arcs in 123 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
Support contains 26 out of 28 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 28/28 places, 52/52 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 26 transition count 52
Applied a total of 2 rules in 12 ms. Remains 26 /28 variables (removed 2) and now considering 52/52 (removed 0) transitions.
[2023-03-10 21:21:40] [INFO ] Flow matrix only has 34 transitions (discarded 18 similar events)
// Phase 1: matrix 34 rows 26 cols
[2023-03-10 21:21:40] [INFO ] Computed 5 place invariants in 5 ms
[2023-03-10 21:21:40] [INFO ] Dead Transitions using invariants and state equation in 170 ms found 0 transitions.
[2023-03-10 21:21:40] [INFO ] Flow matrix only has 34 transitions (discarded 18 similar events)
[2023-03-10 21:21:40] [INFO ] Invariant cache hit.
[2023-03-10 21:21:40] [INFO ] Implicit Places using invariants in 21 ms returned []
[2023-03-10 21:21:40] [INFO ] Flow matrix only has 34 transitions (discarded 18 similar events)
[2023-03-10 21:21:40] [INFO ] Invariant cache hit.
[2023-03-10 21:21:41] [INFO ] State equation strengthened by 6 read => feed constraints.
[2023-03-10 21:21:41] [INFO ] Implicit Places using invariants and state equation in 42 ms returned []
Implicit Place search using SMT with State Equation took 64 ms to find 0 implicit places.
[2023-03-10 21:21:41] [INFO ] Flow matrix only has 34 transitions (discarded 18 similar events)
[2023-03-10 21:21:41] [INFO ] Invariant cache hit.
[2023-03-10 21:21:41] [INFO ] Dead Transitions using invariants and state equation in 38 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 26/28 places, 52/52 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 317 ms. Remains : 26/28 places, 52/52 transitions.
Support contains 26 out of 26 places after structural reductions.
[2023-03-10 21:21:41] [INFO ] Flatten gal took : 29 ms
[2023-03-10 21:21:41] [INFO ] Flatten gal took : 13 ms
[2023-03-10 21:21:41] [INFO ] Input system was already deterministic with 52 transitions.
Incomplete random walk after 10000 steps, including 229 resets, run finished after 520 ms. (steps per millisecond=19 ) properties (out of 57) seen :42
Incomplete Best-First random walk after 1000 steps, including 8 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 15) seen :1
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 1000 steps, including 8 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 1000 steps, including 9 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 1000 steps, including 9 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 14) seen :1
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 1001 steps, including 9 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 1000 steps, including 7 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 13) seen :1
Incomplete Best-First random walk after 1000 steps, including 11 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1000 steps, including 9 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1000 steps, including 8 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 12) seen :0
Running SMT prover for 12 properties.
[2023-03-10 21:21:42] [INFO ] Flow matrix only has 34 transitions (discarded 18 similar events)
[2023-03-10 21:21:42] [INFO ] Invariant cache hit.
[2023-03-10 21:21:42] [INFO ] [Real]Absence check using 5 positive place invariants in 1 ms returned sat
[2023-03-10 21:21:42] [INFO ] After 82ms SMT Verify possible using all constraints in real domain returned unsat :5 sat :0 real:7
[2023-03-10 21:21:42] [INFO ] [Nat]Absence check using 5 positive place invariants in 1 ms returned sat
[2023-03-10 21:21:42] [INFO ] After 30ms SMT Verify possible using state equation in natural domain returned unsat :6 sat :6
[2023-03-10 21:21:42] [INFO ] State equation strengthened by 6 read => feed constraints.
[2023-03-10 21:21:42] [INFO ] After 26ms SMT Verify possible using 6 Read/Feed constraints in natural domain returned unsat :6 sat :6
[2023-03-10 21:21:42] [INFO ] Deduced a trap composed of 6 places in 25 ms of which 3 ms to minimize.
[2023-03-10 21:21:42] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 1 trap constraints in 32 ms
[2023-03-10 21:21:42] [INFO ] After 82ms SMT Verify possible using trap constraints in natural domain returned unsat :9 sat :3
Attempting to minimize the solution found.
Minimization took 11 ms.
[2023-03-10 21:21:42] [INFO ] After 171ms SMT Verify possible using all constraints in natural domain returned unsat :9 sat :3
Fused 12 Parikh solutions to 3 different solutions.
Parikh walk visited 0 properties in 6 ms.
Support contains 14 out of 26 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 26/26 places, 52/52 transitions.
Applied a total of 0 rules in 6 ms. Remains 26 /26 variables (removed 0) and now considering 52/52 (removed 0) transitions.
[2023-03-10 21:21:42] [INFO ] Flow matrix only has 34 transitions (discarded 18 similar events)
[2023-03-10 21:21:42] [INFO ] Invariant cache hit.
[2023-03-10 21:21:42] [INFO ] Dead Transitions using invariants and state equation in 39 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 46 ms. Remains : 26/26 places, 52/52 transitions.
Incomplete random walk after 10000 steps, including 229 resets, run finished after 147 ms. (steps per millisecond=68 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 105 resets, run finished after 69 ms. (steps per millisecond=144 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10000 steps, including 89 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10000 steps, including 107 resets, run finished after 73 ms. (steps per millisecond=136 ) properties (out of 3) seen :0
Probably explored full state space saw : 2874 states, properties seen :0
Probabilistic random walk after 10034 steps, saw 2874 distinct states, run finished after 75 ms. (steps per millisecond=133 ) properties seen :0
Explored full state space saw : 2874 states, properties seen :0
Exhaustive walk after 10034 steps, saw 2874 distinct states, run finished after 52 ms. (steps per millisecond=192 ) properties seen :0
Successfully simplified 12 atomic propositions for a total of 16 simplifications.
[2023-03-10 21:21:42] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-10 21:21:42] [INFO ] Flatten gal took : 8 ms
FORMULA BridgeAndVehicles-PT-V04P05N02-CTLFireability-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 15 ms
[2023-03-10 21:21:43] [INFO ] Input system was already deterministic with 52 transitions.
Computed a total of 17 stabilizing places and 20 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 52/52 transitions.
Applied a total of 0 rules in 0 ms. Remains 26 /26 variables (removed 0) and now considering 52/52 (removed 0) transitions.
[2023-03-10 21:21:43] [INFO ] Flow matrix only has 34 transitions (discarded 18 similar events)
[2023-03-10 21:21:43] [INFO ] Invariant cache hit.
[2023-03-10 21:21:43] [INFO ] Dead Transitions using invariants and state equation in 71 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 71 ms. Remains : 26/26 places, 52/52 transitions.
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 5 ms
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 7 ms
[2023-03-10 21:21:43] [INFO ] Input system was already deterministic with 52 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 52/52 transitions.
Applied a total of 0 rules in 1 ms. Remains 26 /26 variables (removed 0) and now considering 52/52 (removed 0) transitions.
[2023-03-10 21:21:43] [INFO ] Flow matrix only has 34 transitions (discarded 18 similar events)
[2023-03-10 21:21:43] [INFO ] Invariant cache hit.
[2023-03-10 21:21:43] [INFO ] Dead Transitions using invariants and state equation in 61 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 70 ms. Remains : 26/26 places, 52/52 transitions.
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 5 ms
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 5 ms
[2023-03-10 21:21:43] [INFO ] Input system was already deterministic with 52 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 52/52 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 25 transition count 51
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 25 transition count 51
Applied a total of 2 rules in 3 ms. Remains 25 /26 variables (removed 1) and now considering 51/52 (removed 1) transitions.
[2023-03-10 21:21:43] [INFO ] Flow matrix only has 33 transitions (discarded 18 similar events)
// Phase 1: matrix 33 rows 25 cols
[2023-03-10 21:21:43] [INFO ] Computed 5 place invariants in 1 ms
[2023-03-10 21:21:43] [INFO ] Dead Transitions using invariants and state equation in 52 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 57 ms. Remains : 25/26 places, 51/52 transitions.
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:21:43] [INFO ] Input system was already deterministic with 51 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 52/52 transitions.
Applied a total of 0 rules in 1 ms. Remains 26 /26 variables (removed 0) and now considering 52/52 (removed 0) transitions.
[2023-03-10 21:21:43] [INFO ] Flow matrix only has 34 transitions (discarded 18 similar events)
// Phase 1: matrix 34 rows 26 cols
[2023-03-10 21:21:43] [INFO ] Computed 5 place invariants in 0 ms
[2023-03-10 21:21:43] [INFO ] Dead Transitions using invariants and state equation in 63 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 65 ms. Remains : 26/26 places, 52/52 transitions.
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 11 ms
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:21:43] [INFO ] Input system was already deterministic with 52 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 52/52 transitions.
Applied a total of 0 rules in 0 ms. Remains 26 /26 variables (removed 0) and now considering 52/52 (removed 0) transitions.
[2023-03-10 21:21:43] [INFO ] Flow matrix only has 34 transitions (discarded 18 similar events)
[2023-03-10 21:21:43] [INFO ] Invariant cache hit.
[2023-03-10 21:21:43] [INFO ] Dead Transitions using invariants and state equation in 30 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 26/26 places, 52/52 transitions.
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 2 ms
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:21:43] [INFO ] Input system was already deterministic with 52 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 52/52 transitions.
Applied a total of 0 rules in 3 ms. Remains 26 /26 variables (removed 0) and now considering 52/52 (removed 0) transitions.
[2023-03-10 21:21:43] [INFO ] Flow matrix only has 34 transitions (discarded 18 similar events)
[2023-03-10 21:21:43] [INFO ] Invariant cache hit.
[2023-03-10 21:21:43] [INFO ] Dead Transitions using invariants and state equation in 57 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 62 ms. Remains : 26/26 places, 52/52 transitions.
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 4 ms
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 4 ms
[2023-03-10 21:21:43] [INFO ] Input system was already deterministic with 52 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 52/52 transitions.
Applied a total of 0 rules in 1 ms. Remains 26 /26 variables (removed 0) and now considering 52/52 (removed 0) transitions.
[2023-03-10 21:21:43] [INFO ] Flow matrix only has 34 transitions (discarded 18 similar events)
[2023-03-10 21:21:43] [INFO ] Invariant cache hit.
[2023-03-10 21:21:43] [INFO ] Dead Transitions using invariants and state equation in 36 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 38 ms. Remains : 26/26 places, 52/52 transitions.
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 2 ms
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 2 ms
[2023-03-10 21:21:43] [INFO ] Input system was already deterministic with 52 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 52/52 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 25 transition count 51
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 25 transition count 51
Applied a total of 2 rules in 3 ms. Remains 25 /26 variables (removed 1) and now considering 51/52 (removed 1) transitions.
[2023-03-10 21:21:43] [INFO ] Flow matrix only has 33 transitions (discarded 18 similar events)
// Phase 1: matrix 33 rows 25 cols
[2023-03-10 21:21:43] [INFO ] Computed 5 place invariants in 1 ms
[2023-03-10 21:21:43] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 40 ms. Remains : 25/26 places, 51/52 transitions.
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 4 ms
[2023-03-10 21:21:43] [INFO ] Input system was already deterministic with 51 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 52/52 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 25 transition count 51
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 25 transition count 51
Applied a total of 2 rules in 2 ms. Remains 25 /26 variables (removed 1) and now considering 51/52 (removed 1) transitions.
[2023-03-10 21:21:43] [INFO ] Flow matrix only has 33 transitions (discarded 18 similar events)
[2023-03-10 21:21:43] [INFO ] Invariant cache hit.
[2023-03-10 21:21:43] [INFO ] Dead Transitions using invariants and state equation in 45 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 48 ms. Remains : 25/26 places, 51/52 transitions.
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 9 ms
[2023-03-10 21:21:43] [INFO ] Input system was already deterministic with 51 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 52/52 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 25 transition count 51
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 25 transition count 51
Applied a total of 2 rules in 6 ms. Remains 25 /26 variables (removed 1) and now considering 51/52 (removed 1) transitions.
[2023-03-10 21:21:43] [INFO ] Flow matrix only has 33 transitions (discarded 18 similar events)
[2023-03-10 21:21:43] [INFO ] Invariant cache hit.
[2023-03-10 21:21:43] [INFO ] Dead Transitions using invariants and state equation in 29 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 37 ms. Remains : 25/26 places, 51/52 transitions.
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 5 ms
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 5 ms
[2023-03-10 21:21:43] [INFO ] Input system was already deterministic with 51 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 26/26 places, 52/52 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 25 transition count 51
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 25 transition count 51
Applied a total of 2 rules in 6 ms. Remains 25 /26 variables (removed 1) and now considering 51/52 (removed 1) transitions.
[2023-03-10 21:21:43] [INFO ] Flow matrix only has 33 transitions (discarded 18 similar events)
[2023-03-10 21:21:43] [INFO ] Invariant cache hit.
[2023-03-10 21:21:43] [INFO ] Dead Transitions using invariants and state equation in 48 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 54 ms. Remains : 25/26 places, 51/52 transitions.
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 2 ms
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:21:43] [INFO ] Input system was already deterministic with 51 transitions.
Finished random walk after 17 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=8 )
FORMULA BridgeAndVehicles-PT-V04P05N02-CTLFireability-10 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 52/52 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 25 transition count 51
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 25 transition count 51
Applied a total of 2 rules in 1 ms. Remains 25 /26 variables (removed 1) and now considering 51/52 (removed 1) transitions.
[2023-03-10 21:21:43] [INFO ] Flow matrix only has 33 transitions (discarded 18 similar events)
[2023-03-10 21:21:43] [INFO ] Invariant cache hit.
[2023-03-10 21:21:43] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 25/26 places, 51/52 transitions.
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 2 ms
[2023-03-10 21:21:43] [INFO ] Input system was already deterministic with 51 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 52/52 transitions.
Applied a total of 0 rules in 1 ms. Remains 26 /26 variables (removed 0) and now considering 52/52 (removed 0) transitions.
[2023-03-10 21:21:43] [INFO ] Flow matrix only has 34 transitions (discarded 18 similar events)
// Phase 1: matrix 34 rows 26 cols
[2023-03-10 21:21:43] [INFO ] Computed 5 place invariants in 1 ms
[2023-03-10 21:21:43] [INFO ] Dead Transitions using invariants and state equation in 28 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 30 ms. Remains : 26/26 places, 52/52 transitions.
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 3 ms
[2023-03-10 21:21:43] [INFO ] Flatten gal took : 2 ms
[2023-03-10 21:21:43] [INFO ] Input system was already deterministic with 52 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 52/52 transitions.
Applied a total of 0 rules in 1 ms. Remains 26 /26 variables (removed 0) and now considering 52/52 (removed 0) transitions.
[2023-03-10 21:21:43] [INFO ] Flow matrix only has 34 transitions (discarded 18 similar events)
[2023-03-10 21:21:43] [INFO ] Invariant cache hit.
[2023-03-10 21:21:44] [INFO ] Dead Transitions using invariants and state equation in 43 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 64 ms. Remains : 26/26 places, 52/52 transitions.
[2023-03-10 21:21:44] [INFO ] Flatten gal took : 2 ms
[2023-03-10 21:21:44] [INFO ] Flatten gal took : 2 ms
[2023-03-10 21:21:44] [INFO ] Input system was already deterministic with 52 transitions.
Starting structural reductions in LTL mode, iteration 0 : 26/26 places, 52/52 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 25 transition count 51
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 25 transition count 51
Applied a total of 2 rules in 1 ms. Remains 25 /26 variables (removed 1) and now considering 51/52 (removed 1) transitions.
[2023-03-10 21:21:44] [INFO ] Flow matrix only has 33 transitions (discarded 18 similar events)
// Phase 1: matrix 33 rows 25 cols
[2023-03-10 21:21:44] [INFO ] Computed 5 place invariants in 1 ms
[2023-03-10 21:21:44] [INFO ] Dead Transitions using invariants and state equation in 66 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 68 ms. Remains : 25/26 places, 51/52 transitions.
[2023-03-10 21:21:44] [INFO ] Flatten gal took : 2 ms
[2023-03-10 21:21:44] [INFO ] Flatten gal took : 2 ms
[2023-03-10 21:21:44] [INFO ] Input system was already deterministic with 51 transitions.
[2023-03-10 21:21:44] [INFO ] Flatten gal took : 6 ms
[2023-03-10 21:21:44] [INFO ] Flatten gal took : 19 ms
[2023-03-10 21:21:44] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 7 ms.
[2023-03-10 21:21:44] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 26 places, 52 transitions and 324 arcs took 0 ms.
Total runtime 3698 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT BridgeAndVehicles-PT-V04P05N02
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA BridgeAndVehicles-PT-V04P05N02-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V04P05N02-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V04P05N02-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V04P05N02-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V04P05N02-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V04P05N02-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V04P05N02-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V04P05N02-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V04P05N02-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V04P05N02-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V04P05N02-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V04P05N02-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V04P05N02-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V04P05N02-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678483304786

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 31 (type EXCL) for 30 BridgeAndVehicles-PT-V04P05N02-CTLFireability-12
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 31 (type EXCL) for BridgeAndVehicles-PT-V04P05N02-CTLFireability-12
lola: result : false
lola: markings : 2873
lola: fired transitions : 7261
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 BridgeAndVehicles-PT-V04P05N02-CTLFireability-14
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 37 (type EXCL) for BridgeAndVehicles-PT-V04P05N02-CTLFireability-14
lola: result : true
lola: markings : 1029
lola: fired transitions : 2650
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 BridgeAndVehicles-PT-V04P05N02-CTLFireability-13
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: FINISHED task # 34 (type EXCL) for BridgeAndVehicles-PT-V04P05N02-CTLFireability-13
lola: result : false
lola: markings : 543
lola: fired transitions : 1051
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 BridgeAndVehicles-PT-V04P05N02-CTLFireability-09
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for BridgeAndVehicles-PT-V04P05N02-CTLFireability-09
lola: result : true
lola: markings : 180
lola: fired transitions : 268
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 BridgeAndVehicles-PT-V04P05N02-CTLFireability-08
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for BridgeAndVehicles-PT-V04P05N02-CTLFireability-08
lola: result : true
lola: markings : 2874
lola: fired transitions : 17194
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 BridgeAndVehicles-PT-V04P05N02-CTLFireability-06
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for BridgeAndVehicles-PT-V04P05N02-CTLFireability-06
lola: result : true
lola: markings : 2706
lola: fired transitions : 8763
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 BridgeAndVehicles-PT-V04P05N02-CTLFireability-04
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for BridgeAndVehicles-PT-V04P05N02-CTLFireability-04
lola: result : false
lola: markings : 2874
lola: fired transitions : 28324
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 BridgeAndVehicles-PT-V04P05N02-CTLFireability-03
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for BridgeAndVehicles-PT-V04P05N02-CTLFireability-03
lola: result : false
lola: markings : 2874
lola: fired transitions : 10332
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 BridgeAndVehicles-PT-V04P05N02-CTLFireability-02
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for BridgeAndVehicles-PT-V04P05N02-CTLFireability-02
lola: result : false
lola: markings : 381
lola: fired transitions : 1167
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 BridgeAndVehicles-PT-V04P05N02-CTLFireability-01
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for BridgeAndVehicles-PT-V04P05N02-CTLFireability-01
lola: result : true
lola: markings : 2874
lola: fired transitions : 12713
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 BridgeAndVehicles-PT-V04P05N02-CTLFireability-15
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for BridgeAndVehicles-PT-V04P05N02-CTLFireability-15
lola: result : false
lola: markings : 2874
lola: fired transitions : 12322
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 BridgeAndVehicles-PT-V04P05N02-CTLFireability-07
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for BridgeAndVehicles-PT-V04P05N02-CTLFireability-07
lola: result : true
lola: markings : 945
lola: fired transitions : 4947
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 BridgeAndVehicles-PT-V04P05N02-CTLFireability-00
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for BridgeAndVehicles-PT-V04P05N02-CTLFireability-00
lola: result : false
lola: markings : 166
lola: fired transitions : 736
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 BridgeAndVehicles-PT-V04P05N02-CTLFireability-05
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for BridgeAndVehicles-PT-V04P05N02-CTLFireability-05
lola: result : false
lola: markings : 2524
lola: fired transitions : 10048
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V04P05N02-CTLFireability-00: CTL false CTL model checker
BridgeAndVehicles-PT-V04P05N02-CTLFireability-01: CTL true CTL model checker
BridgeAndVehicles-PT-V04P05N02-CTLFireability-02: CTL false CTL model checker
BridgeAndVehicles-PT-V04P05N02-CTLFireability-03: CTL false CTL model checker
BridgeAndVehicles-PT-V04P05N02-CTLFireability-04: CTL false CTL model checker
BridgeAndVehicles-PT-V04P05N02-CTLFireability-05: CTL false CTL model checker
BridgeAndVehicles-PT-V04P05N02-CTLFireability-06: CTL true CTL model checker
BridgeAndVehicles-PT-V04P05N02-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V04P05N02-CTLFireability-08: CTL true CTL model checker
BridgeAndVehicles-PT-V04P05N02-CTLFireability-09: CTL true CTL model checker
BridgeAndVehicles-PT-V04P05N02-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-PT-V04P05N02-CTLFireability-13: CTL false CTL model checker
BridgeAndVehicles-PT-V04P05N02-CTLFireability-14: CTL true CTL model checker
BridgeAndVehicles-PT-V04P05N02-CTLFireability-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-PT-V04P05N02"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is BridgeAndVehicles-PT-V04P05N02, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r039-tajo-167813692100162"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-PT-V04P05N02.tgz
mv BridgeAndVehicles-PT-V04P05N02 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;