About the Execution of LoLa+red for BridgeAndVehicles-COL-V80P20N50
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 10726.228 | 101741.00 | 319234.00 | 150.10 | FFFFTTFFFTTTFTTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2023-input.r039-tajo-167813692100134.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is BridgeAndVehicles-COL-V80P20N50, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r039-tajo-167813692100134
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 536K
-rw-r--r-- 1 mcc users 6.6K Feb 25 13:03 CTLCardinality.txt
-rw-r--r-- 1 mcc users 60K Feb 25 13:03 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.7K Feb 25 12:55 CTLFireability.txt
-rw-r--r-- 1 mcc users 61K Feb 25 12:55 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Feb 25 15:36 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 15:36 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Feb 25 15:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 15:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 14:40 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 127K Feb 25 14:40 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 25 14:31 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 90K Feb 25 14:31 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 15:36 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 15:36 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 47K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1678482374073
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BridgeAndVehicles-COL-V80P20N50
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 21:06:16] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-10 21:06:16] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 21:06:16] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-10 21:06:17] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-10 21:06:17] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 709 ms
[2023-03-10 21:06:17] [INFO ] Imported 15 HL places and 11 HL transitions for a total of 228 PT places and 1339138.0 transition bindings in 45 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 43 ms.
Working with output stream class java.io.PrintStream
[2023-03-10 21:06:17] [INFO ] Built PT skeleton of HLPN with 15 places and 11 transitions 56 arcs in 9 ms.
[2023-03-10 21:06:17] [INFO ] Skeletonized 16 HLPN properties in 4 ms.
Remains 16 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Computed a total of 9 stabilizing places and 6 stable transitions
Graph (complete) has 22 edges and 12 vertex of which 10 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.1 ms
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
[2023-03-10 21:06:17] [INFO ] Flatten gal took : 31 ms
[2023-03-10 21:06:17] [INFO ] Flatten gal took : 2 ms
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00 FALSE TECHNIQUES CPN_APPROX
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02 FALSE TECHNIQUES CPN_APPROX
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04 TRUE TECHNIQUES CPN_APPROX
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14 TRUE TECHNIQUES CPN_APPROX
Arc [1:1*[(MOD (ADD $cA 1) 81)]] contains successor/predecessor on variables of sort voitureA
Arc [6:1*[(MOD (ADD (MOD (MINUS $cB 1) 81) 81) 81)]] contains successor/predecessor on variables of sort voitureB
Arc [13:1*[(MOD (ADD $cpt 1) 51)]] contains successor/predecessor on variables of sort compteur
Arc [14:1*[(MOD (ADD $s 1) 2)]] contains successor/predecessor on variables of sort sens
[2023-03-10 21:06:18] [INFO ] Unfolded HLPN to a Petri net with 228 places and 8588 transitions 67470 arcs in 307 ms.
[2023-03-10 21:06:18] [INFO ] Unfolded 16 HLPN properties in 1 ms.
Incomplete random walk after 10000 steps, including 14 resets, run finished after 1058 ms. (steps per millisecond=9 ) properties (out of 12) seen :4
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10000 steps, including 5 resets, run finished after 223 ms. (steps per millisecond=44 ) properties (out of 8) seen :2
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 5 resets, run finished after 176 ms. (steps per millisecond=56 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 6 resets, run finished after 227 ms. (steps per millisecond=44 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 6 resets, run finished after 244 ms. (steps per millisecond=40 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 5 resets, run finished after 368 ms. (steps per millisecond=27 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 6 resets, run finished after 477 ms. (steps per millisecond=20 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 4 resets, run finished after 251 ms. (steps per millisecond=39 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
[2023-03-10 21:06:21] [INFO ] Flow matrix only has 530 transitions (discarded 8058 similar events)
// Phase 1: matrix 530 rows 228 cols
[2023-03-10 21:06:21] [INFO ] Computed 7 place invariants in 40 ms
[2023-03-10 21:06:22] [INFO ] [Real]Absence check using 7 positive place invariants in 3 ms returned sat
[2023-03-10 21:06:22] [INFO ] After 469ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:4
[2023-03-10 21:06:22] [INFO ] [Nat]Absence check using 7 positive place invariants in 51 ms returned sat
[2023-03-10 21:06:22] [INFO ] After 536ms SMT Verify possible using all constraints in natural domain returned unsat :6 sat :0
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 6 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 6111 ms.
starting LoLA
BK_INPUT BridgeAndVehicles-COL-V80P20N50
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678482475814
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 57 (type SKEL/FNDP) for 0 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN) for 0 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 61 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: TR BINDINGS
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 60 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 57 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 58 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 61 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 81 (type SKEL/FNDP) for 45 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type SKEL/EQUN) for 45 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 84 (type SKEL/SRCH) for 45 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type SKEL/SRCH) for 45 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 85 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 81 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 82 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 84 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 69 (type SKEL/FNDP) for 42 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type SKEL/EQUN) for 42 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 76 (type SKEL/SRCH) for 42 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 77 (type SKEL/SRCH) for 42 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: TR BINDINGS DONE
lola: Places: 228, Transitions: 8588
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 81 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 56385
lola: tried executions : 56386
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 57 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 11252
lola: tried executions : 11253
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-82.sara.
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: @ trans enregistrement_A
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: @ trans decision
lola: @ trans altern_cpt
lola: @ trans autorisation_A
lola: @ trans liberation_A
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: @ trans enregistrement_B
lola: @ trans timeout_A
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-74.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 82 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15
lola: result : unknown
lola: @ trans timeout_B
lola: @ trans liberation_B
lola: @ trans basculement
lola: @ trans autorisation_B
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-58.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 74 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14
lola: result : false
lola: CANCELED task # 69 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 76 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 77 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 132 (type SKEL/FNDP) for 18 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 138 (type SKEL/EQUN) for 18 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 140 (type SKEL/SRCH) for 18 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 141 (type SKEL/SRCH) for 18 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 69 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 566220
lola: tried executions : 22419
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 141 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06
lola: result : true
lola: markings : 76
lola: fired transitions : 75
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 132 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 138 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 140 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 145 (type SKEL/FNDP) for 12 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 146 (type SKEL/EQUN) for 12 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 155 (type SKEL/SRCH) for 12 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 156 (type SKEL/SRCH) for 12 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 155 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 145 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 146 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 156 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 123 (type SKEL/FNDP) for 27 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 124 (type SKEL/EQUN) for 27 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 126 (type SKEL/SRCH) for 27 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 127 (type SKEL/SRCH) for 27 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 132 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06
lola: result : true
lola: fired transitions : 74
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 58 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00
lola: result : false
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG 0 1 4 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
123 EF FNDP 5/255 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 8363921 t fired, 9030 attempts, .
124 EF STEQ 5/255 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 sara not yet started (preprocessing).
126 EF SRCH 5/255 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 2464224 m, 492844 m/sec, 5877720 t fired, .
127 EF SRCH 5/274 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 1364308 m, 272861 m/sec, 2629702 t fired, .
Time elapsed: 6 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG 0 1 4 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
123 EF FNDP 10/252 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 22137994 t fired, 21744 attempts, .
124 EF STEQ 10/252 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 sara not yet started (preprocessing).
126 EF SRCH 10/252 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 5740116 m, 655178 m/sec, 13724614 t fired, .
127 EF SRCH 10/271 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 3337850 m, 394708 m/sec, 6423789 t fired, .
Time elapsed: 11 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG 0 1 4 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
123 EF FNDP 15/247 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 34542251 t fired, 33038 attempts, .
124 EF STEQ 15/247 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 sara not yet started (preprocessing).
126 EF SRCH 15/247 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 8300242 m, 512025 m/sec, 19857658 t fired, .
127 EF SRCH 15/266 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 6023938 m, 537217 m/sec, 11525336 t fired, .
Time elapsed: 16 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: FINISHED task # 126 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09
lola: result : false
lola: markings : 9258710
lola: fired transitions : 22140399
lola: time used : 17.000000
lola: memory pages used : 1
lola: CANCELED task # 123 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 124 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 127 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 73 (type SKEL/FNDP) for 36 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type SKEL/EQUN) for 36 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 99 (type SKEL/SRCH) for 36 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 100 (type SKEL/SRCH) for 36 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 123 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 41187282
lola: tried executions : 39074
lola: time used : 17.000000
lola: memory pages used : 0
lola: FINISHED task # 73 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12
lola: result : true
lola: fired transitions : 111
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 99 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12
lola: result : true
lola: markings : 113
lola: fired transitions : 112
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 87 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 100 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 131 (type SKEL/FNDP) for 39 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 144 (type SKEL/EQUN) for 39 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 149 (type SKEL/SRCH) for 39 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 150 (type SKEL/SRCH) for 39 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 131 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13
lola: result : true
lola: fired transitions : 295
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 144 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 149 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 150 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 136 (type SKEL/FNDP) for 6 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 158 (type SKEL/EQUN) for 6 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 160 (type SKEL/SRCH) for 6 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 161 (type SKEL/SRCH) for 6 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF 0 1 4 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF 0 0 0 0 1 0 0 4
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
136 EF FNDP 3/358 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02 10444543 t fired, 11 attempts, .
158 EF STEQ 3/358 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02 sara not yet started (preprocessing).
160 EF SRCH 3/358 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02 2132765 m, 426553 m/sec, 6206749 t fired, .
161 EF SRCH 3/358 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02 1012809 m, 202561 m/sec, 2267582 t fired, .
Time elapsed: 21 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-146.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-87.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-144.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 87 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-158.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 146 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04
lola: result : unknown
lola: FINISHED task # 144 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13
lola: result : true
lola: FINISHED task # 158 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02
lola: result : false
lola: CANCELED task # 136 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-124.sara.
sara: place or transition ordering is non-deterministic
lola: CANCELED task # 160 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 161 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 103 (type SKEL/FNDP) for 30 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 105 (type SKEL/EQUN) for 30 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 117 (type SKEL/SRCH) for 30 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 118 (type SKEL/SRCH) for 30 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 136 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 29832605
lola: tried executions : 31
lola: time used : 7.000000
lola: memory pages used : 0
lola: FINISHED task # 118 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10
lola: result : true
lola: markings : 124
lola: fired transitions : 123
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 103 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 105 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 117 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-138.sara.
lola: LAUNCH task # 164 (type SKEL/FNDP) for 24 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic
lola: LAUNCH task # 165 (type SKEL/EQUN) for 24 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 167 (type SKEL/SRCH) for 24 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 168 (type SKEL/SRCH) for 24 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 124 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09
lola: result : false
lola: FINISHED task # 138 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06
lola: result : true
lola: FINISHED task # 103 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10
lola: result : true
lola: fired transitions : 42
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF 0 1 4 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF 0 0 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
164 EF FNDP 1/446 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 3471639 t fired, 4 attempts, .
165 EF STEQ 1/446 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 sara not yet started (preprocessing).
167 EF SRCH 1/510 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 668249 m, 133649 m/sec, 2384710 t fired, .
168 EF SRCH 1/510 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 98688 m, 19737 m/sec, 206383 t fired, .
Time elapsed: 26 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF 0 1 4 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF 0 0 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
164 EF FNDP 6/445 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 18641915 t fired, 19 attempts, .
165 EF STEQ 6/445 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 sara not yet started (preprocessing).
167 EF SRCH 6/509 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 1183768 m, 103103 m/sec, 4283981 t fired, .
168 EF SRCH 6/509 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 2313832 m, 443028 m/sec, 5139424 t fired, .
Time elapsed: 31 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF 0 1 4 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF 0 0 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
164 EF FNDP 11/440 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 33996949 t fired, 34 attempts, .
165 EF STEQ 11/440 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 sara not yet started (preprocessing).
167 EF SRCH 11/504 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 1215355 m, 6317 m/sec, 4397614 t fired, .
168 EF SRCH 11/504 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 3732018 m, 283637 m/sec, 8332470 t fired, .
Time elapsed: 36 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF 0 1 4 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF 0 0 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
164 EF FNDP 16/435 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 49387778 t fired, 50 attempts, .
165 EF STEQ 16/435 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 sara not yet started (preprocessing).
167 EF SRCH 16/499 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 1243619 m, 5652 m/sec, 4512979 t fired, .
168 EF SRCH 16/499 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 3762930 m, 6182 m/sec, 8401214 t fired, .
Time elapsed: 41 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF 0 1 4 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF 0 0 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
164 EF FNDP 21/430 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 65382828 t fired, 66 attempts, .
165 EF STEQ 21/430 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 sara not yet started (preprocessing).
167 EF SRCH 21/494 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 1270339 m, 5344 m/sec, 4621024 t fired, .
168 EF SRCH 21/494 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 3791265 m, 5667 m/sec, 8473743 t fired, .
Time elapsed: 46 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF 0 1 4 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF 0 0 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
164 EF FNDP 26/425 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 80013595 t fired, 81 attempts, .
165 EF STEQ 26/425 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 sara not yet started (preprocessing).
167 EF SRCH 26/489 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 1418178 m, 29567 m/sec, 5154022 t fired, .
168 EF SRCH 26/489 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 3819232 m, 5593 m/sec, 8534033 t fired, .
Time elapsed: 51 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF 0 1 4 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF 0 0 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
164 EF FNDP 31/420 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 98807243 t fired, 99 attempts, .
165 EF STEQ 31/420 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 sara not yet started (preprocessing).
167 EF SRCH 31/484 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 1827530 m, 81870 m/sec, 6675086 t fired, .
168 EF SRCH 31/484 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 4237934 m, 83740 m/sec, 9481248 t fired, .
Time elapsed: 56 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF 0 1 4 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF 0 0 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
164 EF FNDP 36/415 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 132171806 t fired, 133 attempts, .
165 EF STEQ 36/415 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 sara not yet started (preprocessing).
167 EF SRCH 36/479 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 2063245 m, 47143 m/sec, 7526134 t fired, .
168 EF SRCH 36/479 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 6022524 m, 356918 m/sec, 13515992 t fired, .
Time elapsed: 61 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 168 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08
lola: result : false
lola: markings : 7886760
lola: fired transitions : 17757506
lola: time used : 41.000000
lola: memory pages used : 1
lola: CANCELED task # 164 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 165 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 167 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 79 (type SKEL/FNDP) for 15 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SKEL/EQUN) for 15 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type SKEL/SRCH) for 15 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 97 (type SKEL/SRCH) for 15 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 164 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08
lola: result : unknown
lola: fired transitions : 161657196
lola: tried executions : 163
lola: time used : 41.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG 0 1 4 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF 0 0 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
79 EF FNDP 0/504 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05 1317570 t fired, 4509 attempts, .
89 EF STEQ 0/589 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05 sara not yet started (preprocessing).
96 EF SRCH 0/589 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05 233875 m, 46775 m/sec, 525747 t fired, .
97 EF SRCH 0/589 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05 282157 m, 56431 m/sec, 387964 t fired, .
Time elapsed: 66 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-89.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 89 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-165.sara.
lola: CANCELED task # 79 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 96 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 97 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 50 (type SKEL/FNDP) for 3 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/EQUN) for 3 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 3 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/SRCH) for 3 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 79 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 7363870
lola: tried executions : 22891
lola: time used : 2.000000
lola: memory pages used : 0
lola: FINISHED task # 53 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01
lola: result : true
lola: markings : 37
lola: fired transitions : 36
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 50 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 51 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 54 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 129 (type SKEL/FNDP) for 9 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 130 (type SKEL/EQUN) for 9 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 152 (type SKEL/SRCH) for 9 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 153 (type SKEL/SRCH) for 9 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 165 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08
lola: result : false
lola: FINISHED task # 129 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03
lola: result : true
lola: fired transitions : 87
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 130 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 152 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 153 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 80 (type SKEL/FNDP) for 21 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 91 (type SKEL/EQUN) for 21 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 93 (type SKEL/SRCH) for 21 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type SKEL/SRCH) for 21 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 50 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01
lola: result : true
lola: fired transitions : 35
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-105.sara.
lola: FINISHED task # 105 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10
lola: result : true
lola: FINISHED task # 94 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07
lola: result : false
lola: markings : 19521
lola: fired transitions : 25920
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 80 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 91 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 93 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 109 (type SKEL/FNDP) for 33 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 119 (type SKEL/EQUN) for 33 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type SKEL/SRCH) for 33 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type SKEL/SRCH) for 33 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 80 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 71461
lola: tried executions : 224
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 122 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11
lola: result : false
lola: markings : 19843
lola: fired transitions : 32804
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 109 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 119 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 121 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11 (obsolete)
lola: FINISHED task # 109 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11
lola: result : unknown
lola: fired transitions : 41288
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
lola: FINISHED task # 51 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-130.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-91.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 130 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-119.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 119 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11
lola: result : false
lola: FINISHED task # 91 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Rule S: 0 transitions removed,0 places removed
lola: planning for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11 stopped (result already fixed).
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF 0 0 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 71 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF 0 0 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 76 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF 0 0 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 81 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF 0 0 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 86 secs. Pages in use: 3
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 174 (type EXCL) for 39 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13
lola: time limit : 585 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 170 (type FNDP) for 39 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 171 (type EQUN) for 39 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 173 (type SRCH) for 39 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-171.sara.
lola: FINISHED task # 173 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13
lola: result : true
lola: markings : 305
lola: fired transitions : 304
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 170 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 171 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 174 (type EXCL) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13 (obsolete)
lola: FINISHED task # 171 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13
lola: result : unknown
lola: FINISHED task # 170 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13
lola: result : true
lola: fired transitions : 303
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 181 (type EXCL) for 36 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12
lola: time limit : 877 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 177 (type FNDP) for 36 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 178 (type EQUN) for 36 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 180 (type SRCH) for 36 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 180 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12
lola: result : true
lola: markings : 113
lola: fired transitions : 112
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 177 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 178 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 181 (type EXCL) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 187 (type EXCL) for 30 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10
lola: time limit : 877 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 190 (type FNDP) for 3 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 191 (type EQUN) for 3 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 193 (type SRCH) for 3 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-178.sara.
lola: FINISHED task # 193 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01
lola: result : true
lola: markings : 37
lola: fired transitions : 36
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 190 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 191 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 197 (type FNDP) for 9 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 198 (type EQUN) for 9 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 200 (type SRCH) for 9 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 177 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12
lola: result : true
lola: fired transitions : 111
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-191.sara.
lola: FINISHED task # 197 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03
lola: result : true
lola: fired transitions : 87
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-198.sara.
lola: CANCELED task # 198 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 200 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 183 (type FNDP) for 30 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 184 (type EQUN) for 30 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 186 (type SRCH) for 30 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 198 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG false tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG false findpath
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG false tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF 0 1 4 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
183 EF FNDP 1/1754 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10 --
184 EF STEQ 1/3509 0/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10 sara not yet started (preprocessing).
186 EF SRCH 1/3509 1/5 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10 --
187 EF EXCL 2/1755 1/32 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10 206 m, 41 m/sec, 205 t fired, .
Time elapsed: 92 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 183 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10
lola: result : true
lola: fired transitions : 171
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: CANCELED task # 184 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 186 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 187 (type EXCL) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10 (obsolete)
lola: FINISHED task # 190 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01
lola: result : true
lola: fired transitions : 35
lola: tried executions : 1
lola: time used : 2.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-184.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 208 (type EXCL) for 18 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06
lola: time limit : 3508 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 204 (type FNDP) for 18 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 205 (type EQUN) for 18 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 207 (type SRCH) for 18 BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 207 (type SRCH) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06
lola: result : true
lola: markings : 76
lola: fired transitions : 75
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 204 (type FNDP) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 205 (type EQUN) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 208 (type EXCL) for BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-01: AG false tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-03: AG false findpath
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-05: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-06: AG false tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-07: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-08: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-10: EF true findpath
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-11: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-12: AG false tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-13: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N50-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed
Time elapsed: 93 secs. Pages in use: 3
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V80P20N50"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is BridgeAndVehicles-COL-V80P20N50, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r039-tajo-167813692100134"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V80P20N50.tgz
mv BridgeAndVehicles-COL-V80P20N50 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;