About the Execution of LoLa+red for BridgeAndVehicles-COL-V50P20N10
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2059.048 | 12227.00 | 31205.00 | 145.80 | TFTTTFFFTFTTFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2023-input.r039-tajo-167813692000070.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is BridgeAndVehicles-COL-V50P20N10, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r039-tajo-167813692000070
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 448K
-rw-r--r-- 1 mcc users 7.9K Feb 25 12:09 CTLCardinality.txt
-rw-r--r-- 1 mcc users 79K Feb 25 12:09 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.7K Feb 25 12:06 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Feb 25 12:06 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 15:36 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:36 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 15:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 12:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 91K Feb 25 12:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.7K Feb 25 12:17 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 48K Feb 25 12:17 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 15:36 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 15:36 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 42K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1678479069356
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BridgeAndVehicles-COL-V50P20N10
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 20:11:11] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-10 20:11:11] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 20:11:11] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-10 20:11:11] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-10 20:11:12] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 473 ms
[2023-03-10 20:11:12] [INFO ] Imported 15 HL places and 11 HL transitions for a total of 128 PT places and 114798.0 transition bindings in 17 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 17 ms.
Working with output stream class java.io.PrintStream
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 20:11:12] [INFO ] Built PT skeleton of HLPN with 15 places and 11 transitions 56 arcs in 3 ms.
[2023-03-10 20:11:12] [INFO ] Skeletonized 15 HLPN properties in 2 ms.
Remains 15 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Computed a total of 9 stabilizing places and 6 stable transitions
Graph (complete) has 22 edges and 12 vertex of which 10 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.1 ms
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
[2023-03-10 20:11:12] [INFO ] Flatten gal took : 13 ms
[2023-03-10 20:11:12] [INFO ] Flatten gal took : 2 ms
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07 FALSE TECHNIQUES CPN_APPROX
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13 FALSE TECHNIQUES CPN_APPROX
Arc [1:1*[(MOD (ADD $cA 1) 51)]] contains successor/predecessor on variables of sort voitureA
Arc [6:1*[(MOD (ADD (MOD (MINUS $cB 1) 51) 51) 51)]] contains successor/predecessor on variables of sort voitureB
Arc [13:1*[(MOD (ADD $cpt 1) 11)]] contains successor/predecessor on variables of sort compteur
Arc [14:1*[(MOD (ADD $s 1) 2)]] contains successor/predecessor on variables of sort sens
[2023-03-10 20:11:12] [INFO ] Unfolded HLPN to a Petri net with 128 places and 1328 transitions 10010 arcs in 68 ms.
[2023-03-10 20:11:12] [INFO ] Unfolded 15 HLPN properties in 1 ms.
Incomplete random walk after 10000 steps, including 22 resets, run finished after 632 ms. (steps per millisecond=15 ) properties (out of 13) seen :2
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 7 resets, run finished after 128 ms. (steps per millisecond=78 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 10 resets, run finished after 144 ms. (steps per millisecond=69 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 8 resets, run finished after 114 ms. (steps per millisecond=87 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 8 resets, run finished after 123 ms. (steps per millisecond=81 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 6 resets, run finished after 135 ms. (steps per millisecond=74 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 10 resets, run finished after 189 ms. (steps per millisecond=52 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 6 resets, run finished after 124 ms. (steps per millisecond=80 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 9 resets, run finished after 170 ms. (steps per millisecond=58 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 8 resets, run finished after 154 ms. (steps per millisecond=64 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 11 resets, run finished after 190 ms. (steps per millisecond=52 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 6 resets, run finished after 98 ms. (steps per millisecond=102 ) properties (out of 11) seen :1
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Running SMT prover for 10 properties.
[2023-03-10 20:11:14] [INFO ] Flow matrix only has 250 transitions (discarded 1078 similar events)
// Phase 1: matrix 250 rows 128 cols
[2023-03-10 20:11:14] [INFO ] Computed 7 place invariants in 13 ms
[2023-03-10 20:11:15] [INFO ] [Real]Absence check using 7 positive place invariants in 3 ms returned sat
[2023-03-10 20:11:15] [INFO ] After 359ms SMT Verify possible using all constraints in real domain returned unsat :4 sat :0 real:6
[2023-03-10 20:11:15] [INFO ] [Nat]Absence check using 7 positive place invariants in 3 ms returned sat
[2023-03-10 20:11:15] [INFO ] After 123ms SMT Verify possible using all constraints in natural domain returned unsat :10 sat :0
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 10 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 3653 ms.
starting LoLA
BK_INPUT BridgeAndVehicles-COL-V50P20N10
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678479081583
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 64 (type SKEL/FNDP) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type SKEL/EQUN) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: TR BINDINGS
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 67 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: result : true
lola: markings : 350
lola: fired transitions : 349
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH INITIAL
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 17 (type SKEL/CNST) for 15 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: CANCELED task # 64 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 65 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 68 (type SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 96 (type SKEL/FNDP) for 45 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 97 (type SKEL/EQUN) for 45 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 99 (type SKEL/SRCH) for 45 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 17 (type SKEL/CNST) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05
lola: result : false
lola: LAUNCH task # 94 (type SKEL/FNDP) for 21 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 99 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 96 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 97 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 112 (type SKEL/FNDP) for 24 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type SKEL/EQUN) for 24 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 115 (type SKEL/SRCH) for 24 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 64 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 886
lola: tried executions : 3
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-65.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-97.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-113.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 115 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 112 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 113 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 49 (type SKEL/FNDP) for 3 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/EQUN) for 3 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SKEL/SRCH) for 3 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: TR BINDINGS DONE
lola: Places: 128, Transitions: 1328
lola: FINISHED task # 65 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: result : true
lola: FINISHED task # 112 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: result : unknown
lola: fired transitions : 135016
lola: tried executions : 135017
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 113 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 97 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: result : unknown
lola: @ trans enregistrement_A
lola: @ trans decision
lola: @ trans altern_cpt
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-53.sara.
lola: @ trans autorisation_A
lola: @ trans liberation_A
lola: @ trans enregistrement_B
lola: @ trans timeout_A
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: @ trans timeout_B
lola: @ trans liberation_B
lola: @ trans basculement
lola: @ trans autorisation_B
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 57 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
lola: result : false
lola: markings : 33976
lola: fired transitions : 92865
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 53 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 140 (type SKEL/FNDP) for 39 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 144 (type SKEL/EQUN) for 39 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 153 (type SKEL/SRCH) for 39 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 49 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 198337
lola: tried executions : 1679
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 153 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 140 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 144 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 141 (type SKEL/FNDP) for 33 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 148 (type SKEL/EQUN) for 33 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 150 (type SKEL/SRCH) for 33 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 53 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
lola: result : false
lola: FINISHED task # 150 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: result : true
lola: markings : 202
lola: fired transitions : 201
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 141 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 148 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 143 (type SKEL/FNDP) for 27 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 146 (type SKEL/EQUN) for 27 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 156 (type SKEL/SRCH) for 27 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 141 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 200
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-144.sara.
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-148.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 148 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: result : true
lola: FINISHED task # 144 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-146.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: FINISHED task # 146 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 143 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 156 (type SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 126 (type SKEL/FNDP) for 42 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 127 (type SKEL/EQUN) for 42 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 129 (type SKEL/SRCH) for 42 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 129 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: result : true
lola: markings : 61
lola: fired transitions : 60
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 143 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 7321557
lola: tried executions : 9
lola: time used : 2.000000
lola: memory pages used : 0
lola: CANCELED task # 126 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 127 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 84 (type SKEL/FNDP) for 12 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type SKEL/EQUN) for 12 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type SKEL/SRCH) for 12 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 126 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: result : true
lola: fired transitions : 59
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Rule S: 0 transitions removed,0 places removed
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-85.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-127.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 127 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: result : true
lola: LAUNCH INITIAL
lola: LAUNCH task # 22 (type CNST) for 21 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 22 (type CNST) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
lola: result : false
lola: CANCELED task # 94 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 133 (type SKEL/FNDP) for 36 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 94 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 2477827
lola: tried executions : 2477828
lola: time used : 5.000000
lola: memory pages used : 0
lola: FINISHED task # 85 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04
lola: result : false
lola: CANCELED task # 84 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 87 (type SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 52 (type SKEL/FNDP) for 6 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/EQUN) for 6 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/SRCH) for 6 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 84 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 8000054
lola: tried executions : 10
lola: time used : 2.000000
lola: memory pages used : 0
lola: FINISHED task # 59 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
lola: result : false
lola: markings : 51
lola: fired transitions : 50
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 52 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 54 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 79 (type SKEL/FNDP) for 9 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type SKEL/EQUN) for 9 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 90 (type SKEL/SRCH) for 9 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-54.sara.
lola: FINISHED task # 90 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
lola: result : false
lola: markings : 131
lola: fired transitions : 130
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 79 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 82 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-82.sara.
lola: LAUNCH task # 118 (type SKEL/FNDP) for 30 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 119 (type SKEL/EQUN) for 30 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type SKEL/SRCH) for 30 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 121 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 118 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 119 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 71 (type SKEL/FNDP) for 18 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SKEL/EQUN) for 18 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type SKEL/SRCH) for 18 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 82 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
lola: result : false
lola: FINISHED task # 54 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-119.sara.
sara: place or transition ordering is non-deterministic
lola: planning for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09 stopped (result already fixed).
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-72.sara.
sara: place or transition ordering is non-deterministic
lola: planning for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 stopped (result already fixed).
lola: FINISHED task # 119 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
lola: result : false
lola: FINISHED task # 74 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06
lola: result : false
lola: markings : 30603
lola: fired transitions : 66003
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 71 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 72 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 134 (type SKEL/EQUN) for 36 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 136 (type SKEL/SRCH) for 36 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 137 (type SKEL/SRCH) for 36 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 72 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 136 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: result : false
lola: markings : 4124
lola: fired transitions : 4270
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 133 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 134 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 137 (type SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12 (obsolete)
lola: FINISHED task # 133 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 150170
lola: tried executions : 2944
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 71 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 157280
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: planning for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06 stopped (result already fixed).
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: EF false preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: EF 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF 0 0 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: AG 0 0 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 5 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-134.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 170 (type EXCL) for 42 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: time limit : 1198 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 166 (type FNDP) for 42 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 167 (type EQUN) for 42 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 169 (type SRCH) for 42 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 134 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: result : false
lola: FINISHED task # 166 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: result : true
lola: fired transitions : 113
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: CANCELED task # 167 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 169 (type SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 170 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-167.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 176 (type EXCL) for 33 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: time limit : 1797 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 172 (type FNDP) for 33 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 173 (type EQUN) for 33 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 175 (type SRCH) for 33 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-173.sara.
lola: FINISHED task # 172 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 101
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 173 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 175 (type SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 176 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 182 (type EXCL) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 3594 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 178 (type FNDP) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 179 (type EQUN) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 181 (type SRCH) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 173 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: result : unknown
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 181 (type SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: result : true
lola: markings : 462
lola: fired transitions : 461
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 178 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 179 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 182 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: EF true tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: EF false preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF true findpath
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: AG false findpath
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: EF false skeleton: tandem / insertion
Time elapsed: 6 secs. Pages in use: 2
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V50P20N10"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is BridgeAndVehicles-COL-V50P20N10, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r039-tajo-167813692000070"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V50P20N10.tgz
mv BridgeAndVehicles-COL-V50P20N10 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;