Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r039-tajo-167813691900014.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is BridgeAndVehicles-COL-V10P10N10, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r039-tajo-167813691900014
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 628K
-rw-r--r-- 1 mcc users 9.8K Feb 25 12:04 CTLCardinality.txt
-rw-r--r-- 1 mcc users 98K Feb 25 12:04 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.8K Feb 25 12:03 CTLFireability.txt
-rw-r--r-- 1 mcc users 64K Feb 25 12:03 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 15:35 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 15:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 15:35 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 18K Feb 25 12:09 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 172K Feb 25 12:09 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Feb 25 12:08 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 98K Feb 25 12:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 15:35 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 15:35 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 38K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678478724998

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BridgeAndVehicles-COL-V10P10N10
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 20:05:26] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-10 20:05:26] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 20:05:26] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-10 20:05:26] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-10 20:05:27] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 434 ms
[2023-03-10 20:05:27] [INFO ] Imported 15 HL places and 11 HL transitions for a total of 48 PT places and 5438.0 transition bindings in 18 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 24 ms.
Working with output stream class java.io.PrintStream
[2023-03-10 20:05:27] [INFO ] Built PT skeleton of HLPN with 15 places and 11 transitions 56 arcs in 4 ms.
[2023-03-10 20:05:27] [INFO ] Skeletonized 16 HLPN properties in 1 ms.
Remains 16 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Computed a total of 9 stabilizing places and 6 stable transitions
Graph (complete) has 22 edges and 12 vertex of which 10 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.1 ms
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
[2023-03-10 20:05:27] [INFO ] Flatten gal took : 13 ms
[2023-03-10 20:05:27] [INFO ] Flatten gal took : 2 ms
FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00 TRUE TECHNIQUES CPN_APPROX
FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-08 TRUE TECHNIQUES CPN_APPROX
FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-10 FALSE TECHNIQUES CPN_APPROX
FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-11 FALSE TECHNIQUES CPN_APPROX
Arc [13:1*[(MOD (ADD $cpt 1) 11)]] contains successor/predecessor on variables of sort compteur
Arc [1:1*[(MOD (ADD $cA 1) 11)]] contains successor/predecessor on variables of sort voitureA
Arc [6:1*[(MOD (ADD (MOD (MINUS $cB 1) 11) 11) 11)]] contains successor/predecessor on variables of sort voitureB
Arc [14:1*[(MOD (ADD $s 1) 2)]] contains successor/predecessor on variables of sort sens
[2023-03-10 20:05:27] [INFO ] Unfolded HLPN to a Petri net with 48 places and 288 transitions 2090 arcs in 22 ms.
[2023-03-10 20:05:27] [INFO ] Unfolded 16 HLPN properties in 8 ms.
Incomplete random walk after 10000 steps, including 110 resets, run finished after 408 ms. (steps per millisecond=24 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 37 resets, run finished after 93 ms. (steps per millisecond=107 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 54 resets, run finished after 143 ms. (steps per millisecond=69 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 49 resets, run finished after 122 ms. (steps per millisecond=81 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 53 resets, run finished after 151 ms. (steps per millisecond=66 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 44 resets, run finished after 132 ms. (steps per millisecond=75 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 54 resets, run finished after 162 ms. (steps per millisecond=61 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 43 resets, run finished after 171 ms. (steps per millisecond=58 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 45 resets, run finished after 181 ms. (steps per millisecond=55 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 49 resets, run finished after 187 ms. (steps per millisecond=53 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 49 resets, run finished after 164 ms. (steps per millisecond=60 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 54 resets, run finished after 179 ms. (steps per millisecond=55 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 44 resets, run finished after 142 ms. (steps per millisecond=70 ) properties (out of 12) seen :0
Interrupted probabilistic random walk after 784559 steps, run timeout after 6001 ms. (steps per millisecond=130 ) properties seen :{}
Probabilistic random walk after 784559 steps, saw 190052 distinct states, run finished after 6004 ms. (steps per millisecond=130 ) properties seen :0
Running SMT prover for 12 properties.
[2023-03-10 20:05:35] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
// Phase 1: matrix 90 rows 48 cols
[2023-03-10 20:05:35] [INFO ] Computed 7 place invariants in 5 ms
[2023-03-10 20:05:35] [INFO ] [Real]Absence check using 7 positive place invariants in 2 ms returned sat
[2023-03-10 20:05:35] [INFO ] After 199ms SMT Verify possible using all constraints in real domain returned unsat :5 sat :0 real:7
[2023-03-10 20:05:35] [INFO ] [Nat]Absence check using 7 positive place invariants in 1 ms returned sat
[2023-03-10 20:05:35] [INFO ] After 72ms SMT Verify possible using state equation in natural domain returned unsat :11 sat :1
[2023-03-10 20:05:35] [INFO ] State equation strengthened by 22 read => feed constraints.
[2023-03-10 20:05:35] [INFO ] After 42ms SMT Verify possible using 22 Read/Feed constraints in natural domain returned unsat :11 sat :1
[2023-03-10 20:05:35] [INFO ] After 91ms SMT Verify possible using trap constraints in natural domain returned unsat :11 sat :1
Attempting to minimize the solution found.
Minimization took 31 ms.
[2023-03-10 20:05:36] [INFO ] After 260ms SMT Verify possible using all constraints in natural domain returned unsat :11 sat :1
FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-15 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-14 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-13 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-09 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-06 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-05 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-04 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-02 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-01 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 12 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 2 ms.
Support contains 14 out of 48 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 48/48 places, 288/288 transitions.
Applied a total of 0 rules in 33 ms. Remains 48 /48 variables (removed 0) and now considering 288/288 (removed 0) transitions.
[2023-03-10 20:05:36] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
[2023-03-10 20:05:36] [INFO ] Invariant cache hit.
[2023-03-10 20:05:36] [INFO ] Dead Transitions using invariants and state equation in 122 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 157 ms. Remains : 48/48 places, 288/288 transitions.
Incomplete random walk after 10000 steps, including 111 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 43 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 1) seen :0
Probably explored full state space saw : 259554 states, properties seen :0
Probabilistic random walk after 1080831 steps, saw 259554 distinct states, run finished after 1980 ms. (steps per millisecond=545 ) properties seen :0
Explored full state space saw : 259556 states, properties seen :0
Exhaustive walk after 1080838 steps, saw 259556 distinct states, run finished after 2372 ms. (steps per millisecond=455 ) properties seen :0
FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07 FALSE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
All properties solved without resorting to model-checking.
Total runtime 14027 ms.
starting LoLA
BK_INPUT BridgeAndVehicles-COL-V10P10N10
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678478756399

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 55 (type SKEL/FNDP) for 0 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SKEL/EQUN) for 0 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 84 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: TR BINDINGS
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 84 (type SKEL/SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: TR BINDINGS DONE
lola: Places: 48, Transitions: 288
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 55 (type FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 67 (type EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 85 (type SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 65 (type SKEL/FNDP) for 24 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SKEL/EQUN) for 24 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 95 (type SKEL/SRCH) for 24 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type SKEL/SRCH) for 24 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 85 (type SKEL/SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00
lola: result : false
lola: markings : 603
lola: fired transitions : 944
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 55 (type SKEL/FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 45294
lola: tried executions : 45295
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 95 (type SKEL/SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-08
lola: result : false
lola: markings : 16
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 65 (type FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 66 (type EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 96 (type SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 115 (type SKEL/FNDP) for 33 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 119 (type SKEL/EQUN) for 33 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type SKEL/SRCH) for 33 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type SKEL/SRCH) for 33 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 121 (type SKEL/SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-11
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 115 (type FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 119 (type EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 122 (type SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 149 (type SKEL/FNDP) for 21 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 150 (type SKEL/EQUN) for 21 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 152 (type SKEL/SRCH) for 21 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 153 (type SKEL/SRCH) for 21 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: @ trans enregistrement_A
lola: FINISHED task # 152 (type SKEL/SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07
lola: result : true
lola: markings : 396
lola: fired transitions : 774
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 149 (type FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 150 (type EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 153 (type SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 61 (type SKEL/FNDP) for 30 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SKEL/EQUN) for 30 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 116 (type SKEL/SRCH) for 30 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 117 (type SKEL/SRCH) for 30 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 116 (type SKEL/SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-10
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: @ trans decision
lola: CANCELED task # 61 (type FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 62 (type EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 117 (type SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 99 (type SKEL/FNDP) for 6 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 109 (type SKEL/EQUN) for 6 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 111 (type SKEL/SRCH) for 6 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 112 (type SKEL/SRCH) for 6 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-67.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-119.sara.
lola: @ trans altern_cpt
sara: place or transition ordering is non-deterministic
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: @ trans autorisation_A
lola: @ trans liberation_A
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-150.sara.
lola: @ trans enregistrement_B
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-62.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-109.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 119 (type SKEL/EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-11
lola: result : unknown
lola: @ trans timeout_A
lola: @ trans timeout_B
lola: @ trans liberation_B
lola: @ trans basculement
lola: @ trans autorisation_B


lola: FINISHED task # 109 (type SKEL/EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-02
lola: result : false
lola: FINISHED task # 62 (type SKEL/EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-10
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: FINISHED task # 111 (type SKEL/SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-02
lola: result : false
lola: markings : 163265
lola: fired transitions : 616828
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: FINISHED task # 67 (type SKEL/EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00
lola: result : false
lola: FINISHED task # 150 (type SKEL/EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07
lola: result : true
lola: CANCELED task # 99 (type FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 112 (type SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 54 (type SKEL/FNDP) for 15 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type SKEL/EQUN) for 15 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SKEL/SRCH) for 15 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 90 (type SKEL/SRCH) for 15 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 99 (type SKEL/FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 329881
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: FINISHED task # 90 (type SKEL/SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-05
lola: result : false
lola: markings : 48268
lola: fired transitions : 132375
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 54 (type FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 87 (type EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 89 (type SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 105 (type SKEL/FNDP) for 18 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 106 (type SKEL/EQUN) for 18 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 138 (type SKEL/FNDP) for 9 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 145 (type SKEL/SRCH) for 18 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 145 (type SKEL/SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-06
lola: result : false
lola: markings : 34233
lola: fired transitions : 93734
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 105 (type FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 106 (type EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 53 (type SKEL/FNDP) for 12 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type SKEL/EQUN) for 12 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 78 (type SKEL/SRCH) for 12 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 78 (type SKEL/SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-04
lola: result : false
lola: markings : 19822
lola: fired transitions : 59136
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 53 (type FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 76 (type EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 58 (type SKEL/FNDP) for 39 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/EQUN) for 39 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 92 (type SKEL/SRCH) for 39 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 92 (type SKEL/SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-13
lola: result : false
lola: markings : 55638
lola: fired transitions : 165108
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 58 (type FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 59 (type EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 127 (type SKEL/FNDP) for 3 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 129 (type SKEL/EQUN) for 3 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 131 (type SKEL/FNDP) for 27 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-129.sara.

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 129 (type SKEL/EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-01
lola: result : false
lola: CANCELED task # 127 (type FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 69 (type SKEL/FNDP) for 36 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type SKEL/EQUN) for 36 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 127 (type SKEL/FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 485563
lola: tried executions : 44144
lola: time used : 2.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-76.sara.

lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-59.sara.
sara: place or transition ordering is non-deterministic

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-106.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 76 (type SKEL/EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-04
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Rule S: 0 transitions removed,0 places removed
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-87.sara.
sara: place or transition ordering is non-deterministic


sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-70.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 59 (type SKEL/EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-13
lola: planning for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-13 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-01 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-05 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-06 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-10 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-02 stopped (result already fixed).
lola: result : false
lola: FINISHED task # 87 (type SKEL/EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-05
lola: result : false
lola: FINISHED task # 106 (type SKEL/EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-06
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 70 (type SKEL/EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-12
lola: result : false
lola: CANCELED task # 69 (type FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 189 (type EXCL) for 42 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-14
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 132 (type SKEL/FNDP) for 45 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 69 (type SKEL/FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 220148
lola: tried executions : 7103
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-01: AG true skeleton: state equation
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-02: AG true skeleton: state equation
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-05: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-03: EF 0 9 1 0 0 0 0 0
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07: EF 0 5 0 0 2 0 0 3
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-09: AG 0 9 1 0 0 0 0 0
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-14: AG 0 9 1 0 0 0 0 0
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-15: EF 0 9 1 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
131 EF FNDP 4/254 0/5 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-09 1033106 t fired, 93919 attempts, .
132 EF FNDP 1/276 0/5 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-15 7240 t fired, 1 attempts, .
138 EF FNDP 4/273 0/5 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-03 1861450 t fired, 2 attempts, .
189 EF EXCL 1/719 1/32 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-14 54543 m, 10908 m/sec, 73659 t fired, .

Time elapsed: 6 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 189 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-14
lola: result : false
lola: markings : 68558
lola: fired transitions : 92666
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 205 (type EXCL) for 27 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-09
lola: time limit : 898 sec
lola: memory limit: 32 pages
lola: FINISHED task # 205 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-09
lola: result : false
lola: markings : 81276
lola: fired transitions : 141101
lola: time used : 4.000000
lola: memory pages used : 1
lola: CANCELED task # 131 (type FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 191 (type EXCL) for 45 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-15
lola: time limit : 1196 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 169 (type FNDP) for 21 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 131 (type SKEL/FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 2270588
lola: tried executions : 206419
lola: time used : 8.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-01: AG true skeleton: state equation
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-02: AG true skeleton: state equation
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-05: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-09: AG true tandem / relaxed
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-14: AG true tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-03: EF 0 9 1 0 0 0 0 0
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07: EF 0 4 1 0 2 0 0 3
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-15: EF 0 8 2 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
132 EF FNDP 6/508 0/5 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-15 998529 t fired, 1 attempts, .
138 EF FNDP 9/506 0/5 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-03 5041803 t fired, 6 attempts, .
169 EF FNDP 1/448 0/5 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07 15932 t fired, 181 attempts, .
191 EF EXCL 1/1196 1/32 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-15 14783 m, 2956 m/sec, 19589 t fired, .

Time elapsed: 11 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 191 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-15
lola: result : false
lola: markings : 69516
lola: fired transitions : 93624
lola: time used : 2.000000
lola: memory pages used : 1
lola: CANCELED task # 132 (type FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 186 (type EXCL) for 21 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07
lola: time limit : 1794 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 162 (type SKEL/EQUN) for 9 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 132 (type SKEL/FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 1915397
lola: tried executions : 3
lola: time used : 7.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-162.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 162 (type SKEL/EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-03
lola: result : false
lola: CANCELED task # 138 (type FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 173 (type EQUN) for 21 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 185 (type SRCH) for 21 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 138 (type SKEL/FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 5935617
lola: tried executions : 7
lola: time used : 10.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-173.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-01: AG true skeleton: state equation
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-02: AG true skeleton: state equation
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-03: EF false skeleton: state equation
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-05: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-09: AG true tandem / relaxed
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-14: AG true tandem / relaxed
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-15: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07: EF 0 1 4 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
169 EF FNDP 6/3588 0/5 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07 242144 t fired, 2772 attempts, .
173 EF STEQ 4/3588 0/5 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07 sara is running.
185 EF SRCH 4/1794 1/5 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07 173351 m, 34670 m/sec, 483050 t fired, .
186 EF EXCL 4/3588 1/32 BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07 23378 m, 4675 m/sec, 32370 t fired, .

Time elapsed: 16 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 185 (type SRCH) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07
lola: result : false
lola: markings : 186572
lola: fired transitions : 522003
lola: time used : 4.000000
lola: memory pages used : 1
lola: CANCELED task # 169 (type FNDP) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 173 (type EQUN) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 186 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-01: AG true skeleton: state equation
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-02: AG true skeleton: state equation
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-03: EF false skeleton: state equation
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-05: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-07: EF false tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-09: AG true tandem / relaxed
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-14: AG true tandem / relaxed
BridgeAndVehicles-COL-V10P10N10-ReachabilityCardinality-15: EF false tandem / relaxed


Time elapsed: 16 secs. Pages in use: 2

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V10P10N10"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is BridgeAndVehicles-COL-V10P10N10, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r039-tajo-167813691900014"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V10P10N10.tgz
mv BridgeAndVehicles-COL-V10P10N10 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;